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Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / hwmon / f71805f.c
CommitLineData
e53004e2 1/*
51c997d8
JD		 2 * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
3 * chips integrated hardware monitoring features
2d45771e 4 * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org>
e53004e2
JD		 5 *
6 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
7 * complete hardware monitoring features: voltage, fan and temperature
8 * sensors, and manual and automatic fan speed control.
9 *
51c997d8
JD		 10 * The F71872F/FG is almost the same, with two more voltages monitored,
11 * and 6 VID inputs.
12 *
9cab0217
JD		 13 * The F71806F/FG is essentially the same as the F71872F/FG. It even has
14 * the same chip ID, so the driver can't differentiate between.
15 *
e53004e2
JD		 16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30
e54c5ad6
JP		 31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
e53004e2
JD		 33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/jiffies.h>
37#include <linux/platform_device.h>
38#include <linux/hwmon.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h>
f0819184 41#include <linux/mutex.h>
0e39e01c 42#include <linux/sysfs.h>
ce7ee4e8 43#include <linux/ioport.h>
b9acb64a 44#include <linux/acpi.h>
6055fae8 45#include <linux/io.h>
e53004e2 46
67b671bc
JD		 47static unsigned short force_id;
48module_param(force_id, ushort, 0);
49MODULE_PARM_DESC(force_id, "Override the detected device ID");
50
e53004e2
JD		 51static struct platform_device *pdev;
52
53#define DRVNAME "f71805f"
51c997d8 54enum kinds { f71805f, f71872f };
e53004e2
JD		 55
56/*
57 * Super-I/O constants and functions
58 */
59
60#define F71805F_LD_HWM 0x04
61
62#define SIO_REG_LDSEL 0x07 /* Logical device select */
63#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
64#define SIO_REG_DEVREV 0x22 /* Device revision */
65#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
51c997d8 66#define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
e53004e2
JD		 67#define SIO_REG_ENABLE 0x30 /* Logical device enable */
68#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
69
70#define SIO_FINTEK_ID 0x1934
71#define SIO_F71805F_ID 0x0406
51c997d8 72#define SIO_F71872F_ID 0x0341
e53004e2
JD		 73
74static inline int
75superio_inb(int base, int reg)
76{
77 outb(reg, base);
78 return inb(base + 1);
79}
80
81static int
82superio_inw(int base, int reg)
83{
84 int val;
85 outb(reg++, base);
86 val = inb(base + 1) << 8;
87 outb(reg, base);
88 val |= inb(base + 1);
89 return val;
90}
91
92static inline void
93superio_select(int base, int ld)
94{
95 outb(SIO_REG_LDSEL, base);
96 outb(ld, base + 1);
97}
98
99static inline void
100superio_enter(int base)
101{
102 outb(0x87, base);
103 outb(0x87, base);
104}
105
106static inline void
107superio_exit(int base)
108{
109 outb(0xaa, base);
110}
111
112/*
113 * ISA constants
114 */
115
75c99029
JD		 116#define REGION_LENGTH 8
117#define ADDR_REG_OFFSET 5
118#define DATA_REG_OFFSET 6
e53004e2 119
e53004e2
JD		 120/*
121 * Registers
122 */
123
51c997d8 124/* in nr from 0 to 10 (8-bit values) */
e53004e2 125#define F71805F_REG_IN(nr) (0x10 + (nr))
51c997d8
JD		 126#define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
127#define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
e53004e2
JD		 128/* fan nr from 0 to 2 (12-bit values, two registers) */
129#define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
130#define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
315c7113 131#define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
e53004e2 132#define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
6e2bc17b 133#define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
95e35312 134#define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
e53004e2
JD		 135/* temp nr from 0 to 2 (8-bit values) */
136#define F71805F_REG_TEMP(nr) (0x1B + (nr))
137#define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
138#define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
139#define F71805F_REG_TEMP_MODE 0x01
aba5073d
PE		 140/* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
141/* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
142#define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
143 (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
144#define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
145 (0xA4 + 0x10 * (pwmnr) + \
146 2 * (2 - (apnr)))
e53004e2
JD		 147
148#define F71805F_REG_START 0x00
149/* status nr from 0 to 2 */
150#define F71805F_REG_STATUS(nr) (0x36 + (nr))
151
6b14a546 152/* individual register bits */
e196783d 153#define FAN_CTRL_DC_MODE 0x10
315c7113 154#define FAN_CTRL_LATCH_FULL 0x08
95e35312
JD		 155#define FAN_CTRL_MODE_MASK 0x03
156#define FAN_CTRL_MODE_SPEED 0x00
157#define FAN_CTRL_MODE_TEMPERATURE 0x01
158#define FAN_CTRL_MODE_MANUAL 0x02
6b14a546 159
e53004e2
JD		 160/*
161 * Data structures and manipulation thereof
162 */
163
aba5073d
PE		 164struct f71805f_auto_point {
165 u8 temp[3];
166 u16 fan[3];
167};
168
e53004e2
JD		 169struct f71805f_data {
170 unsigned short addr;
171 const char *name;
1beeffe4 172 struct device *hwmon_dev;
e53004e2 173
f0819184 174 struct mutex update_lock;
e53004e2
JD		 175 char valid; /* !=0 if following fields are valid */
176 unsigned long last_updated; /* In jiffies */
177 unsigned long last_limits; /* In jiffies */
178
179 /* Register values */
51c997d8
JD		 180 u8 in[11];
181 u8 in_high[11];
182 u8 in_low[11];
183 u16 has_in;
e53004e2
JD		 184 u16 fan[3];
185 u16 fan_low[3];
315c7113 186 u16 fan_target[3];
6b14a546 187 u8 fan_ctrl[3];
95e35312 188 u8 pwm[3];
6e2bc17b 189 u8 pwm_freq[3];
e53004e2
JD		 190 u8 temp[3];
191 u8 temp_high[3];
192 u8 temp_hyst[3];
193 u8 temp_mode;
2d45771e 194 unsigned long alarms;
aba5073d 195 struct f71805f_auto_point auto_points[3];
e53004e2
JD		 196};
197
51c997d8
JD		 198struct f71805f_sio_data {
199 enum kinds kind;
200 u8 fnsel1;
201};
202
e53004e2
JD		 203static inline long in_from_reg(u8 reg)
204{
7fe83ad8 205 return reg * 8;
e53004e2
JD		 206}
207
208/* The 2 least significant bits are not used */
209static inline u8 in_to_reg(long val)
210{
211 if (val <= 0)
212 return 0;
213 if (val >= 2016)
214 return 0xfc;
7fe83ad8 215 return ((val + 16) / 32) << 2;
e53004e2
JD		 216}
217
218/* in0 is downscaled by a factor 2 internally */
219static inline long in0_from_reg(u8 reg)
220{
7fe83ad8 221 return reg * 16;
e53004e2
JD		 222}
223
224static inline u8 in0_to_reg(long val)
225{
226 if (val <= 0)
227 return 0;
228 if (val >= 4032)
229 return 0xfc;
7fe83ad8 230 return ((val + 32) / 64) << 2;
e53004e2
JD		 231}
232
233/* The 4 most significant bits are not used */
234static inline long fan_from_reg(u16 reg)
235{
236 reg &= 0xfff;
237 if (!reg || reg == 0xfff)
238 return 0;
7fe83ad8 239 return 1500000 / reg;
e53004e2
JD		 240}
241
242static inline u16 fan_to_reg(long rpm)
243{
2fff0840
GR		 244 /*
245 * If the low limit is set below what the chip can measure,
246 * store the largest possible 12-bit value in the registers,
247 * so that no alarm will ever trigger.
248 */
e53004e2
JD		 249 if (rpm < 367)
250 return 0xfff;
7fe83ad8 251 return 1500000 / rpm;
e53004e2
JD		 252}
253
6e2bc17b
JD		 254static inline unsigned long pwm_freq_from_reg(u8 reg)
255{
256 unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
257
258 reg &= 0x7f;
259 if (reg == 0)
260 reg++;
261 return clock / (reg << 8);
262}
263
264static inline u8 pwm_freq_to_reg(unsigned long val)
265{
266 if (val >= 187500) /* The highest we can do */
267 return 0x80;
268 if (val >= 1475) /* Use 48 MHz clock */
269 return 0x80 | (48000000UL / (val << 8));
270 if (val < 31) /* The lowest we can do */
271 return 0x7f;
272 else /* Use 1 MHz clock */
273 return 1000000UL / (val << 8);
274}
275
e196783d
JD		 276static inline int pwm_mode_from_reg(u8 reg)
277{
278 return !(reg & FAN_CTRL_DC_MODE);
279}
280
e53004e2
JD		 281static inline long temp_from_reg(u8 reg)
282{
7fe83ad8 283 return reg * 1000;
e53004e2
JD		 284}
285
286static inline u8 temp_to_reg(long val)
287{
86b2bbfd
JD		 288 if (val <= 0)
289 return 0;
290 if (val >= 1000 * 0xff)
291 return 0xff;
292 return (val + 500) / 1000;
e53004e2
JD		 293}
294
295/*
296 * Device I/O access
297 */
298
7f999aa7 299/* Must be called with data->update_lock held, except during initialization */
e53004e2
JD		 300static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
301{
e53004e2 302 outb(reg, data->addr + ADDR_REG_OFFSET);
7f999aa7 303 return inb(data->addr + DATA_REG_OFFSET);
e53004e2
JD		 304}
305
7f999aa7 306/* Must be called with data->update_lock held, except during initialization */
e53004e2
JD		 307static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
308{
e53004e2
JD		 309 outb(reg, data->addr + ADDR_REG_OFFSET);
310 outb(val, data->addr + DATA_REG_OFFSET);
e53004e2
JD		 311}
312
2fff0840
GR		 313/*
314 * It is important to read the MSB first, because doing so latches the
315 * value of the LSB, so we are sure both bytes belong to the same value.
316 * Must be called with data->update_lock held, except during initialization
317 */
e53004e2
JD		 318static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
319{
320 u16 val;
321
e53004e2
JD		 322 outb(reg, data->addr + ADDR_REG_OFFSET);
323 val = inb(data->addr + DATA_REG_OFFSET) << 8;
324 outb(++reg, data->addr + ADDR_REG_OFFSET);
325 val |= inb(data->addr + DATA_REG_OFFSET);
e53004e2
JD		 326
327 return val;
328}
329
7f999aa7 330/* Must be called with data->update_lock held, except during initialization */
e53004e2
JD		 331static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
332{
e53004e2
JD		 333 outb(reg, data->addr + ADDR_REG_OFFSET);
334 outb(val >> 8, data->addr + DATA_REG_OFFSET);
335 outb(++reg, data->addr + ADDR_REG_OFFSET);
336 outb(val & 0xff, data->addr + DATA_REG_OFFSET);
e53004e2
JD		 337}
338
339static struct f71805f_data *f71805f_update_device(struct device *dev)
340{
341 struct f71805f_data *data = dev_get_drvdata(dev);
aba5073d 342 int nr, apnr;
e53004e2 343
f0819184 344 mutex_lock(&data->update_lock);
e53004e2
JD		 345
346 /* Limit registers cache is refreshed after 60 seconds */
347 if (time_after(jiffies, data->last_updated + 60 * HZ)
348 || !data->valid) {
51c997d8
JD		 349 for (nr = 0; nr < 11; nr++) {
350 if (!(data->has_in & (1 << nr)))
351 continue;
e53004e2
JD		 352 data->in_high[nr] = f71805f_read8(data,
353 F71805F_REG_IN_HIGH(nr));
354 data->in_low[nr] = f71805f_read8(data,
355 F71805F_REG_IN_LOW(nr));
356 }
357 for (nr = 0; nr < 3; nr++) {
6b14a546
JD		 358 data->fan_low[nr] = f71805f_read16(data,
359 F71805F_REG_FAN_LOW(nr));
315c7113
JD		 360 data->fan_target[nr] = f71805f_read16(data,
361 F71805F_REG_FAN_TARGET(nr));
6e2bc17b
JD		 362 data->pwm_freq[nr] = f71805f_read8(data,
363 F71805F_REG_PWM_FREQ(nr));
e53004e2
JD		 364 }
365 for (nr = 0; nr < 3; nr++) {
366 data->temp_high[nr] = f71805f_read8(data,
367 F71805F_REG_TEMP_HIGH(nr));
368 data->temp_hyst[nr] = f71805f_read8(data,
369 F71805F_REG_TEMP_HYST(nr));
370 }
371 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
aba5073d
PE		 372 for (nr = 0; nr < 3; nr++) {
373 for (apnr = 0; apnr < 3; apnr++) {
374 data->auto_points[nr].temp[apnr] =
375 f71805f_read8(data,
376 F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
377 apnr));
378 data->auto_points[nr].fan[apnr] =
379 f71805f_read16(data,
380 F71805F_REG_PWM_AUTO_POINT_FAN(nr,
381 apnr));
382 }
383 }
e53004e2
JD		 384
385 data->last_limits = jiffies;
386 }
387
388 /* Measurement registers cache is refreshed after 1 second */
389 if (time_after(jiffies, data->last_updated + HZ)
390 || !data->valid) {
51c997d8
JD		 391 for (nr = 0; nr < 11; nr++) {
392 if (!(data->has_in & (1 << nr)))
393 continue;
e53004e2
JD		 394 data->in[nr] = f71805f_read8(data,
395 F71805F_REG_IN(nr));
396 }
397 for (nr = 0; nr < 3; nr++) {
6b14a546
JD		 398 data->fan[nr] = f71805f_read16(data,
399 F71805F_REG_FAN(nr));
95e35312
JD		 400 data->fan_ctrl[nr] = f71805f_read8(data,
401 F71805F_REG_FAN_CTRL(nr));
402 data->pwm[nr] = f71805f_read8(data,
403 F71805F_REG_PWM_DUTY(nr));
e53004e2
JD		 404 }
405 for (nr = 0; nr < 3; nr++) {
406 data->temp[nr] = f71805f_read8(data,
407 F71805F_REG_TEMP(nr));
408 }
2d45771e
JD		 409 data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
410 + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
411 + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
e53004e2
JD		 412
413 data->last_updated = jiffies;
414 data->valid = 1;
415 }
416
f0819184 417 mutex_unlock(&data->update_lock);
e53004e2
JD		 418
419 return data;
420}
421
422/*
423 * Sysfs interface
424 */
425
426static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
427 char *buf)
428{
429 struct f71805f_data *data = f71805f_update_device(dev);
51c997d8
JD		 430 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
431 int nr = attr->index;
e53004e2 432
51c997d8 433 return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
e53004e2
JD		 434}
435
436static ssize_t show_in0_max(struct device *dev, struct device_attribute
437 *devattr, char *buf)
438{
439 struct f71805f_data *data = f71805f_update_device(dev);
51c997d8
JD		 440 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
441 int nr = attr->index;
e53004e2 442
51c997d8 443 return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
e53004e2
JD		 444}
445
446static ssize_t show_in0_min(struct device *dev, struct device_attribute
447 *devattr, char *buf)
448{
449 struct f71805f_data *data = f71805f_update_device(dev);
51c997d8
JD		 450 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
451 int nr = attr->index;
e53004e2 452
51c997d8 453 return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
e53004e2
JD		 454}
455
456static ssize_t set_in0_max(struct device *dev, struct device_attribute
457 *devattr, const char *buf, size_t count)
458{
459 struct f71805f_data *data = dev_get_drvdata(dev);
51c997d8
JD		 460 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
461 int nr = attr->index;
2fff0840
GR		 462 long val;
463 int err;
464
465 err = kstrtol(buf, 10, &val);
466 if (err)
467 return err;
e53004e2 468
f0819184 469 mutex_lock(&data->update_lock);
51c997d8
JD		 470 data->in_high[nr] = in0_to_reg(val);
471 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
f0819184 472 mutex_unlock(&data->update_lock);
e53004e2
JD		 473
474 return count;
475}
476
477static ssize_t set_in0_min(struct device *dev, struct device_attribute
478 *devattr, const char *buf, size_t count)
479{
480 struct f71805f_data *data = dev_get_drvdata(dev);
51c997d8
JD		 481 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
482 int nr = attr->index;
2fff0840
GR		 483 long val;
484 int err;
485
486 err = kstrtol(buf, 10, &val);
487 if (err)
488 return err;
e53004e2 489
f0819184 490 mutex_lock(&data->update_lock);
51c997d8
JD		 491 data->in_low[nr] = in0_to_reg(val);
492 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
f0819184 493 mutex_unlock(&data->update_lock);
e53004e2
JD		 494
495 return count;
496}
497
e53004e2
JD		 498static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
499 char *buf)
500{
501 struct f71805f_data *data = f71805f_update_device(dev);
502 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
503 int nr = attr->index;
504
505 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
506}
507
508static ssize_t show_in_max(struct device *dev, struct device_attribute
509 *devattr, char *buf)
510{
511 struct f71805f_data *data = f71805f_update_device(dev);
512 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
513 int nr = attr->index;
514
515 return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
516}
517
518static ssize_t show_in_min(struct device *dev, struct device_attribute
519 *devattr, char *buf)
520{
521 struct f71805f_data *data = f71805f_update_device(dev);
522 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
523 int nr = attr->index;
524
525 return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
526}
527
528static ssize_t set_in_max(struct device *dev, struct device_attribute
529 *devattr, const char *buf, size_t count)
530{
531 struct f71805f_data *data = dev_get_drvdata(dev);
532 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
533 int nr = attr->index;
2fff0840
GR		 534 long val;
535 int err;
536
537 err = kstrtol(buf, 10, &val);
538 if (err)
539 return err;
e53004e2 540
f0819184 541 mutex_lock(&data->update_lock);
e53004e2
JD		 542 data->in_high[nr] = in_to_reg(val);
543 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
f0819184 544 mutex_unlock(&data->update_lock);
e53004e2
JD		 545
546 return count;
547}
548
549static ssize_t set_in_min(struct device *dev, struct device_attribute
550 *devattr, const char *buf, size_t count)
551{
552 struct f71805f_data *data = dev_get_drvdata(dev);
553 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
554 int nr = attr->index;
2fff0840
GR		 555 long val;
556 int err;
557
558 err = kstrtol(buf, 10, &val);
559 if (err)
560 return err;
e53004e2 561
f0819184 562 mutex_lock(&data->update_lock);
e53004e2
JD		 563 data->in_low[nr] = in_to_reg(val);
564 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
f0819184 565 mutex_unlock(&data->update_lock);
e53004e2
JD		 566
567 return count;
568}
569
e53004e2
JD		 570static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
571 char *buf)
572{
573 struct f71805f_data *data = f71805f_update_device(dev);
574 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
575 int nr = attr->index;
576
577 return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
578}
579
580static ssize_t show_fan_min(struct device *dev, struct device_attribute
581 *devattr, char *buf)
582{
583 struct f71805f_data *data = f71805f_update_device(dev);
584 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
585 int nr = attr->index;
586
587 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
588}
589
315c7113
JD		 590static ssize_t show_fan_target(struct device *dev, struct device_attribute
591 *devattr, char *buf)
592{
593 struct f71805f_data *data = f71805f_update_device(dev);
594 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
595 int nr = attr->index;
596
597 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
598}
599
e53004e2
JD		 600static ssize_t set_fan_min(struct device *dev, struct device_attribute
601 *devattr, const char *buf, size_t count)
602{
603 struct f71805f_data *data = dev_get_drvdata(dev);
604 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
605 int nr = attr->index;
2fff0840
GR		 606 long val;
607 int err;
608
609 err = kstrtol(buf, 10, &val);
610 if (err)
611 return err;
e53004e2 612
f0819184 613 mutex_lock(&data->update_lock);
e53004e2
JD		 614 data->fan_low[nr] = fan_to_reg(val);
615 f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
f0819184 616 mutex_unlock(&data->update_lock);
e53004e2
JD		 617
618 return count;
619}
620
315c7113
JD		 621static ssize_t set_fan_target(struct device *dev, struct device_attribute
622 *devattr, const char *buf, size_t count)
623{
624 struct f71805f_data *data = dev_get_drvdata(dev);
625 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
626 int nr = attr->index;
2fff0840
GR		 627 long val;
628 int err;
629
630 err = kstrtol(buf, 10, &val);
631 if (err)
632 return err;
315c7113
JD		 633
634 mutex_lock(&data->update_lock);
635 data->fan_target[nr] = fan_to_reg(val);
636 f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
637 data->fan_target[nr]);
638 mutex_unlock(&data->update_lock);
639
640 return count;
641}
642
95e35312
JD		 643static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
644 char *buf)
645{
646 struct f71805f_data *data = f71805f_update_device(dev);
647 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
648 int nr = attr->index;
649
650 return sprintf(buf, "%d\n", (int)data->pwm[nr]);
651}
652
653static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
654 *devattr, char *buf)
655{
656 struct f71805f_data *data = f71805f_update_device(dev);
657 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
658 int nr = attr->index;
659 int mode;
660
661 switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
662 case FAN_CTRL_MODE_SPEED:
663 mode = 3;
664 break;
665 case FAN_CTRL_MODE_TEMPERATURE:
666 mode = 2;
667 break;
668 default: /* MANUAL */
669 mode = 1;
670 }
671
672 return sprintf(buf, "%d\n", mode);
673}
674
6e2bc17b
JD		 675static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
676 *devattr, char *buf)
677{
678 struct f71805f_data *data = f71805f_update_device(dev);
679 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
680 int nr = attr->index;
681
682 return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
683}
684
e196783d
JD		 685static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
686 *devattr, char *buf)
687{
688 struct f71805f_data *data = f71805f_update_device(dev);
689 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
690 int nr = attr->index;
691
692 return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
693}
694
95e35312
JD		 695static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
696 const char *buf, size_t count)
697{
698 struct f71805f_data *data = dev_get_drvdata(dev);
699 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
700 int nr = attr->index;
2fff0840
GR		 701 unsigned long val;
702 int err;
703
704 err = kstrtoul(buf, 10, &val);
705 if (err)
706 return err;
95e35312
JD		 707
708 if (val > 255)
709 return -EINVAL;
710
711 mutex_lock(&data->update_lock);
712 data->pwm[nr] = val;
713 f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
714 mutex_unlock(&data->update_lock);
715
716 return count;
717}
718
719static struct attribute *f71805f_attr_pwm[];
720
721static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
722 *devattr, const char *buf, size_t count)
723{
724 struct f71805f_data *data = dev_get_drvdata(dev);
725 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
726 int nr = attr->index;
95e35312 727 u8 reg;
2fff0840
GR		 728 unsigned long val;
729 int err;
730
731 err = kstrtoul(buf, 10, &val);
732 if (err)
733 return err;
95e35312
JD		 734
735 if (val < 1 || val > 3)
736 return -EINVAL;
737
738 if (val > 1) { /* Automatic mode, user can't set PWM value */
739 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
740 S_IRUGO))
741 dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
742 }
743
744 mutex_lock(&data->update_lock);
745 reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
746 & ~FAN_CTRL_MODE_MASK;
747 switch (val) {
748 case 1:
749 reg |= FAN_CTRL_MODE_MANUAL;
750 break;
751 case 2:
752 reg |= FAN_CTRL_MODE_TEMPERATURE;
753 break;
754 case 3:
755 reg |= FAN_CTRL_MODE_SPEED;
756 break;
757 }
758 data->fan_ctrl[nr] = reg;
759 f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
760 mutex_unlock(&data->update_lock);
761
762 if (val == 1) { /* Manual mode, user can set PWM value */
763 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
764 S_IRUGO | S_IWUSR))
765 dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
766 }
767
768 return count;
769}
770
6e2bc17b
JD		 771static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
772 *devattr, const char *buf, size_t count)
773{
774 struct f71805f_data *data = dev_get_drvdata(dev);
775 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
776 int nr = attr->index;
2fff0840
GR		 777 unsigned long val;
778 int err;
779
780 err = kstrtoul(buf, 10, &val);
781 if (err)
782 return err;
6e2bc17b
JD		 783
784 mutex_lock(&data->update_lock);
785 data->pwm_freq[nr] = pwm_freq_to_reg(val);
786 f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
787 mutex_unlock(&data->update_lock);
788
789 return count;
790}
791
aba5073d
PE		 792static ssize_t show_pwm_auto_point_temp(struct device *dev,
793 struct device_attribute *devattr,
2fff0840 794 char *buf)
aba5073d
PE		 795{
796 struct f71805f_data *data = dev_get_drvdata(dev);
797 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
798 int pwmnr = attr->nr;
799 int apnr = attr->index;
800
801 return sprintf(buf, "%ld\n",
802 temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
803}
804
805static ssize_t set_pwm_auto_point_temp(struct device *dev,
806 struct device_attribute *devattr,
2fff0840 807 const char *buf, size_t count)
aba5073d
PE		 808{
809 struct f71805f_data *data = dev_get_drvdata(dev);
810 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
811 int pwmnr = attr->nr;
812 int apnr = attr->index;
2fff0840
GR		 813 unsigned long val;
814 int err;
815
816 err = kstrtoul(buf, 10, &val);
817 if (err)
818 return err;
aba5073d
PE		 819
820 mutex_lock(&data->update_lock);
821 data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
822 f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
823 data->auto_points[pwmnr].temp[apnr]);
824 mutex_unlock(&data->update_lock);
825
826 return count;
827}
828
829static ssize_t show_pwm_auto_point_fan(struct device *dev,
830 struct device_attribute *devattr,
2fff0840 831 char *buf)
aba5073d
PE		 832{
833 struct f71805f_data *data = dev_get_drvdata(dev);
834 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
835 int pwmnr = attr->nr;
836 int apnr = attr->index;
837
838 return sprintf(buf, "%ld\n",
839 fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
840}
841
842static ssize_t set_pwm_auto_point_fan(struct device *dev,
843 struct device_attribute *devattr,
2fff0840 844 const char *buf, size_t count)
aba5073d
PE		 845{
846 struct f71805f_data *data = dev_get_drvdata(dev);
847 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
848 int pwmnr = attr->nr;
849 int apnr = attr->index;
2fff0840
GR		 850 unsigned long val;
851 int err;
852
853 err = kstrtoul(buf, 10, &val);
854 if (err)
855 return err;
aba5073d
PE		 856
857 mutex_lock(&data->update_lock);
858 data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
859 f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
2fff0840 860 data->auto_points[pwmnr].fan[apnr]);
aba5073d
PE		 861 mutex_unlock(&data->update_lock);
862
863 return count;
864}
865
e53004e2
JD		 866static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
867 char *buf)
868{
869 struct f71805f_data *data = f71805f_update_device(dev);
870 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
871 int nr = attr->index;
872
873 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
874}
875
876static ssize_t show_temp_max(struct device *dev, struct device_attribute
877 *devattr, char *buf)
878{
879 struct f71805f_data *data = f71805f_update_device(dev);
880 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
881 int nr = attr->index;
882
883 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
884}
885
886static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
887 *devattr, char *buf)
888{
889 struct f71805f_data *data = f71805f_update_device(dev);
890 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
891 int nr = attr->index;
892
893 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
894}
895
896static ssize_t show_temp_type(struct device *dev, struct device_attribute
897 *devattr, char *buf)
898{
899 struct f71805f_data *data = f71805f_update_device(dev);
900 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
901 int nr = attr->index;
902
903 /* 3 is diode, 4 is thermistor */
904 return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
905}
906
907static ssize_t set_temp_max(struct device *dev, struct device_attribute
908 *devattr, const char *buf, size_t count)
909{
910 struct f71805f_data *data = dev_get_drvdata(dev);
911 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
912 int nr = attr->index;
2fff0840
GR		 913 long val;
914 int err;
915
916 err = kstrtol(buf, 10, &val);
917 if (err)
918 return err;
e53004e2 919
f0819184 920 mutex_lock(&data->update_lock);
e53004e2
JD		 921 data->temp_high[nr] = temp_to_reg(val);
922 f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
f0819184 923 mutex_unlock(&data->update_lock);
e53004e2
JD		 924
925 return count;
926}
927
928static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
929 *devattr, const char *buf, size_t count)
930{
931 struct f71805f_data *data = dev_get_drvdata(dev);
932 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
933 int nr = attr->index;
2fff0840
GR		 934 long val;
935 int err;
936
937 err = kstrtol(buf, 10, &val);
938 if (err)
939 return err;
e53004e2 940
f0819184 941 mutex_lock(&data->update_lock);
e53004e2
JD		 942 data->temp_hyst[nr] = temp_to_reg(val);
943 f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
f0819184 944 mutex_unlock(&data->update_lock);
e53004e2
JD		 945
946 return count;
947}
948
e53004e2
JD		 949static ssize_t show_alarms_in(struct device *dev, struct device_attribute
950 *devattr, char *buf)
951{
952 struct f71805f_data *data = f71805f_update_device(dev);
953
51c997d8 954 return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
e53004e2
JD		 955}
956
957static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
958 *devattr, char *buf)
959{
960 struct f71805f_data *data = f71805f_update_device(dev);
961
2d45771e 962 return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
e53004e2
JD		 963}
964
965static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
966 *devattr, char *buf)
967{
968 struct f71805f_data *data = f71805f_update_device(dev);
969
2d45771e
JD		 970 return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
971}
972
973static ssize_t show_alarm(struct device *dev, struct device_attribute
974 *devattr, char *buf)
975{
976 struct f71805f_data *data = f71805f_update_device(dev);
977 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
978 int bitnr = attr->index;
979
980 return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
e53004e2
JD		 981}
982
e53004e2
JD		 983static ssize_t show_name(struct device *dev, struct device_attribute
984 *devattr, char *buf)
985{
986 struct f71805f_data *data = dev_get_drvdata(dev);
987
988 return sprintf(buf, "%s\n", data->name);
989}
990
51c997d8 991static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
2fff0840 992static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
51c997d8 993 show_in0_max, set_in0_max, 0);
2fff0840 994static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
51c997d8 995 show_in0_min, set_in0_min, 0);
0e39e01c
JD		 996static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
997static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
998 show_in_max, set_in_max, 1);
999static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
1000 show_in_min, set_in_min, 1);
1001static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
1002static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
1003 show_in_max, set_in_max, 2);
1004static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
1005 show_in_min, set_in_min, 2);
1006static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
1007static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
1008 show_in_max, set_in_max, 3);
1009static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
1010 show_in_min, set_in_min, 3);
1011static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
1012static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
1013 show_in_max, set_in_max, 4);
1014static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
1015 show_in_min, set_in_min, 4);
1016static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
1017static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
1018 show_in_max, set_in_max, 5);
1019static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
1020 show_in_min, set_in_min, 5);
1021static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
1022static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
1023 show_in_max, set_in_max, 6);
1024static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
1025 show_in_min, set_in_min, 6);
1026static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
1027static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
1028 show_in_max, set_in_max, 7);
1029static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
1030 show_in_min, set_in_min, 7);
1031static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
1032static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
1033 show_in_max, set_in_max, 8);
1034static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
1035 show_in_min, set_in_min, 8);
51c997d8
JD		 1036static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
1037static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
1038 show_in0_max, set_in0_max, 9);
1039static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
1040 show_in0_min, set_in0_min, 9);
1041static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
1042static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
1043 show_in0_max, set_in0_max, 10);
1044static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
1045 show_in0_min, set_in0_min, 10);
0e39e01c
JD		 1046
1047static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
1048static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
1049 show_fan_min, set_fan_min, 0);
315c7113
JD		 1050static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
1051 show_fan_target, set_fan_target, 0);
0e39e01c
JD		 1052static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
1053static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
1054 show_fan_min, set_fan_min, 1);
315c7113
JD		 1055static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
1056 show_fan_target, set_fan_target, 1);
0e39e01c
JD		 1057static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
1058static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
1059 show_fan_min, set_fan_min, 2);
315c7113
JD		 1060static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
1061 show_fan_target, set_fan_target, 2);
0e39e01c
JD		 1062
1063static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
1064static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
1065 show_temp_max, set_temp_max, 0);
1066static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
1067 show_temp_hyst, set_temp_hyst, 0);
1068static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
1069static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
1070static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
1071 show_temp_max, set_temp_max, 1);
1072static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
1073 show_temp_hyst, set_temp_hyst, 1);
1074static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
1075static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
1076static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
1077 show_temp_max, set_temp_max, 2);
1078static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
1079 show_temp_hyst, set_temp_hyst, 2);
1080static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
1081
2fff0840
GR		 1082/*
1083 * pwm (value) files are created read-only, write permission is
1084 * then added or removed dynamically as needed
1085 */
95e35312
JD		 1086static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
1087static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1088 show_pwm_enable, set_pwm_enable, 0);
6e2bc17b
JD		 1089static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
1090 show_pwm_freq, set_pwm_freq, 0);
e196783d 1091static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
95e35312
JD		 1092static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
1093static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1094 show_pwm_enable, set_pwm_enable, 1);
6e2bc17b
JD		 1095static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
1096 show_pwm_freq, set_pwm_freq, 1);
e196783d 1097static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
95e35312
JD		 1098static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
1099static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1100 show_pwm_enable, set_pwm_enable, 2);
6e2bc17b
JD		 1101static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
1102 show_pwm_freq, set_pwm_freq, 2);
e196783d 1103static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
95e35312 1104
aba5073d
PE		 1105static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1106 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1107 0, 0);
1108static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
1109 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1110 0, 0);
1111static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1112 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1113 0, 1);
1114static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
1115 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1116 0, 1);
1117static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1118 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1119 0, 2);
1120static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
1121 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1122 0, 2);
1123
1124static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1125 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1126 1, 0);
1127static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
1128 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1129 1, 0);
1130static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1131 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1132 1, 1);
1133static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
1134 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1135 1, 1);
1136static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1137 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1138 1, 2);
1139static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
1140 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1141 1, 2);
1142
1143static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1144 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1145 2, 0);
1146static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
1147 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1148 2, 0);
1149static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1150 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1151 2, 1);
1152static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
1153 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1154 2, 1);
1155static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1156 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1157 2, 2);
1158static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
1159 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1160 2, 2);
1161
0e39e01c
JD		 1162static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1163static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1164static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1165static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1166static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1167static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1168static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1169static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1170static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
51c997d8
JD		 1171static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1172static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
0e39e01c
JD		 1173static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
1174static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
1175static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
1176static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
1177static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
1178static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
1179static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
1180static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
1181static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
1182
1183static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1184
1185static struct attribute *f71805f_attributes[] = {
51c997d8
JD		 1186 &sensor_dev_attr_in0_input.dev_attr.attr,
1187 &sensor_dev_attr_in0_max.dev_attr.attr,
1188 &sensor_dev_attr_in0_min.dev_attr.attr,
0e39e01c
JD		 1189 &sensor_dev_attr_in1_input.dev_attr.attr,
1190 &sensor_dev_attr_in1_max.dev_attr.attr,
1191 &sensor_dev_attr_in1_min.dev_attr.attr,
1192 &sensor_dev_attr_in2_input.dev_attr.attr,
1193 &sensor_dev_attr_in2_max.dev_attr.attr,
1194 &sensor_dev_attr_in2_min.dev_attr.attr,
1195 &sensor_dev_attr_in3_input.dev_attr.attr,
1196 &sensor_dev_attr_in3_max.dev_attr.attr,
1197 &sensor_dev_attr_in3_min.dev_attr.attr,
0e39e01c
JD		 1198 &sensor_dev_attr_in5_input.dev_attr.attr,
1199 &sensor_dev_attr_in5_max.dev_attr.attr,
1200 &sensor_dev_attr_in5_min.dev_attr.attr,
1201 &sensor_dev_attr_in6_input.dev_attr.attr,
1202 &sensor_dev_attr_in6_max.dev_attr.attr,
1203 &sensor_dev_attr_in6_min.dev_attr.attr,
1204 &sensor_dev_attr_in7_input.dev_attr.attr,
1205 &sensor_dev_attr_in7_max.dev_attr.attr,
1206 &sensor_dev_attr_in7_min.dev_attr.attr,
0e39e01c 1207
c7176cb5
JD		 1208 &sensor_dev_attr_fan1_input.dev_attr.attr,
1209 &sensor_dev_attr_fan1_min.dev_attr.attr,
1210 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1211 &sensor_dev_attr_fan1_target.dev_attr.attr,
1212 &sensor_dev_attr_fan2_input.dev_attr.attr,
1213 &sensor_dev_attr_fan2_min.dev_attr.attr,
1214 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1215 &sensor_dev_attr_fan2_target.dev_attr.attr,
1216 &sensor_dev_attr_fan3_input.dev_attr.attr,
1217 &sensor_dev_attr_fan3_min.dev_attr.attr,
1218 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1219 &sensor_dev_attr_fan3_target.dev_attr.attr,
1220
1221 &sensor_dev_attr_pwm1.dev_attr.attr,
1222 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1223 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
1224 &sensor_dev_attr_pwm2.dev_attr.attr,
1225 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1226 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
1227 &sensor_dev_attr_pwm3.dev_attr.attr,
1228 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1229 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
1230
0e39e01c
JD		 1231 &sensor_dev_attr_temp1_input.dev_attr.attr,
1232 &sensor_dev_attr_temp1_max.dev_attr.attr,
1233 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
1234 &sensor_dev_attr_temp1_type.dev_attr.attr,
1235 &sensor_dev_attr_temp2_input.dev_attr.attr,
1236 &sensor_dev_attr_temp2_max.dev_attr.attr,
1237 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
1238 &sensor_dev_attr_temp2_type.dev_attr.attr,
1239 &sensor_dev_attr_temp3_input.dev_attr.attr,
1240 &sensor_dev_attr_temp3_max.dev_attr.attr,
1241 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
1242 &sensor_dev_attr_temp3_type.dev_attr.attr,
1243
aba5073d
PE		 1244 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1245 &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
1246 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1247 &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
1248 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1249 &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
1250 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1251 &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
1252 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1253 &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
1254 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1255 &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
1256 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1257 &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
1258 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1259 &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
1260 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1261 &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
1262
0e39e01c
JD		 1263 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1264 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1265 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1266 &sensor_dev_attr_in3_alarm.dev_attr.attr,
0e39e01c
JD		 1267 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1268 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1269 &sensor_dev_attr_in7_alarm.dev_attr.attr,
0e39e01c
JD		 1270 &dev_attr_alarms_in.attr,
1271 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1272 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1273 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1274 &dev_attr_alarms_temp.attr,
1275 &dev_attr_alarms_fan.attr,
1276
1277 &dev_attr_name.attr,
1278 NULL
2488a39d
JD		 1279};
1280
0e39e01c
JD		 1281static const struct attribute_group f71805f_group = {
1282 .attrs = f71805f_attributes,
2488a39d
JD		 1283};
1284
51c997d8
JD		 1285static struct attribute *f71805f_attributes_optin[4][5] = {
1286 {
1287 &sensor_dev_attr_in4_input.dev_attr.attr,
1288 &sensor_dev_attr_in4_max.dev_attr.attr,
1289 &sensor_dev_attr_in4_min.dev_attr.attr,
1290 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1291 NULL
1292 }, {
1293 &sensor_dev_attr_in8_input.dev_attr.attr,
1294 &sensor_dev_attr_in8_max.dev_attr.attr,
1295 &sensor_dev_attr_in8_min.dev_attr.attr,
1296 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1297 NULL
1298 }, {
1299 &sensor_dev_attr_in9_input.dev_attr.attr,
1300 &sensor_dev_attr_in9_max.dev_attr.attr,
1301 &sensor_dev_attr_in9_min.dev_attr.attr,
1302 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1303 NULL
1304 }, {
1305 &sensor_dev_attr_in10_input.dev_attr.attr,
1306 &sensor_dev_attr_in10_max.dev_attr.attr,
1307 &sensor_dev_attr_in10_min.dev_attr.attr,
1308 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1309 NULL
1310 }
1311};
1312
1313static const struct attribute_group f71805f_group_optin[4] = {
1314 { .attrs = f71805f_attributes_optin[0] },
1315 { .attrs = f71805f_attributes_optin[1] },
1316 { .attrs = f71805f_attributes_optin[2] },
1317 { .attrs = f71805f_attributes_optin[3] },
1318};
1319
2fff0840
GR		 1320/*
1321 * We don't include pwm_freq files in the arrays above, because they must be
1322 * created conditionally (only if pwm_mode is 1 == PWM)
1323 */
e196783d
JD		 1324static struct attribute *f71805f_attributes_pwm_freq[] = {
1325 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1326 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1327 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1328 NULL
1329};
1330
1331static const struct attribute_group f71805f_group_pwm_freq = {
1332 .attrs = f71805f_attributes_pwm_freq,
1333};
1334
95e35312
JD		 1335/* We also need an indexed access to pwmN files to toggle writability */
1336static struct attribute *f71805f_attr_pwm[] = {
1337 &sensor_dev_attr_pwm1.dev_attr.attr,
1338 &sensor_dev_attr_pwm2.dev_attr.attr,
1339 &sensor_dev_attr_pwm3.dev_attr.attr,
1340};
1341
e53004e2
JD		 1342/*
1343 * Device registration and initialization
1344 */
1345
6c931ae1 1346static void f71805f_init_device(struct f71805f_data *data)
e53004e2
JD		 1347{
1348 u8 reg;
1349 int i;
1350
1351 reg = f71805f_read8(data, F71805F_REG_START);
1352 if ((reg & 0x41) != 0x01) {
692fe501 1353 pr_debug("Starting monitoring operations\n");
e53004e2
JD		 1354 f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
1355 }
1356
2fff0840
GR		 1357 /*
1358 * Fan monitoring can be disabled. If it is, we won't be polling
1359 * the register values, and won't create the related sysfs files.
1360 */
e53004e2 1361 for (i = 0; i < 3; i++) {
6b14a546
JD		 1362 data->fan_ctrl[i] = f71805f_read8(data,
1363 F71805F_REG_FAN_CTRL(i));
2fff0840
GR		 1364 /*
1365 * Clear latch full bit, else "speed mode" fan speed control
1366 * doesn't work
1367 */
315c7113
JD		 1368 if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
1369 data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
1370 f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
1371 data->fan_ctrl[i]);
1372 }
e53004e2
JD		 1373 }
1374}
1375
6c931ae1 1376static int f71805f_probe(struct platform_device *pdev)
e53004e2 1377{
51c997d8 1378 struct f71805f_sio_data *sio_data = pdev->dev.platform_data;
e53004e2
JD		 1379 struct f71805f_data *data;
1380 struct resource *res;
2488a39d 1381 int i, err;
e53004e2 1382
2fff0840 1383 static const char * const names[] = {
51c997d8
JD		 1384 "f71805f",
1385 "f71872f",
1386 };
1387
adc14132
GR		 1388 data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
1389 GFP_KERNEL);
2fff0840 1390 if (!data) {
e54c5ad6 1391 pr_err("Out of memory\n");
adc14132 1392 return -ENOMEM;
e53004e2
JD		 1393 }
1394
1395 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
adc14132
GR		 1396 if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
1397 DRVNAME)) {
ce7ee4e8
JD		 1398 dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
1399 (unsigned long)(res->start + ADDR_REG_OFFSET),
1400 (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
adc14132 1401 return -EBUSY;
ce7ee4e8 1402 }
e53004e2 1403 data->addr = res->start;
51c997d8 1404 data->name = names[sio_data->kind];
f0819184 1405 mutex_init(&data->update_lock);
e53004e2
JD		 1406
1407 platform_set_drvdata(pdev, data);
1408
51c997d8
JD		 1409 /* Some voltage inputs depend on chip model and configuration */
1410 switch (sio_data->kind) {
1411 case f71805f:
1412 data->has_in = 0x1ff;
1413 break;
1414 case f71872f:
1415 data->has_in = 0x6ef;
1416 if (sio_data->fnsel1 & 0x01)
1417 data->has_in |= (1 << 4); /* in4 */
1418 if (sio_data->fnsel1 & 0x02)
1419 data->has_in |= (1 << 8); /* in8 */
1420 break;
1421 }
1422
e53004e2
JD		 1423 /* Initialize the F71805F chip */
1424 f71805f_init_device(data);
1425
1426 /* Register sysfs interface files */
2fff0840
GR		 1427 err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
1428 if (err)
adc14132 1429 return err;
51c997d8 1430 if (data->has_in & (1 << 4)) { /* in4 */
2fff0840
GR		 1431 err = sysfs_create_group(&pdev->dev.kobj,
1432 &f71805f_group_optin[0]);
1433 if (err)
51c997d8
JD		 1434 goto exit_remove_files;
1435 }
1436 if (data->has_in & (1 << 8)) { /* in8 */
2fff0840
GR		 1437 err = sysfs_create_group(&pdev->dev.kobj,
1438 &f71805f_group_optin[1]);
1439 if (err)
51c997d8
JD		 1440 goto exit_remove_files;
1441 }
1442 if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
2fff0840
GR		 1443 err = sysfs_create_group(&pdev->dev.kobj,
1444 &f71805f_group_optin[2]);
1445 if (err)
51c997d8
JD		 1446 goto exit_remove_files;
1447 }
1448 if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
2fff0840
GR		 1449 err = sysfs_create_group(&pdev->dev.kobj,
1450 &f71805f_group_optin[3]);
1451 if (err)
51c997d8
JD		 1452 goto exit_remove_files;
1453 }
0e39e01c 1454 for (i = 0; i < 3; i++) {
e196783d
JD		 1455 /* If control mode is PWM, create pwm_freq file */
1456 if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
2fff0840
GR		 1457 err = sysfs_create_file(&pdev->dev.kobj,
1458 f71805f_attributes_pwm_freq[i]);
1459 if (err)
e196783d
JD		 1460 goto exit_remove_files;
1461 }
95e35312
JD		 1462 /* If PWM is in manual mode, add write permission */
1463 if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
2fff0840
GR		 1464 err = sysfs_chmod_file(&pdev->dev.kobj,
1465 f71805f_attr_pwm[i],
1466 S_IRUGO | S_IWUSR);
1467 if (err) {
95e35312
JD		 1468 dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
1469 i + 1);
1470 goto exit_remove_files;
1471 }
1472 }
0e39e01c
JD		 1473 }
1474
1beeffe4
TJ		 1475 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1476 if (IS_ERR(data->hwmon_dev)) {
1477 err = PTR_ERR(data->hwmon_dev);
0e39e01c
JD		 1478 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1479 goto exit_remove_files;
e53004e2 1480 }
e53004e2
JD		 1481
1482 return 0;
1483
0e39e01c
JD		 1484exit_remove_files:
1485 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
51c997d8
JD		 1486 for (i = 0; i < 4; i++)
1487 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
e196783d 1488 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
e53004e2
JD		 1489 return err;
1490}
1491
281dfd0b 1492static int f71805f_remove(struct platform_device *pdev)
e53004e2
JD		 1493{
1494 struct f71805f_data *data = platform_get_drvdata(pdev);
0e39e01c 1495 int i;
e53004e2 1496
1beeffe4 1497 hwmon_device_unregister(data->hwmon_dev);
0e39e01c 1498 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
51c997d8
JD		 1499 for (i = 0; i < 4; i++)
1500 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
e196783d 1501 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
ce7ee4e8 1502
e53004e2
JD		 1503 return 0;
1504}
1505
1506static struct platform_driver f71805f_driver = {
1507 .driver = {
1508 .owner = THIS_MODULE,
1509 .name = DRVNAME,
1510 },
1511 .probe = f71805f_probe,
9e5e9b7a 1512 .remove = f71805f_remove,
e53004e2
JD		 1513};
1514
51c997d8
JD		 1515static int __init f71805f_device_add(unsigned short address,
1516 const struct f71805f_sio_data *sio_data)
e53004e2 1517{
568825c8
JD		 1518 struct resource res = {
1519 .start = address,
1520 .end = address + REGION_LENGTH - 1,
1521 .flags = IORESOURCE_IO,
1522 };
e53004e2
JD		 1523 int err;
1524
1525 pdev = platform_device_alloc(DRVNAME, address);
1526 if (!pdev) {
1527 err = -ENOMEM;
e54c5ad6 1528 pr_err("Device allocation failed\n");
e53004e2
JD		 1529 goto exit;
1530 }
1531
568825c8 1532 res.name = pdev->name;
b9acb64a
JD		 1533 err = acpi_check_resource_conflict(&res);
1534 if (err)
1535 goto exit_device_put;
1536
568825c8 1537 err = platform_device_add_resources(pdev, &res, 1);
e53004e2 1538 if (err) {
e54c5ad6 1539 pr_err("Device resource addition failed (%d)\n", err);
e53004e2
JD		 1540 goto exit_device_put;
1541 }
1542
2df6d811
JD		 1543 err = platform_device_add_data(pdev, sio_data,
1544 sizeof(struct f71805f_sio_data));
1545 if (err) {
e54c5ad6 1546 pr_err("Platform data allocation failed\n");
51c997d8
JD		 1547 goto exit_device_put;
1548 }
51c997d8 1549
e53004e2
JD		 1550 err = platform_device_add(pdev);
1551 if (err) {
e54c5ad6 1552 pr_err("Device addition failed (%d)\n", err);
a117dddf 1553 goto exit_device_put;
e53004e2
JD		 1554 }
1555
1556 return 0;
1557
1558exit_device_put:
1559 platform_device_put(pdev);
1560exit:
1561 return err;
1562}
1563
51c997d8
JD		 1564static int __init f71805f_find(int sioaddr, unsigned short *address,
1565 struct f71805f_sio_data *sio_data)
e53004e2
JD		 1566{
1567 int err = -ENODEV;
1568 u16 devid;
1569
2fff0840 1570 static const char * const names[] = {
51c997d8 1571 "F71805F/FG",
9cab0217 1572 "F71872F/FG or F71806F/FG",
51c997d8
JD		 1573 };
1574
e53004e2
JD		 1575 superio_enter(sioaddr);
1576
1577 devid = superio_inw(sioaddr, SIO_REG_MANID);
1578 if (devid != SIO_FINTEK_ID)
1579 goto exit;
1580
67b671bc 1581 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
51c997d8
JD		 1582 switch (devid) {
1583 case SIO_F71805F_ID:
1584 sio_data->kind = f71805f;
1585 break;
1586 case SIO_F71872F_ID:
1587 sio_data->kind = f71872f;
1588 sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
1589 break;
1590 default:
e54c5ad6 1591 pr_info("Unsupported Fintek device, skipping\n");
e53004e2
JD		 1592 goto exit;
1593 }
1594
1595 superio_select(sioaddr, F71805F_LD_HWM);
1596 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
e54c5ad6 1597 pr_warn("Device not activated, skipping\n");
e53004e2
JD		 1598 goto exit;
1599 }
1600
1601 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1602 if (*address == 0) {
e54c5ad6 1603 pr_warn("Base address not set, skipping\n");
e53004e2
JD		 1604 goto exit;
1605 }
75c99029 1606 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
e53004e2
JD		 1607
1608 err = 0;
e54c5ad6
JP		 1609 pr_info("Found %s chip at %#x, revision %u\n",
1610 names[sio_data->kind], *address,
1611 superio_inb(sioaddr, SIO_REG_DEVREV));
e53004e2
JD		 1612
1613exit:
1614 superio_exit(sioaddr);
1615 return err;
1616}
1617
1618static int __init f71805f_init(void)
1619{
1620 int err;
1621 unsigned short address;
51c997d8 1622 struct f71805f_sio_data sio_data;
e53004e2 1623
51c997d8
JD		 1624 if (f71805f_find(0x2e, &address, &sio_data)
1625 && f71805f_find(0x4e, &address, &sio_data))
e53004e2
JD		 1626 return -ENODEV;
1627
1628 err = platform_driver_register(&f71805f_driver);
1629 if (err)
1630 goto exit;
1631
1632 /* Sets global pdev as a side effect */
51c997d8 1633 err = f71805f_device_add(address, &sio_data);
e53004e2
JD		 1634 if (err)
1635 goto exit_driver;
1636
1637 return 0;
1638
1639exit_driver:
1640 platform_driver_unregister(&f71805f_driver);
1641exit:
1642 return err;
1643}
1644
1645static void __exit f71805f_exit(void)
1646{
1647 platform_device_unregister(pdev);
1648 platform_driver_unregister(&f71805f_driver);
1649}
1650
1651MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
1652MODULE_LICENSE("GPL");
51c997d8 1653MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
e53004e2
JD		 1654
1655module_init(f71805f_init);
1656module_exit(f71805f_exit);
kernel source for telekom puls (alcatel/mediatek)