[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpio / gpio-sx150x.c

/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
 * 02110-1301, USA.
 */
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/slab.h>
#include <linux/workqueue.h>
#include <linux/i2c/sx150x.h>

#define NO_UPDATE_PENDING	-1

struct sx150x_device_data {
	u8 reg_pullup;
	u8 reg_pulldn;
	u8 reg_drain;
	u8 reg_polarity;
	u8 reg_dir;
	u8 reg_data;
	u8 reg_irq_mask;
	u8 reg_irq_src;
	u8 reg_sense;
	u8 reg_clock;
	u8 reg_misc;
	u8 reg_reset;
	u8 ngpios;
};

struct sx150x_chip {
	struct gpio_chip                 gpio_chip;
	struct i2c_client               *client;
	const struct sx150x_device_data *dev_cfg;
	int                              irq_summary;
	int                              irq_base;
	int				 irq_update;
	u32                              irq_sense;
	u32				 irq_masked;
	u32				 dev_sense;
	u32				 dev_masked;
	struct irq_chip                  irq_chip;
	struct mutex                     lock;
};

static const struct sx150x_device_data sx150x_devices[] = {
	[0] = { /* sx1508q */
		.reg_pullup   = 0x03,
		.reg_pulldn   = 0x04,
		.reg_drain    = 0x05,
		.reg_polarity = 0x06,
		.reg_dir      = 0x07,
		.reg_data     = 0x08,
		.reg_irq_mask = 0x09,
		.reg_irq_src  = 0x0c,
		.reg_sense    = 0x0b,
		.reg_clock    = 0x0f,
		.reg_misc     = 0x10,
		.reg_reset    = 0x7d,
		.ngpios       = 8
	},
	[1] = { /* sx1509q */
		.reg_pullup   = 0x07,
		.reg_pulldn   = 0x09,
		.reg_drain    = 0x0b,
		.reg_polarity = 0x0d,
		.reg_dir      = 0x0f,
		.reg_data     = 0x11,
		.reg_irq_mask = 0x13,
		.reg_irq_src  = 0x19,
		.reg_sense    = 0x17,
		.reg_clock    = 0x1e,
		.reg_misc     = 0x1f,
		.reg_reset    = 0x7d,
		.ngpios       = 16
	},
};

static const struct i2c_device_id sx150x_id[] = {
	{"sx1508q", 0},
	{"sx1509q", 1},
	{}
};
MODULE_DEVICE_TABLE(i2c, sx150x_id);

static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
{
	s32 err = i2c_smbus_write_byte_data(client, reg, val);

	if (err < 0)
		dev_warn(&client->dev,
			"i2c write fail: can't write %02x to %02x: %d\n",
			val, reg, err);
	return err;
}

static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
{
	s32 err = i2c_smbus_read_byte_data(client, reg);

	if (err >= 0)
		*val = err;
	else
		dev_warn(&client->dev,
			"i2c read fail: can't read from %02x: %d\n",
			reg, err);
	return err;
}

static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
{
	return (chip->dev_cfg->ngpios == offset);
}

/*
 * These utility functions solve the common problem of locating and setting
 * configuration bits.  Configuration bits are grouped into registers
 * whose indexes increase downwards.  For example, with eight-bit registers,
 * sixteen gpios would have their config bits grouped in the following order:
 * REGISTER N-1 [ f e d c b a 9 8 ]
 *          N   [ 7 6 5 4 3 2 1 0 ]
 *
 * For multi-bit configurations, the pattern gets wider:
 * REGISTER N-3 [ f f e e d d c c ]
 *          N-2 [ b b a a 9 9 8 8 ]
 *          N-1 [ 7 7 6 6 5 5 4 4 ]
 *          N   [ 3 3 2 2 1 1 0 0 ]
 *
 * Given the address of the starting register 'N', the index of the gpio
 * whose configuration we seek to change, and the width in bits of that
 * configuration, these functions allow us to locate the correct
 * register and mask the correct bits.
 */
static inline void sx150x_find_cfg(u8 offset, u8 width,
				u8 *reg, u8 *mask, u8 *shift)
{
	*reg   -= offset * width / 8;
	*mask   = (1 << width) - 1;
	*shift  = (offset * width) % 8;
	*mask <<= *shift;
}

static s32 sx150x_write_cfg(struct sx150x_chip *chip,
			u8 offset, u8 width, u8 reg, u8 val)
{
	u8  mask;
	u8  data;
	u8  shift;
	s32 err;

	sx150x_find_cfg(offset, width, &reg, &mask, &shift);
	err = sx150x_i2c_read(chip->client, reg, &data);
	if (err < 0)
		return err;

	data &= ~mask;
	data |= (val << shift) & mask;
	return sx150x_i2c_write(chip->client, reg, data);
}

static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
{
	u8  reg = chip->dev_cfg->reg_data;
	u8  mask;
	u8  data;
	u8  shift;
	s32 err;

	sx150x_find_cfg(offset, 1, &reg, &mask, &shift);
	err = sx150x_i2c_read(chip->client, reg, &data);
	if (err >= 0)
		err = (data & mask) != 0 ? 1 : 0;

	return err;
}

static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
{
	sx150x_i2c_write(chip->client,
			chip->dev_cfg->reg_clock,
			(val ? 0x1f : 0x10));
}

static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
{
	sx150x_write_cfg(chip,
			offset,
			1,
			chip->dev_cfg->reg_data,
			(val ? 1 : 0));
}

static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
{
	return sx150x_write_cfg(chip,
				offset,
				1,
				chip->dev_cfg->reg_dir,
				1);
}

static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
{
	int err;

	err = sx150x_write_cfg(chip,
			offset,
			1,
			chip->dev_cfg->reg_data,
			(val ? 1 : 0));
	if (err >= 0)
		err = sx150x_write_cfg(chip,
				offset,
				1,
				chip->dev_cfg->reg_dir,
				0);
	return err;
}

static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
{
	struct sx150x_chip *chip;
	int status = -EINVAL;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	if (!offset_is_oscio(chip, offset)) {
		mutex_lock(&chip->lock);
		status = sx150x_get_io(chip, offset);
		mutex_unlock(&chip->lock);
	}

	return status;
}

static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
{
	struct sx150x_chip *chip;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	mutex_lock(&chip->lock);
	if (offset_is_oscio(chip, offset))
		sx150x_set_oscio(chip, val);
	else
		sx150x_set_io(chip, offset, val);
	mutex_unlock(&chip->lock);
}

static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
{
	struct sx150x_chip *chip;
	int status = -EINVAL;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	if (!offset_is_oscio(chip, offset)) {
		mutex_lock(&chip->lock);
		status = sx150x_io_input(chip, offset);
		mutex_unlock(&chip->lock);
	}
	return status;
}

static int sx150x_gpio_direction_output(struct gpio_chip *gc,
					unsigned offset,
					int val)
{
	struct sx150x_chip *chip;
	int status = 0;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	if (!offset_is_oscio(chip, offset)) {
		mutex_lock(&chip->lock);
		status = sx150x_io_output(chip, offset, val);
		mutex_unlock(&chip->lock);
	}
	return status;
}

static int sx150x_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
{
	struct sx150x_chip *chip;

	chip = container_of(gc, struct sx150x_chip, gpio_chip);

	if (offset >= chip->dev_cfg->ngpios)
		return -EINVAL;

	if (chip->irq_base < 0)
		return -EINVAL;

	return chip->irq_base + offset;
}

static void sx150x_irq_mask(struct irq_data *d)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
	unsigned n;

	n = d->irq - chip->irq_base;
	chip->irq_masked |= (1 << n);
	chip->irq_update = n;
}

static void sx150x_irq_unmask(struct irq_data *d)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
	unsigned n;

	n = d->irq - chip->irq_base;
	chip->irq_masked &= ~(1 << n);
	chip->irq_update = n;
}

static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
	unsigned n, val = 0;

	if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
		return -EINVAL;

	n = d->irq - chip->irq_base;

	if (flow_type & IRQ_TYPE_EDGE_RISING)
		val |= 0x1;
	if (flow_type & IRQ_TYPE_EDGE_FALLING)
		val |= 0x2;

	chip->irq_sense &= ~(3UL << (n * 2));
	chip->irq_sense |= val << (n * 2);
	chip->irq_update = n;
	return 0;
}

static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
{
	struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
	unsigned nhandled = 0;
	unsigned sub_irq;
	unsigned n;
	s32 err;
	u8 val;
	int i;

	for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
		err = sx150x_i2c_read(chip->client,
				      chip->dev_cfg->reg_irq_src - i,
				      &val);
		if (err < 0)
			continue;

		sx150x_i2c_write(chip->client,
				chip->dev_cfg->reg_irq_src - i,
				val);
		for (n = 0; n < 8; ++n) {
			if (val & (1 << n)) {
				sub_irq = chip->irq_base + (i * 8) + n;
				handle_nested_irq(sub_irq);
				++nhandled;
			}
		}
	}

	return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
}

static void sx150x_irq_bus_lock(struct irq_data *d)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);

	mutex_lock(&chip->lock);
}

static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
{
	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
	unsigned n;

	if (chip->irq_update == NO_UPDATE_PENDING)
		goto out;

	n = chip->irq_update;
	chip->irq_update = NO_UPDATE_PENDING;

	/* Avoid updates if nothing changed */
	if (chip->dev_sense == chip->irq_sense &&
	    chip->dev_sense == chip->irq_masked)
		goto out;

	chip->dev_sense = chip->irq_sense;
	chip->dev_masked = chip->irq_masked;

	if (chip->irq_masked & (1 << n)) {
		sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
		sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
	} else {
		sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
		sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
				 chip->irq_sense >> (n * 2));
	}
out:
	mutex_unlock(&chip->lock);
}

static void sx150x_init_chip(struct sx150x_chip *chip,
			struct i2c_client *client,
			kernel_ulong_t driver_data,
			struct sx150x_platform_data *pdata)
{
	mutex_init(&chip->lock);

	chip->client                     = client;
	chip->dev_cfg                    = &sx150x_devices[driver_data];
	chip->gpio_chip.label            = client->name;
	chip->gpio_chip.direction_input  = sx150x_gpio_direction_input;
	chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
	chip->gpio_chip.get              = sx150x_gpio_get;
	chip->gpio_chip.set              = sx150x_gpio_set;
	chip->gpio_chip.to_irq           = sx150x_gpio_to_irq;
	chip->gpio_chip.base             = pdata->gpio_base;
	chip->gpio_chip.can_sleep        = 1;
	chip->gpio_chip.ngpio            = chip->dev_cfg->ngpios;
	if (pdata->oscio_is_gpo)
		++chip->gpio_chip.ngpio;

	chip->irq_chip.name                = client->name;
	chip->irq_chip.irq_mask            = sx150x_irq_mask;
	chip->irq_chip.irq_unmask          = sx150x_irq_unmask;
	chip->irq_chip.irq_set_type        = sx150x_irq_set_type;
	chip->irq_chip.irq_bus_lock        = sx150x_irq_bus_lock;
	chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
	chip->irq_summary                  = -1;
	chip->irq_base                     = -1;
	chip->irq_masked                   = ~0;
	chip->irq_sense                    = 0;
	chip->dev_masked                   = ~0;
	chip->dev_sense                    = 0;
	chip->irq_update		   = NO_UPDATE_PENDING;
}

static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
{
	int err = 0;
	unsigned n;

	for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
		err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
	return err;
}

static int sx150x_reset(struct sx150x_chip *chip)
{
	int err;

	err = i2c_smbus_write_byte_data(chip->client,
					chip->dev_cfg->reg_reset,
					0x12);
	if (err < 0)
		return err;

	err = i2c_smbus_write_byte_data(chip->client,
					chip->dev_cfg->reg_reset,
					0x34);
	return err;
}

static int sx150x_init_hw(struct sx150x_chip *chip,
			struct sx150x_platform_data *pdata)
{
	int err = 0;

	if (pdata->reset_during_probe) {
		err = sx150x_reset(chip);
		if (err < 0)
			return err;
	}

	err = sx150x_i2c_write(chip->client,
			chip->dev_cfg->reg_misc,
			0x01);
	if (err < 0)
		return err;

	err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
			pdata->io_pullup_ena);
	if (err < 0)
		return err;

	err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
			pdata->io_pulldn_ena);
	if (err < 0)
		return err;

	err = sx150x_init_io(chip, chip->dev_cfg->reg_drain,
			pdata->io_open_drain_ena);
	if (err < 0)
		return err;

	err = sx150x_init_io(chip, chip->dev_cfg->reg_polarity,
			pdata->io_polarity);
	if (err < 0)
		return err;

	if (pdata->oscio_is_gpo)
		sx150x_set_oscio(chip, 0);

	return err;
}

static int sx150x_install_irq_chip(struct sx150x_chip *chip,
				int irq_summary,
				int irq_base)
{
	int err;
	unsigned n;
	unsigned irq;

	chip->irq_summary = irq_summary;
	chip->irq_base    = irq_base;

	for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
		irq = irq_base + n;
		irq_set_chip_data(irq, chip);
		irq_set_chip_and_handler(irq, &chip->irq_chip, handle_edge_irq);
		irq_set_nested_thread(irq, 1);
#ifdef CONFIG_ARM
		set_irq_flags(irq, IRQF_VALID);
#else
		irq_set_noprobe(irq);
#endif
	}

	err = request_threaded_irq(irq_summary,
				NULL,
				sx150x_irq_thread_fn,
				IRQF_SHARED | IRQF_TRIGGER_FALLING,
				chip->irq_chip.name,
				chip);
	if (err < 0) {
		chip->irq_summary = -1;
		chip->irq_base    = -1;
	}

	return err;
}

static void sx150x_remove_irq_chip(struct sx150x_chip *chip)
{
	unsigned n;
	unsigned irq;

	free_irq(chip->irq_summary, chip);

	for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
		irq = chip->irq_base + n;
		irq_set_chip_and_handler(irq, NULL, NULL);
	}
}

static int sx150x_probe(struct i2c_client *client,
				const struct i2c_device_id *id)
{
	static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
				     I2C_FUNC_SMBUS_WRITE_WORD_DATA;
	struct sx150x_platform_data *pdata;
	struct sx150x_chip *chip;
	int rc;

	pdata = client->dev.platform_data;
	if (!pdata)
		return -EINVAL;

	if (!i2c_check_functionality(client->adapter, i2c_funcs))
		return -ENOSYS;

	chip = kzalloc(sizeof(struct sx150x_chip), GFP_KERNEL);
	if (!chip)
		return -ENOMEM;

	sx150x_init_chip(chip, client, id->driver_data, pdata);
	rc = sx150x_init_hw(chip, pdata);
	if (rc < 0)
		goto probe_fail_pre_gpiochip_add;

	rc = gpiochip_add(&chip->gpio_chip);
	if (rc < 0)
		goto probe_fail_pre_gpiochip_add;

	if (pdata->irq_summary >= 0) {
		rc = sx150x_install_irq_chip(chip,
					pdata->irq_summary,
					pdata->irq_base);
		if (rc < 0)
			goto probe_fail_post_gpiochip_add;
	}

	i2c_set_clientdata(client, chip);

	return 0;
probe_fail_post_gpiochip_add:
	WARN_ON(gpiochip_remove(&chip->gpio_chip) < 0);
probe_fail_pre_gpiochip_add:
	kfree(chip);
	return rc;
}

static int sx150x_remove(struct i2c_client *client)
{
	struct sx150x_chip *chip;
	int rc;

	chip = i2c_get_clientdata(client);
	rc = gpiochip_remove(&chip->gpio_chip);
	if (rc < 0)
		return rc;

	if (chip->irq_summary >= 0)
		sx150x_remove_irq_chip(chip);

	kfree(chip);

	return 0;
}

static struct i2c_driver sx150x_driver = {
	.driver = {
		.name = "sx150x",
		.owner = THIS_MODULE
	},
	.probe    = sx150x_probe,
	.remove   = sx150x_remove,
	.id_table = sx150x_id,
};

static int __init sx150x_init(void)
{
	return i2c_add_driver(&sx150x_driver);
}
subsys_initcall(sx150x_init);

static void __exit sx150x_exit(void)
{
	return i2c_del_driver(&sx150x_driver);
}
module_exit(sx150x_exit);

MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("i2c:sx150x");
Commit	Line	Data
c34f16b7 GB	1	/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
	2	*
	3	* This program is free software; you can redistribute it and/or modify
	4	* it under the terms of the GNU General Public License version 2 and
	5	* only version 2 as published by the Free Software Foundation.
	6	*
	7	* This program is distributed in the hope that it will be useful,
	8	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	9	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	10	* GNU General Public License for more details.
	11	*
	12	* You should have received a copy of the GNU General Public License
	13	* along with this program; if not, write to the Free Software
	14	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
	15	* 02110-1301, USA.
	16	*/
	17	#include <linux/gpio.h>
	18	#include <linux/i2c.h>
	19	#include <linux/init.h>
	20	#include <linux/interrupt.h>
	21	#include <linux/irq.h>
	22	#include <linux/module.h>
	23	#include <linux/mutex.h>
	24	#include <linux/slab.h>
	25	#include <linux/workqueue.h>
	26	#include <linux/i2c/sx150x.h>
	27
0ff56cd8 TG	28	#define NO_UPDATE_PENDING -1
0ff56cd8 TG	29
c34f16b7 GB	30	struct sx150x_device_data {
	31	u8 reg_pullup;
	32	u8 reg_pulldn;
	33	u8 reg_drain;
	34	u8 reg_polarity;
	35	u8 reg_dir;
	36	u8 reg_data;
	37	u8 reg_irq_mask;
	38	u8 reg_irq_src;
	39	u8 reg_sense;
	40	u8 reg_clock;
	41	u8 reg_misc;
	42	u8 reg_reset;
	43	u8 ngpios;
	44	};
	45
	46	struct sx150x_chip {
	47	struct gpio_chip gpio_chip;
	48	struct i2c_client *client;
	49	const struct sx150x_device_data *dev_cfg;
	50	int irq_summary;
	51	int irq_base;
0ff56cd8	52	int irq_update;
c34f16b7	53	u32 irq_sense;
0ff56cd8 TG	54	u32 irq_masked;
	55	u32 dev_sense;
	56	u32 dev_masked;
c34f16b7 GB	57	struct irq_chip irq_chip;
	58	struct mutex lock;
	59	};
	60
	61	static const struct sx150x_device_data sx150x_devices[] = {
	62	[0] = { /* sx1508q */
	63	.reg_pullup = 0x03,
	64	.reg_pulldn = 0x04,
	65	.reg_drain = 0x05,
	66	.reg_polarity = 0x06,
	67	.reg_dir = 0x07,
	68	.reg_data = 0x08,
	69	.reg_irq_mask = 0x09,
	70	.reg_irq_src = 0x0c,
	71	.reg_sense = 0x0b,
	72	.reg_clock = 0x0f,
	73	.reg_misc = 0x10,
	74	.reg_reset = 0x7d,
	75	.ngpios = 8
	76	},
	77	[1] = { /* sx1509q */
	78	.reg_pullup = 0x07,
	79	.reg_pulldn = 0x09,
	80	.reg_drain = 0x0b,
	81	.reg_polarity = 0x0d,
	82	.reg_dir = 0x0f,
	83	.reg_data = 0x11,
	84	.reg_irq_mask = 0x13,
	85	.reg_irq_src = 0x19,
	86	.reg_sense = 0x17,
	87	.reg_clock = 0x1e,
	88	.reg_misc = 0x1f,
	89	.reg_reset = 0x7d,
	90	.ngpios = 16
	91	},
	92	};
	93
	94	static const struct i2c_device_id sx150x_id[] = {
	95	{"sx1508q", 0},
	96	{"sx1509q", 1},
	97	{}
	98	};
	99	MODULE_DEVICE_TABLE(i2c, sx150x_id);
	100
	101	static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
	102	{
	103	s32 err = i2c_smbus_write_byte_data(client, reg, val);
	104
	105	if (err < 0)
	106	dev_warn(&client->dev,
	107	"i2c write fail: can't write %02x to %02x: %d\n",
	108	val, reg, err);
	109	return err;
	110	}
	111
	112	static s32 sx150x_i2c_read(struct i2c_client client, u8 reg, u8 val)
	113	{
	114	s32 err = i2c_smbus_read_byte_data(client, reg);
	115
	116	if (err >= 0)
	117	*val = err;
	118	else
	119	dev_warn(&client->dev,
	120	"i2c read fail: can't read from %02x: %d\n",
121	reg, err);
122	return err;
123	}
124
125	static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
126	{
127	return (chip->dev_cfg->ngpios == offset);
128	}
129
130	/*
131	* These utility functions solve the common problem of locating and setting
132	* configuration bits. Configuration bits are grouped into registers
133	* whose indexes increase downwards. For example, with eight-bit registers,
134	* sixteen gpios would have their config bits grouped in the following order:
135	* REGISTER N-1 [ f e d c b a 9 8 ]
136	* N [ 7 6 5 4 3 2 1 0 ]
137	*
138	* For multi-bit configurations, the pattern gets wider:
139	* REGISTER N-3 [ f f e e d d c c ]
140	* N-2 [ b b a a 9 9 8 8 ]
141	* N-1 [ 7 7 6 6 5 5 4 4 ]
142	* N [ 3 3 2 2 1 1 0 0 ]
143	*
144	* Given the address of the starting register 'N', the index of the gpio
145	* whose configuration we seek to change, and the width in bits of that
146	* configuration, these functions allow us to locate the correct
147	* register and mask the correct bits.
148	*/
149	static inline void sx150x_find_cfg(u8 offset, u8 width,
150	u8 reg, u8 mask, u8 *shift)
151	{
152	reg -= offset width / 8;
153	*mask = (1 << width) - 1;
154	shift = (offset width) % 8;
155	mask <<= shift;
156	}
157
158	static s32 sx150x_write_cfg(struct sx150x_chip *chip,
159	u8 offset, u8 width, u8 reg, u8 val)
160	{
161	u8 mask;
162	u8 data;
163	u8 shift;
164	s32 err;
165
166	sx150x_find_cfg(offset, width, &reg, &mask, &shift);
167	err = sx150x_i2c_read(chip->client, reg, &data);
168	if (err < 0)
169	return err;
170
171	data &= ~mask;
172	data \|= (val << shift) & mask;
173	return sx150x_i2c_write(chip->client, reg, data);
174	}
175
176	static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
177	{
178	u8 reg = chip->dev_cfg->reg_data;
179	u8 mask;
180	u8 data;
181	u8 shift;
182	s32 err;
183
184	sx150x_find_cfg(offset, 1, &reg, &mask, &shift);
185	err = sx150x_i2c_read(chip->client, reg, &data);
186	if (err >= 0)
187	err = (data & mask) != 0 ? 1 : 0;
188
189	return err;
190	}
191
192	static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
193	{
194	sx150x_i2c_write(chip->client,
195	chip->dev_cfg->reg_clock,
196	(val ? 0x1f : 0x10));
197	}
198
199	static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
200	{
201	sx150x_write_cfg(chip,
202	offset,
203	1,
204	chip->dev_cfg->reg_data,
205	(val ? 1 : 0));
206	}
207
208	static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
209	{
210	return sx150x_write_cfg(chip,
211	offset,
212	1,
213	chip->dev_cfg->reg_dir,
214	1);
215	}
216
217	static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
218	{
219	int err;
220
221	err = sx150x_write_cfg(chip,
222	offset,
223	1,
224	chip->dev_cfg->reg_data,
225	(val ? 1 : 0));
226	if (err >= 0)
227	err = sx150x_write_cfg(chip,
228	offset,
229	1,
230	chip->dev_cfg->reg_dir,
231	0);
232	return err;
233	}
234
235	static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
236	{
237	struct sx150x_chip *chip;
238	int status = -EINVAL;
239
240	chip = container_of(gc, struct sx150x_chip, gpio_chip);
241
242	if (!offset_is_oscio(chip, offset)) {
243	mutex_lock(&chip->lock);
244	status = sx150x_get_io(chip, offset);
245	mutex_unlock(&chip->lock);
246	}
247
248	return status;
249	}
250
251	static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
252	{
253	struct sx150x_chip *chip;
254
255	chip = container_of(gc, struct sx150x_chip, gpio_chip);
256
257	mutex_lock(&chip->lock);
258	if (offset_is_oscio(chip, offset))
259	sx150x_set_oscio(chip, val);
260	else
261	sx150x_set_io(chip, offset, val);
262	mutex_unlock(&chip->lock);
263	}
264
265	static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
266	{
267	struct sx150x_chip *chip;
268	int status = -EINVAL;
269
270	chip = container_of(gc, struct sx150x_chip, gpio_chip);
271
272	if (!offset_is_oscio(chip, offset)) {
273	mutex_lock(&chip->lock);
274	status = sx150x_io_input(chip, offset);
275	mutex_unlock(&chip->lock);
276	}
277	return status;
278	}
279
280	static int sx150x_gpio_direction_output(struct gpio_chip *gc,
281	unsigned offset,
282	int val)
283	{
284	struct sx150x_chip *chip;
285	int status = 0;
286
287	chip = container_of(gc, struct sx150x_chip, gpio_chip);
288
289	if (!offset_is_oscio(chip, offset)) {
290	mutex_lock(&chip->lock);
291	status = sx150x_io_output(chip, offset, val);
292	mutex_unlock(&chip->lock);
293	}
294	return status;
295	}
296
297	static int sx150x_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
298	{
299	struct sx150x_chip *chip;
300
301	chip = container_of(gc, struct sx150x_chip, gpio_chip);
302
303	if (offset >= chip->dev_cfg->ngpios)
304	return -EINVAL;
305
306	if (chip->irq_base < 0)
307	return -EINVAL;
308
309	return chip->irq_base + offset;
310	}
311
673860c1	312	static void sx150x_irq_mask(struct irq_data *d)
c34f16b7	313	{
a3b93081	314	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
c34f16b7 GB	315	unsigned n;
c34f16b7 GB	316
673860c1	317	n = d->irq - chip->irq_base;
0ff56cd8 TG	318	chip->irq_masked \|= (1 << n);
0ff56cd8 TG	319	chip->irq_update = n;
c34f16b7 GB	320	}
c34f16b7 GB	321
673860c1	322	static void sx150x_irq_unmask(struct irq_data *d)
c34f16b7	323	{
a3b93081	324	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
c34f16b7 GB	325	unsigned n;
c34f16b7 GB	326
673860c1	327	n = d->irq - chip->irq_base;
0ff56cd8 TG	328	chip->irq_masked &= ~(1 << n);
0ff56cd8 TG	329	chip->irq_update = n;
c34f16b7 GB	330	}
c34f16b7 GB	331
673860c1	332	static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
c34f16b7	333	{
a3b93081	334	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
c34f16b7 GB	335	unsigned n, val = 0;
	336
	337	if (flow_type & (IRQ_TYPE_LEVEL_HIGH \| IRQ_TYPE_LEVEL_LOW))
	338	return -EINVAL;
	339
673860c1	340	n = d->irq - chip->irq_base;
c34f16b7 GB	341
	342	if (flow_type & IRQ_TYPE_EDGE_RISING)
	343	val \|= 0x1;
	344	if (flow_type & IRQ_TYPE_EDGE_FALLING)
	345	val \|= 0x2;
	346
	347	chip->irq_sense &= ~(3UL << (n * 2));
	348	chip->irq_sense \|= val << (n * 2);
0ff56cd8	349	chip->irq_update = n;
c34f16b7 GB	350	return 0;
	351	}
	352
	353	static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
	354	{
	355	struct sx150x_chip chip = (struct sx150x_chip )dev_id;
	356	unsigned nhandled = 0;
	357	unsigned sub_irq;
	358	unsigned n;
	359	s32 err;
	360	u8 val;
	361	int i;
	362
	363	for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
	364	err = sx150x_i2c_read(chip->client,
	365	chip->dev_cfg->reg_irq_src - i,
	366	&val);
	367	if (err < 0)
	368	continue;
	369
	370	sx150x_i2c_write(chip->client,
	371	chip->dev_cfg->reg_irq_src - i,
	372	val);
	373	for (n = 0; n < 8; ++n) {
	374	if (val & (1 << n)) {
	375	sub_irq = chip->irq_base + (i * 8) + n;
	376	handle_nested_irq(sub_irq);
	377	++nhandled;
	378	}
	379	}
	380	}
	381
	382	return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
	383	}
	384
673860c1	385	static void sx150x_irq_bus_lock(struct irq_data *d)
c34f16b7	386	{
a3b93081	387	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
c34f16b7 GB	388
	389	mutex_lock(&chip->lock);
	390	}
	391
673860c1	392	static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
c34f16b7	393	{
a3b93081	394	struct sx150x_chip *chip = irq_data_get_irq_chip_data(d);
c34f16b7 GB	395	unsigned n;
c34f16b7 GB	396
0ff56cd8 TG	397	if (chip->irq_update == NO_UPDATE_PENDING)
	398	goto out;
	399
	400	n = chip->irq_update;
	401	chip->irq_update = NO_UPDATE_PENDING;
c34f16b7	402
0ff56cd8 TG	403	/* Avoid updates if nothing changed */
	404	if (chip->dev_sense == chip->irq_sense &&
	405	chip->dev_sense == chip->irq_masked)
	406	goto out;
	407
	408	chip->dev_sense = chip->irq_sense;
	409	chip->dev_masked = chip->irq_masked;
	410
	411	if (chip->irq_masked & (1 << n)) {
	412	sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
	413	sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
	414	} else {
	415	sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
	416	sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
	417	chip->irq_sense >> (n * 2));
	418	}
	419	out:
c34f16b7 GB	420	mutex_unlock(&chip->lock);
	421	}
	422
	423	static void sx150x_init_chip(struct sx150x_chip *chip,
	424	struct i2c_client *client,
	425	kernel_ulong_t driver_data,
	426	struct sx150x_platform_data *pdata)
	427	{
	428	mutex_init(&chip->lock);
	429
	430	chip->client = client;
	431	chip->dev_cfg = &sx150x_devices[driver_data];
	432	chip->gpio_chip.label = client->name;
	433	chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
	434	chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
	435	chip->gpio_chip.get = sx150x_gpio_get;
	436	chip->gpio_chip.set = sx150x_gpio_set;
	437	chip->gpio_chip.to_irq = sx150x_gpio_to_irq;
	438	chip->gpio_chip.base = pdata->gpio_base;
	439	chip->gpio_chip.can_sleep = 1;
	440	chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
	441	if (pdata->oscio_is_gpo)
	442	++chip->gpio_chip.ngpio;
	443
673860c1 LB	444	chip->irq_chip.name = client->name;
	445	chip->irq_chip.irq_mask = sx150x_irq_mask;
	446	chip->irq_chip.irq_unmask = sx150x_irq_unmask;
	447	chip->irq_chip.irq_set_type = sx150x_irq_set_type;
	448	chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
	449	chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
	450	chip->irq_summary = -1;
	451	chip->irq_base = -1;
0ff56cd8	452	chip->irq_masked = ~0;
673860c1	453	chip->irq_sense = 0;
0ff56cd8 TG	454	chip->dev_masked = ~0;
	455	chip->dev_sense = 0;
	456	chip->irq_update = NO_UPDATE_PENDING;
c34f16b7 GB	457	}
	458
	459	static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
	460	{
	461	int err = 0;
	462	unsigned n;
	463
	464	for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
	465	err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
	466	return err;
	467	}
	468
5affb607	469	static int sx150x_reset(struct sx150x_chip *chip)
c34f16b7	470	{
5affb607	471	int err;
c34f16b7	472
5affb607	473	err = i2c_smbus_write_byte_data(chip->client,
c34f16b7	474	chip->dev_cfg->reg_reset,
5affb607	475	0x12);
c34f16b7 GB	476	if (err < 0)
	477	return err;
	478
5affb607 GB	479	err = i2c_smbus_write_byte_data(chip->client,
	480	chip->dev_cfg->reg_reset,
	481	0x34);
	482	return err;
	483	}
	484
	485	static int sx150x_init_hw(struct sx150x_chip *chip,
	486	struct sx150x_platform_data *pdata)
	487	{
	488	int err = 0;
	489
	490	if (pdata->reset_during_probe) {
	491	err = sx150x_reset(chip);
	492	if (err < 0)
	493	return err;
	494	}
	495
c34f16b7 GB	496	err = sx150x_i2c_write(chip->client,
	497	chip->dev_cfg->reg_misc,
	498	0x01);
	499	if (err < 0)
	500	return err;
	501
	502	err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
	503	pdata->io_pullup_ena);
	504	if (err < 0)
	505	return err;
	506
	507	err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
	508	pdata->io_pulldn_ena);
	509	if (err < 0)
	510	return err;
	511
	512	err = sx150x_init_io(chip, chip->dev_cfg->reg_drain,
	513	pdata->io_open_drain_ena);
	514	if (err < 0)
	515	return err;
	516
	517	err = sx150x_init_io(chip, chip->dev_cfg->reg_polarity,
	518	pdata->io_polarity);
	519	if (err < 0)
	520	return err;
	521
	522	if (pdata->oscio_is_gpo)
	523	sx150x_set_oscio(chip, 0);
	524
	525	return err;
	526	}
	527
	528	static int sx150x_install_irq_chip(struct sx150x_chip *chip,
	529	int irq_summary,
	530	int irq_base)
	531	{
	532	int err;
	533	unsigned n;
	534	unsigned irq;
	535
	536	chip->irq_summary = irq_summary;
	537	chip->irq_base = irq_base;
	538
	539	for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
	540	irq = irq_base + n;
a3b93081	541	irq_set_chip_data(irq, chip);
b51804bc TG	542	irq_set_chip_and_handler(irq, &chip->irq_chip, handle_edge_irq);
b51804bc TG	543	irq_set_nested_thread(irq, 1);
c34f16b7 GB	544	#ifdef CONFIG_ARM
	545	set_irq_flags(irq, IRQF_VALID);
	546	#else
b51804bc	547	irq_set_noprobe(irq);
c34f16b7 GB	548	#endif
	549	}
	550
	551	err = request_threaded_irq(irq_summary,
	552	NULL,
	553	sx150x_irq_thread_fn,
	554	IRQF_SHARED \| IRQF_TRIGGER_FALLING,
	555	chip->irq_chip.name,
	556	chip);
	557	if (err < 0) {
	558	chip->irq_summary = -1;
	559	chip->irq_base = -1;
	560	}
	561
	562	return err;
	563	}
	564
	565	static void sx150x_remove_irq_chip(struct sx150x_chip *chip)
	566	{
	567	unsigned n;
	568	unsigned irq;
	569
	570	free_irq(chip->irq_summary, chip);
	571
	572	for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
	573	irq = chip->irq_base + n;
08f1b807	574	irq_set_chip_and_handler(irq, NULL, NULL);
c34f16b7 GB	575	}
	576	}
	577
3836309d	578	static int sx150x_probe(struct i2c_client *client,
c34f16b7 GB	579	const struct i2c_device_id *id)
	580	{
	581	static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA \|
	582	I2C_FUNC_SMBUS_WRITE_WORD_DATA;
	583	struct sx150x_platform_data *pdata;
	584	struct sx150x_chip *chip;
	585	int rc;
	586
	587	pdata = client->dev.platform_data;
	588	if (!pdata)
	589	return -EINVAL;
	590
	591	if (!i2c_check_functionality(client->adapter, i2c_funcs))
	592	return -ENOSYS;
	593
	594	chip = kzalloc(sizeof(struct sx150x_chip), GFP_KERNEL);
	595	if (!chip)
	596	return -ENOMEM;
	597
	598	sx150x_init_chip(chip, client, id->driver_data, pdata);
	599	rc = sx150x_init_hw(chip, pdata);
	600	if (rc < 0)
	601	goto probe_fail_pre_gpiochip_add;
	602
	603	rc = gpiochip_add(&chip->gpio_chip);
	604	if (rc < 0)
	605	goto probe_fail_pre_gpiochip_add;
	606
	607	if (pdata->irq_summary >= 0) {
	608	rc = sx150x_install_irq_chip(chip,
	609	pdata->irq_summary,
	610	pdata->irq_base);
	611	if (rc < 0)
	612	goto probe_fail_post_gpiochip_add;
	613	}
	614
	615	i2c_set_clientdata(client, chip);
	616
	617	return 0;
	618	probe_fail_post_gpiochip_add:
	619	WARN_ON(gpiochip_remove(&chip->gpio_chip) < 0);
	620	probe_fail_pre_gpiochip_add:
	621	kfree(chip);
	622	return rc;
	623	}
	624
206210ce	625	static int sx150x_remove(struct i2c_client *client)
c34f16b7 GB	626	{
	627	struct sx150x_chip *chip;
	628	int rc;
	629
	630	chip = i2c_get_clientdata(client);
	631	rc = gpiochip_remove(&chip->gpio_chip);
	632	if (rc < 0)
	633	return rc;
	634
	635	if (chip->irq_summary >= 0)
	636	sx150x_remove_irq_chip(chip);
	637
	638	kfree(chip);
	639
	640	return 0;
	641	}
	642
	643	static struct i2c_driver sx150x_driver = {
	644	.driver = {
	645	.name = "sx150x",
	646	.owner = THIS_MODULE
	647	},
	648	.probe = sx150x_probe,
8283c4ff	649	.remove = sx150x_remove,
c34f16b7 GB	650	.id_table = sx150x_id,
	651	};
	652
	653	static int __init sx150x_init(void)
	654	{
	655	return i2c_add_driver(&sx150x_driver);
	656	}
	657	subsys_initcall(sx150x_init);
	658
	659	static void __exit sx150x_exit(void)
	660	{
	661	return i2c_del_driver(&sx150x_driver);
	662	}
	663	module_exit(sx150x_exit);
	664
	665	MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
	666	MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
	667	MODULE_LICENSE("GPL v2");
	668	MODULE_ALIAS("i2c:sx150x");