[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / gpio / gpio-adp5588.c

/*
 * GPIO Chip driver for Analog Devices
 * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
 *
 * Copyright 2009-2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/irq.h>

#include <linux/i2c/adp5588.h>

#define DRV_NAME	"adp5588-gpio"

/*
 * Early pre 4.0 Silicon required to delay readout by at least 25ms,
 * since the Event Counter Register updated 25ms after the interrupt
 * asserted.
 */
#define WA_DELAYED_READOUT_REVID(rev)	((rev) < 4)

struct adp5588_gpio {
	struct i2c_client *client;
	struct gpio_chip gpio_chip;
	struct mutex lock;	/* protect cached dir, dat_out */
	/* protect serialized access to the interrupt controller bus */
	struct mutex irq_lock;
	unsigned gpio_start;
	unsigned irq_base;
	uint8_t dat_out[3];
	uint8_t dir[3];
	uint8_t int_lvl[3];
	uint8_t int_en[3];
	uint8_t irq_mask[3];
	uint8_t irq_stat[3];
};

static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
{
	int ret = i2c_smbus_read_byte_data(client, reg);

	if (ret < 0)
		dev_err(&client->dev, "Read Error\n");

	return ret;
}

static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
{
	int ret = i2c_smbus_write_byte_data(client, reg, val);

	if (ret < 0)
		dev_err(&client->dev, "Write Error\n");

	return ret;
}

static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
{
	struct adp5588_gpio *dev =
	    container_of(chip, struct adp5588_gpio, gpio_chip);

	return !!(adp5588_gpio_read(dev->client,
		  GPIO_DAT_STAT1 + ADP5588_BANK(off)) & ADP5588_BIT(off));
}

static void adp5588_gpio_set_value(struct gpio_chip *chip,
				   unsigned off, int val)
{
	unsigned bank, bit;
	struct adp5588_gpio *dev =
	    container_of(chip, struct adp5588_gpio, gpio_chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
			   dev->dat_out[bank]);
	mutex_unlock(&dev->lock);
}

static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
{
	int ret;
	unsigned bank;
	struct adp5588_gpio *dev =
	    container_of(chip, struct adp5588_gpio, gpio_chip);

	bank = ADP5588_BANK(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] &= ~ADP5588_BIT(off);
	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

static int adp5588_gpio_direction_output(struct gpio_chip *chip,
					 unsigned off, int val)
{
	int ret;
	unsigned bank, bit;
	struct adp5588_gpio *dev =
	    container_of(chip, struct adp5588_gpio, gpio_chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] |= bit;

	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
				 dev->dat_out[bank]);
	ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
				 dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

#ifdef CONFIG_GPIO_ADP5588_IRQ
static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off)
{
	struct adp5588_gpio *dev =
		container_of(chip, struct adp5588_gpio, gpio_chip);
	return dev->irq_base + off;
}

static void adp5588_irq_bus_lock(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);

	mutex_lock(&dev->irq_lock);
}

 /*
  * genirq core code can issue chip->mask/unmask from atomic context.
  * This doesn't work for slow busses where an access needs to sleep.
  * bus_sync_unlock() is therefore called outside the atomic context,
  * syncs the current irq mask state with the slow external controller
  * and unlocks the bus.
  */

static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	int i;

	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++)
		if (dev->int_en[i] ^ dev->irq_mask[i]) {
			dev->int_en[i] = dev->irq_mask[i];
			adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i,
					   dev->int_en[i]);
		}

	mutex_unlock(&dev->irq_lock);
}

static void adp5588_irq_mask(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	unsigned gpio = d->irq - dev->irq_base;

	dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio);
}

static void adp5588_irq_unmask(struct irq_data *d)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	unsigned gpio = d->irq - dev->irq_base;

	dev->irq_mask[ADP5588_BANK(gpio)] |= ADP5588_BIT(gpio);
}

static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
{
	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
	uint16_t gpio = d->irq - dev->irq_base;
	unsigned bank, bit;

	if ((type & IRQ_TYPE_EDGE_BOTH)) {
		dev_err(&dev->client->dev, "irq %d: unsupported type %d\n",
			d->irq, type);
		return -EINVAL;
	}

	bank = ADP5588_BANK(gpio);
	bit = ADP5588_BIT(gpio);

	if (type & IRQ_TYPE_LEVEL_HIGH)
		dev->int_lvl[bank] |= bit;
	else if (type & IRQ_TYPE_LEVEL_LOW)
		dev->int_lvl[bank] &= ~bit;
	else
		return -EINVAL;

	adp5588_gpio_direction_input(&dev->gpio_chip, gpio);
	adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank,
			   dev->int_lvl[bank]);

	return 0;
}

static struct irq_chip adp5588_irq_chip = {
	.name			= "adp5588",
	.irq_mask		= adp5588_irq_mask,
	.irq_unmask		= adp5588_irq_unmask,
	.irq_bus_lock		= adp5588_irq_bus_lock,
	.irq_bus_sync_unlock	= adp5588_irq_bus_sync_unlock,
	.irq_set_type		= adp5588_irq_set_type,
};

static int adp5588_gpio_read_intstat(struct i2c_client *client, u8 *buf)
{
	int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf);

	if (ret < 0)
		dev_err(&client->dev, "Read INT_STAT Error\n");

	return ret;
}

static irqreturn_t adp5588_irq_handler(int irq, void *devid)
{
	struct adp5588_gpio *dev = devid;
	unsigned status, bank, bit, pending;
	int ret;
	status = adp5588_gpio_read(dev->client, INT_STAT);

	if (status & ADP5588_GPI_INT) {
		ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat);
		if (ret < 0)
			memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));

		for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
			bank++, bit = 0) {
			pending = dev->irq_stat[bank] & dev->irq_mask[bank];

			while (pending) {
				if (pending & (1 << bit)) {
					handle_nested_irq(dev->irq_base +
							  (bank << 3) + bit);
					pending &= ~(1 << bit);

				}
				bit++;
			}
		}
	}

	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */

	return IRQ_HANDLED;
}

static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
	unsigned gpio;
	int ret;

	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
	adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */

	dev->irq_base = pdata->irq_base;
	mutex_init(&dev->irq_lock);

	for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) {
		int irq = gpio + dev->irq_base;
		irq_set_chip_data(irq, dev);
		irq_set_chip_and_handler(irq, &adp5588_irq_chip,
					 handle_level_irq);
		irq_set_nested_thread(irq, 1);
#ifdef CONFIG_ARM
		/*
		 * ARM needs us to explicitly flag the IRQ as VALID,
		 * once we do so, it will also set the noprobe.
		 */
		set_irq_flags(irq, IRQF_VALID);
#else
		irq_set_noprobe(irq);
#endif
	}

	ret = request_threaded_irq(client->irq,
				   NULL,
				   adp5588_irq_handler,
				   IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
				   dev_name(&client->dev), dev);
	if (ret) {
		dev_err(&client->dev, "failed to request irq %d\n",
			client->irq);
		goto out;
	}

	dev->gpio_chip.to_irq = adp5588_gpio_to_irq;
	adp5588_gpio_write(client, CFG,
		ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_GPI_INT);

	return 0;

out:
	dev->irq_base = 0;
	return ret;
}

static void adp5588_irq_teardown(struct adp5588_gpio *dev)
{
	if (dev->irq_base)
		free_irq(dev->client->irq, dev);
}

#else
static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	dev_warn(&client->dev, "interrupt support not compiled in\n");

	return 0;
}

static void adp5588_irq_teardown(struct adp5588_gpio *dev)
{
}
#endif /* CONFIG_GPIO_ADP5588_IRQ */

static int adp5588_gpio_probe(struct i2c_client *client,
					const struct i2c_device_id *id)
{
	struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
	struct adp5588_gpio *dev;
	struct gpio_chip *gc;
	int ret, i, revid;

	if (pdata == NULL) {
		dev_err(&client->dev, "missing platform data\n");
		return -ENODEV;
	}

	if (!i2c_check_functionality(client->adapter,
					I2C_FUNC_SMBUS_BYTE_DATA)) {
		dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
		return -EIO;
	}

	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
	if (dev == NULL) {
		dev_err(&client->dev, "failed to alloc memory\n");
		return -ENOMEM;
	}

	dev->client = client;

	gc = &dev->gpio_chip;
	gc->direction_input = adp5588_gpio_direction_input;
	gc->direction_output = adp5588_gpio_direction_output;
	gc->get = adp5588_gpio_get_value;
	gc->set = adp5588_gpio_set_value;
	gc->can_sleep = 1;

	gc->base = pdata->gpio_start;
	gc->ngpio = ADP5588_MAXGPIO;
	gc->label = client->name;
	gc->owner = THIS_MODULE;

	mutex_init(&dev->lock);

	ret = adp5588_gpio_read(dev->client, DEV_ID);
	if (ret < 0)
		goto err;

	revid = ret & ADP5588_DEVICE_ID_MASK;

	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
		dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
		dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
		ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
		ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
				(pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
		ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
		if (ret)
			goto err;
	}

	if (pdata->irq_base) {
		if (WA_DELAYED_READOUT_REVID(revid)) {
			dev_warn(&client->dev, "GPIO int not supported\n");
		} else {
			ret = adp5588_irq_setup(dev);
			if (ret)
				goto err;
		}
	}

	ret = gpiochip_add(&dev->gpio_chip);
	if (ret)
		goto err_irq;

	dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n",
			pdata->irq_base, revid);

	if (pdata->setup) {
		ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
		if (ret < 0)
			dev_warn(&client->dev, "setup failed, %d\n", ret);
	}

	i2c_set_clientdata(client, dev);

	return 0;

err_irq:
	adp5588_irq_teardown(dev);
err:
	kfree(dev);
	return ret;
}

static int adp5588_gpio_remove(struct i2c_client *client)
{
	struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	int ret;

	if (pdata->teardown) {
		ret = pdata->teardown(client,
				      dev->gpio_chip.base, dev->gpio_chip.ngpio,
				      pdata->context);
		if (ret < 0) {
			dev_err(&client->dev, "teardown failed %d\n", ret);
			return ret;
		}
	}

	if (dev->irq_base)
		free_irq(dev->client->irq, dev);

	ret = gpiochip_remove(&dev->gpio_chip);
	if (ret) {
		dev_err(&client->dev, "gpiochip_remove failed %d\n", ret);
		return ret;
	}

	kfree(dev);
	return 0;
}

static const struct i2c_device_id adp5588_gpio_id[] = {
	{DRV_NAME, 0},
	{}
};

MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);

static struct i2c_driver adp5588_gpio_driver = {
	.driver = {
		   .name = DRV_NAME,
		   },
	.probe = adp5588_gpio_probe,
	.remove = adp5588_gpio_remove,
	.id_table = adp5588_gpio_id,
};

module_i2c_driver(adp5588_gpio_driver);

MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
MODULE_DESCRIPTION("GPIO ADP5588 Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
80884094 MH	1	/*
80884094 MH	2	* GPIO Chip driver for Analog Devices
459773ae	3	* ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
80884094	4	*
459773ae	5	* Copyright 2009-2010 Analog Devices Inc.
80884094 MH	6	*
	7	* Licensed under the GPL-2 or later.
	8	*/
	9
	10	#include <linux/module.h>
	11	#include <linux/kernel.h>
5a0e3ad6	12	#include <linux/slab.h>
80884094 MH	13	#include <linux/init.h>
	14	#include <linux/i2c.h>
	15	#include <linux/gpio.h>
459773ae MH	16	#include <linux/interrupt.h>
459773ae MH	17	#include <linux/irq.h>
80884094 MH	18
	19	#include <linux/i2c/adp5588.h>
	20
459773ae MH	21	#define DRV_NAME "adp5588-gpio"
	22
	23	/*
	24	* Early pre 4.0 Silicon required to delay readout by at least 25ms,
	25	* since the Event Counter Register updated 25ms after the interrupt
	26	* asserted.
	27	*/
	28	#define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4)
80884094 MH	29
	30	struct adp5588_gpio {
	31	struct i2c_client *client;
	32	struct gpio_chip gpio_chip;
	33	struct mutex lock; /* protect cached dir, dat_out */
459773ae MH	34	/* protect serialized access to the interrupt controller bus */
459773ae MH	35	struct mutex irq_lock;
80884094	36	unsigned gpio_start;
459773ae	37	unsigned irq_base;
80884094 MH	38	uint8_t dat_out[3];
80884094 MH	39	uint8_t dir[3];
459773ae MH	40	uint8_t int_lvl[3];
	41	uint8_t int_en[3];
	42	uint8_t irq_mask[3];
	43	uint8_t irq_stat[3];
80884094 MH	44	};
	45
	46	static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
	47	{
	48	int ret = i2c_smbus_read_byte_data(client, reg);
	49
	50	if (ret < 0)
	51	dev_err(&client->dev, "Read Error\n");
	52
	53	return ret;
	54	}
	55
	56	static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
	57	{
	58	int ret = i2c_smbus_write_byte_data(client, reg, val);
	59
	60	if (ret < 0)
	61	dev_err(&client->dev, "Write Error\n");
	62
	63	return ret;
	64	}
	65
	66	static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
	67	{
	68	struct adp5588_gpio *dev =
	69	container_of(chip, struct adp5588_gpio, gpio_chip);
	70
459773ae MH	71	return !!(adp5588_gpio_read(dev->client,
459773ae MH	72	GPIO_DAT_STAT1 + ADP5588_BANK(off)) & ADP5588_BIT(off));
80884094 MH	73	}
	74
	75	static void adp5588_gpio_set_value(struct gpio_chip *chip,
	76	unsigned off, int val)
	77	{
	78	unsigned bank, bit;
	79	struct adp5588_gpio *dev =
	80	container_of(chip, struct adp5588_gpio, gpio_chip);
	81
459773ae MH	82	bank = ADP5588_BANK(off);
459773ae MH	83	bit = ADP5588_BIT(off);
80884094 MH	84
	85	mutex_lock(&dev->lock);
	86	if (val)
	87	dev->dat_out[bank] \|= bit;
	88	else
	89	dev->dat_out[bank] &= ~bit;
	90
	91	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	92	dev->dat_out[bank]);
	93	mutex_unlock(&dev->lock);
	94	}
	95
	96	static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
	97	{
	98	int ret;
	99	unsigned bank;
	100	struct adp5588_gpio *dev =
	101	container_of(chip, struct adp5588_gpio, gpio_chip);
	102
459773ae	103	bank = ADP5588_BANK(off);
80884094 MH	104
80884094 MH	105	mutex_lock(&dev->lock);
459773ae	106	dev->dir[bank] &= ~ADP5588_BIT(off);
80884094 MH	107	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	108	mutex_unlock(&dev->lock);
	109
	110	return ret;
	111	}
	112
	113	static int adp5588_gpio_direction_output(struct gpio_chip *chip,
	114	unsigned off, int val)
	115	{
	116	int ret;
	117	unsigned bank, bit;
	118	struct adp5588_gpio *dev =
	119	container_of(chip, struct adp5588_gpio, gpio_chip);
	120
459773ae MH	121	bank = ADP5588_BANK(off);
459773ae MH	122	bit = ADP5588_BIT(off);
80884094 MH	123
	124	mutex_lock(&dev->lock);
	125	dev->dir[bank] \|= bit;
	126
	127	if (val)
	128	dev->dat_out[bank] \|= bit;
	129	else
	130	dev->dat_out[bank] &= ~bit;
	131
	132	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	133	dev->dat_out[bank]);
	134	ret \|= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
	135	dev->dir[bank]);
	136	mutex_unlock(&dev->lock);
	137
	138	return ret;
	139	}
	140
459773ae MH	141	#ifdef CONFIG_GPIO_ADP5588_IRQ
	142	static int adp5588_gpio_to_irq(struct gpio_chip *chip, unsigned off)
	143	{
	144	struct adp5588_gpio *dev =
	145	container_of(chip, struct adp5588_gpio, gpio_chip);
	146	return dev->irq_base + off;
	147	}
	148
12401eed	149	static void adp5588_irq_bus_lock(struct irq_data *d)
459773ae	150	{
12401eed LB	151	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	152
459773ae MH	153	mutex_lock(&dev->irq_lock);
	154	}
	155
	156	/*
	157	* genirq core code can issue chip->mask/unmask from atomic context.
	158	* This doesn't work for slow busses where an access needs to sleep.
	159	* bus_sync_unlock() is therefore called outside the atomic context,
	160	* syncs the current irq mask state with the slow external controller
	161	* and unlocks the bus.
	162	*/
	163
12401eed	164	static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
459773ae	165	{
12401eed	166	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
459773ae MH	167	int i;
	168
	169	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++)
	170	if (dev->int_en[i] ^ dev->irq_mask[i]) {
	171	dev->int_en[i] = dev->irq_mask[i];
	172	adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i,
	173	dev->int_en[i]);
	174	}
	175
	176	mutex_unlock(&dev->irq_lock);
	177	}
	178
12401eed	179	static void adp5588_irq_mask(struct irq_data *d)
459773ae	180	{
12401eed LB	181	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	182	unsigned gpio = d->irq - dev->irq_base;
459773ae MH	183
	184	dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio);
	185	}
	186
12401eed	187	static void adp5588_irq_unmask(struct irq_data *d)
459773ae	188	{
12401eed LB	189	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	190	unsigned gpio = d->irq - dev->irq_base;
459773ae MH	191
	192	dev->irq_mask[ADP5588_BANK(gpio)] \|= ADP5588_BIT(gpio);
	193	}
	194
12401eed	195	static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
459773ae	196	{
12401eed LB	197	struct adp5588_gpio *dev = irq_data_get_irq_chip_data(d);
12401eed LB	198	uint16_t gpio = d->irq - dev->irq_base;
459773ae MH	199	unsigned bank, bit;
	200
	201	if ((type & IRQ_TYPE_EDGE_BOTH)) {
	202	dev_err(&dev->client->dev, "irq %d: unsupported type %d\n",
12401eed	203	d->irq, type);
459773ae MH	204	return -EINVAL;
	205	}
	206
	207	bank = ADP5588_BANK(gpio);
	208	bit = ADP5588_BIT(gpio);
	209
	210	if (type & IRQ_TYPE_LEVEL_HIGH)
	211	dev->int_lvl[bank] \|= bit;
	212	else if (type & IRQ_TYPE_LEVEL_LOW)
	213	dev->int_lvl[bank] &= ~bit;
	214	else
	215	return -EINVAL;
	216
	217	adp5588_gpio_direction_input(&dev->gpio_chip, gpio);
	218	adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank,
	219	dev->int_lvl[bank]);
	220
	221	return 0;
	222	}
	223
	224	static struct irq_chip adp5588_irq_chip = {
	225	.name = "adp5588",
12401eed LB	226	.irq_mask = adp5588_irq_mask,
	227	.irq_unmask = adp5588_irq_unmask,
	228	.irq_bus_lock = adp5588_irq_bus_lock,
	229	.irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock,
	230	.irq_set_type = adp5588_irq_set_type,
459773ae MH	231	};
	232
	233	static int adp5588_gpio_read_intstat(struct i2c_client client, u8 buf)
	234	{
	235	int ret = i2c_smbus_read_i2c_block_data(client, GPIO_INT_STAT1, 3, buf);
	236
	237	if (ret < 0)
	238	dev_err(&client->dev, "Read INT_STAT Error\n");
	239
	240	return ret;
	241	}
	242
	243	static irqreturn_t adp5588_irq_handler(int irq, void *devid)
	244	{
	245	struct adp5588_gpio *dev = devid;
	246	unsigned status, bank, bit, pending;
	247	int ret;
	248	status = adp5588_gpio_read(dev->client, INT_STAT);
	249
	250	if (status & ADP5588_GPI_INT) {
	251	ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat);
	252	if (ret < 0)
	253	memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));
	254
078dc65e	255	for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
459773ae MH	256	bank++, bit = 0) {
	257	pending = dev->irq_stat[bank] & dev->irq_mask[bank];
	258
	259	while (pending) {
	260	if (pending & (1 << bit)) {
	261	handle_nested_irq(dev->irq_base +
	262	(bank << 3) + bit);
	263	pending &= ~(1 << bit);
	264
	265	}
	266	bit++;
	267	}
	268	}
	269	}
	270
	271	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */
	272
	273	return IRQ_HANDLED;
	274	}
	275
	276	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	277	{
	278	struct i2c_client *client = dev->client;
	279	struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
	280	unsigned gpio;
	281	int ret;
	282
	283	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	284	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
	285	adp5588_gpio_read_intstat(client, dev->irq_stat); /* read to clear */
	286
	287	dev->irq_base = pdata->irq_base;
	288	mutex_init(&dev->irq_lock);
	289
	290	for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) {
	291	int irq = gpio + dev->irq_base;
b51804bc TG	292	irq_set_chip_data(irq, dev);
b51804bc TG	293	irq_set_chip_and_handler(irq, &adp5588_irq_chip,
459773ae	294	handle_level_irq);
b51804bc	295	irq_set_nested_thread(irq, 1);
459773ae MH	296	#ifdef CONFIG_ARM
	297	/*
	298	* ARM needs us to explicitly flag the IRQ as VALID,
	299	* once we do so, it will also set the noprobe.
	300	*/
	301	set_irq_flags(irq, IRQF_VALID);
	302	#else
b51804bc	303	irq_set_noprobe(irq);
459773ae MH	304	#endif
	305	}
	306
	307	ret = request_threaded_irq(client->irq,
	308	NULL,
	309	adp5588_irq_handler,
	310	IRQF_TRIGGER_FALLING \| IRQF_ONESHOT,
	311	dev_name(&client->dev), dev);
	312	if (ret) {
	313	dev_err(&client->dev, "failed to request irq %d\n",
	314	client->irq);
	315	goto out;
	316	}
	317
	318	dev->gpio_chip.to_irq = adp5588_gpio_to_irq;
	319	adp5588_gpio_write(client, CFG,
	320	ADP5588_AUTO_INC \| ADP5588_INT_CFG \| ADP5588_GPI_INT);
	321
	322	return 0;
	323
	324	out:
	325	dev->irq_base = 0;
	326	return ret;
	327	}
	328
	329	static void adp5588_irq_teardown(struct adp5588_gpio *dev)
	330	{
	331	if (dev->irq_base)
	332	free_irq(dev->client->irq, dev);
	333	}
	334
	335	#else
	336	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	337	{
	338	struct i2c_client *client = dev->client;
	339	dev_warn(&client->dev, "interrupt support not compiled in\n");
	340
	341	return 0;
	342	}
	343
	344	static void adp5588_irq_teardown(struct adp5588_gpio *dev)
	345	{
	346	}
	347	#endif /* CONFIG_GPIO_ADP5588_IRQ */
	348
3836309d	349	static int adp5588_gpio_probe(struct i2c_client *client,
80884094 MH	350	const struct i2c_device_id *id)
	351	{
	352	struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
	353	struct adp5588_gpio *dev;
	354	struct gpio_chip *gc;
	355	int ret, i, revid;
	356
	357	if (pdata == NULL) {
	358	dev_err(&client->dev, "missing platform data\n");
	359	return -ENODEV;
	360	}
	361
	362	if (!i2c_check_functionality(client->adapter,
	363	I2C_FUNC_SMBUS_BYTE_DATA)) {
	364	dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
	365	return -EIO;
	366	}
	367
	368	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
	369	if (dev == NULL) {
	370	dev_err(&client->dev, "failed to alloc memory\n");
	371	return -ENOMEM;
	372	}
	373
	374	dev->client = client;
	375
	376	gc = &dev->gpio_chip;
	377	gc->direction_input = adp5588_gpio_direction_input;
	378	gc->direction_output = adp5588_gpio_direction_output;
	379	gc->get = adp5588_gpio_get_value;
	380	gc->set = adp5588_gpio_set_value;
	381	gc->can_sleep = 1;
	382
	383	gc->base = pdata->gpio_start;
459773ae	384	gc->ngpio = ADP5588_MAXGPIO;
80884094 MH	385	gc->label = client->name;
	386	gc->owner = THIS_MODULE;
	387
	388	mutex_init(&dev->lock);
	389
80884094 MH	390	ret = adp5588_gpio_read(dev->client, DEV_ID);
	391	if (ret < 0)
	392	goto err;
	393
	394	revid = ret & ADP5588_DEVICE_ID_MASK;
	395
459773ae	396	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
80884094 MH	397	dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
	398	dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
	399	ret \|= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
	400	ret \|= adp5588_gpio_write(client, GPIO_PULL1 + i,
	401	(pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
459773ae	402	ret \|= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
80884094 MH	403	if (ret)
	404	goto err;
	405	}
	406
459773ae MH	407	if (pdata->irq_base) {
	408	if (WA_DELAYED_READOUT_REVID(revid)) {
	409	dev_warn(&client->dev, "GPIO int not supported\n");
	410	} else {
	411	ret = adp5588_irq_setup(dev);
	412	if (ret)
	413	goto err;
	414	}
	415	}
	416
80884094 MH	417	ret = gpiochip_add(&dev->gpio_chip);
80884094 MH	418	if (ret)
459773ae	419	goto err_irq;
80884094	420
64842aad GL	421	dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n",
64842aad GL	422	pdata->irq_base, revid);
80884094 MH	423
	424	if (pdata->setup) {
	425	ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
	426	if (ret < 0)
	427	dev_warn(&client->dev, "setup failed, %d\n", ret);
	428	}
	429
	430	i2c_set_clientdata(client, dev);
459773ae	431
80884094 MH	432	return 0;
80884094 MH	433
459773ae MH	434	err_irq:
459773ae MH	435	adp5588_irq_teardown(dev);
80884094 MH	436	err:
	437	kfree(dev);
	438	return ret;
	439	}
	440
206210ce	441	static int adp5588_gpio_remove(struct i2c_client *client)
80884094 MH	442	{
	443	struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
	444	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	445	int ret;
	446
	447	if (pdata->teardown) {
	448	ret = pdata->teardown(client,
	449	dev->gpio_chip.base, dev->gpio_chip.ngpio,
	450	pdata->context);
	451	if (ret < 0) {
	452	dev_err(&client->dev, "teardown failed %d\n", ret);
	453	return ret;
	454	}
	455	}
	456
459773ae MH	457	if (dev->irq_base)
	458	free_irq(dev->client->irq, dev);
	459
80884094 MH	460	ret = gpiochip_remove(&dev->gpio_chip);
	461	if (ret) {
	462	dev_err(&client->dev, "gpiochip_remove failed %d\n", ret);
	463	return ret;
	464	}
	465
	466	kfree(dev);
	467	return 0;
	468	}
	469
	470	static const struct i2c_device_id adp5588_gpio_id[] = {
	471	{DRV_NAME, 0},
	472	{}
	473	};
	474
	475	MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
	476
	477	static struct i2c_driver adp5588_gpio_driver = {
	478	.driver = {
	479	.name = DRV_NAME,
	480	},
	481	.probe = adp5588_gpio_probe,
8283c4ff	482	.remove = adp5588_gpio_remove,
80884094 MH	483	.id_table = adp5588_gpio_id,
	484	};
	485
c8554d32	486	module_i2c_driver(adp5588_gpio_driver);
80884094 MH	487
	488	MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
	489	MODULE_DESCRIPTION("GPIO ADP5588 Driver");
	490	MODULE_LICENSE("GPL");