Merge tag 'v3.10.108' into update
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / cpufreq / exynos-cpufreq.h
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c4aaa295 1/*
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2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - CPUFreq support
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12enum cpufreq_level_index {
13 L0, L1, L2, L3, L4,
14 L5, L6, L7, L8, L9,
15 L10, L11, L12, L13, L14,
16 L15, L16, L17, L18, L19,
17 L20,
18};
19
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20#define APLL_FREQ(f, a0, a1, a2, a3, a4, a5, a6, a7, b0, b1, b2, m, p, s) \
21 { \
22 .freq = (f) * 1000, \
23 .clk_div_cpu0 = ((a0) | (a1) << 4 | (a2) << 8 | (a3) << 12 | \
24 (a4) << 16 | (a5) << 20 | (a6) << 24 | (a7) << 28), \
25 .clk_div_cpu1 = (b0 << 0 | b1 << 4 | b2 << 8), \
26 .mps = ((m) << 16 | (p) << 8 | (s)), \
27 }
28
29struct apll_freq {
30 unsigned int freq;
31 u32 clk_div_cpu0;
32 u32 clk_div_cpu1;
33 u32 mps;
34};
35
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36struct exynos_dvfs_info {
37 unsigned long mpll_freq_khz;
38 unsigned int pll_safe_idx;
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39 struct clk *cpu_clk;
40 unsigned int *volt_table;
41 struct cpufreq_frequency_table *freq_table;
42 void (*set_freq)(unsigned int, unsigned int);
43 bool (*need_apll_change)(unsigned int, unsigned int);
44};
45
46extern int exynos4210_cpufreq_init(struct exynos_dvfs_info *);
a35c5051 47extern int exynos4x12_cpufreq_init(struct exynos_dvfs_info *);
562a6cbe 48extern int exynos5250_cpufreq_init(struct exynos_dvfs_info *);