[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / clocksource / i8253.c

/*
 * i8253 PIT clocksource
 */
#include <linux/clockchips.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/spinlock.h>
#include <linux/timex.h>
#include <linux/module.h>
#include <linux/i8253.h>
#include <linux/smp.h>

/*
 * Protects access to I/O ports
 *
 * 0040-0043 : timer0, i8253 / i8254
 * 0061-0061 : NMI Control Register which contains two speaker control bits.
 */
DEFINE_RAW_SPINLOCK(i8253_lock);
EXPORT_SYMBOL(i8253_lock);

#ifdef CONFIG_CLKSRC_I8253
/*
 * Since the PIT overflows every tick, its not very useful
 * to just read by itself. So use jiffies to emulate a free
 * running counter:
 */
static cycle_t i8253_read(struct clocksource *cs)
{
	static int old_count;
	static u32 old_jifs;
	unsigned long flags;
	int count;
	u32 jifs;

	raw_spin_lock_irqsave(&i8253_lock, flags);
	/*
	 * Although our caller may have the read side of jiffies_lock,
	 * this is now a seqlock, and we are cheating in this routine
	 * by having side effects on state that we cannot undo if
	 * there is a collision on the seqlock and our caller has to
	 * retry.  (Namely, old_jifs and old_count.)  So we must treat
	 * jiffies as volatile despite the lock.  We read jiffies
	 * before latching the timer count to guarantee that although
	 * the jiffies value might be older than the count (that is,
	 * the counter may underflow between the last point where
	 * jiffies was incremented and the point where we latch the
	 * count), it cannot be newer.
	 */
	jifs = jiffies;
	outb_p(0x00, PIT_MODE);	/* latch the count ASAP */
	count = inb_p(PIT_CH0);	/* read the latched count */
	count |= inb_p(PIT_CH0) << 8;

	/* VIA686a test code... reset the latch if count > max + 1 */
	if (count > PIT_LATCH) {
		outb_p(0x34, PIT_MODE);
		outb_p(PIT_LATCH & 0xff, PIT_CH0);
		outb_p(PIT_LATCH >> 8, PIT_CH0);
		count = PIT_LATCH - 1;
	}

	/*
	 * It's possible for count to appear to go the wrong way for a
	 * couple of reasons:
	 *
	 *  1. The timer counter underflows, but we haven't handled the
	 *     resulting interrupt and incremented jiffies yet.
	 *  2. Hardware problem with the timer, not giving us continuous time,
	 *     the counter does small "jumps" upwards on some Pentium systems,
	 *     (see c't 95/10 page 335 for Neptun bug.)
	 *
	 * Previous attempts to handle these cases intelligently were
	 * buggy, so we just do the simple thing now.
	 */
	if (count > old_count && jifs == old_jifs)
		count = old_count;

	old_count = count;
	old_jifs = jifs;

	raw_spin_unlock_irqrestore(&i8253_lock, flags);

	count = (PIT_LATCH - 1) - count;

	return (cycle_t)(jifs * PIT_LATCH) + count;
}

static struct clocksource i8253_cs = {
	.name		= "pit",
	.rating		= 110,
	.read		= i8253_read,
	.mask		= CLOCKSOURCE_MASK(32),
};

int __init clocksource_i8253_init(void)
{
	return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
}
#endif

#ifdef CONFIG_CLKEVT_I8253
/*
 * Initialize the PIT timer.
 *
 * This is also called after resume to bring the PIT into operation again.
 */
static void init_pit_timer(enum clock_event_mode mode,
			   struct clock_event_device *evt)
{
	raw_spin_lock(&i8253_lock);

	switch (mode) {
	case CLOCK_EVT_MODE_PERIODIC:
		/* binary, mode 2, LSB/MSB, ch 0 */
		outb_p(0x34, PIT_MODE);
		outb_p(PIT_LATCH & 0xff , PIT_CH0);	/* LSB */
		outb_p(PIT_LATCH >> 8 , PIT_CH0);		/* MSB */
		break;

	case CLOCK_EVT_MODE_SHUTDOWN:
	case CLOCK_EVT_MODE_UNUSED:
		if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
		    evt->mode == CLOCK_EVT_MODE_ONESHOT) {
			outb_p(0x30, PIT_MODE);
			outb_p(0, PIT_CH0);
			outb_p(0, PIT_CH0);
		}
		break;

	case CLOCK_EVT_MODE_ONESHOT:
		/* One shot setup */
		outb_p(0x38, PIT_MODE);
		break;

	case CLOCK_EVT_MODE_RESUME:
		/* Nothing to do here */
		break;
	}
	raw_spin_unlock(&i8253_lock);
}

/*
 * Program the next event in oneshot mode
 *
 * Delta is given in PIT ticks
 */
static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
{
	raw_spin_lock(&i8253_lock);
	outb_p(delta & 0xff , PIT_CH0);	/* LSB */
	outb_p(delta >> 8 , PIT_CH0);		/* MSB */
	raw_spin_unlock(&i8253_lock);

	return 0;
}

/*
 * On UP the PIT can serve all of the possible timer functions. On SMP systems
 * it can be solely used for the global tick.
 */
struct clock_event_device i8253_clockevent = {
	.name		= "pit",
	.features	= CLOCK_EVT_FEAT_PERIODIC,
	.set_mode	= init_pit_timer,
	.set_next_event = pit_next_event,
};

/*
 * Initialize the conversion factor and the min/max deltas of the clock event
 * structure and register the clock event source with the framework.
 */
void __init clockevent_i8253_init(bool oneshot)
{
	if (oneshot)
		i8253_clockevent.features |= CLOCK_EVT_FEAT_ONESHOT;
	/*
	 * Start pit with the boot cpu mask. x86 might make it global
	 * when it is used as broadcast device later.
	 */
	i8253_clockevent.cpumask = cpumask_of(smp_processor_id());

	clockevents_config_and_register(&i8253_clockevent, PIT_TICK_RATE,
					0xF, 0x7FFF);
}
#endif
Commit	Line	Data
89c0b8e2 RK	1	/*
	2	* i8253 PIT clocksource
	3	*/
e6220bdc	4	#include <linux/clockchips.h>
89c0b8e2 RK	5	#include <linux/init.h>
	6	#include <linux/io.h>
	7	#include <linux/spinlock.h>
	8	#include <linux/timex.h>
15f304b6	9	#include <linux/module.h>
334955ef	10	#include <linux/i8253.h>
e6220bdc	11	#include <linux/smp.h>
89c0b8e2	12
15f304b6 RB	13	/*
	14	* Protects access to I/O ports
	15	*
	16	* 0040-0043 : timer0, i8253 / i8254
	17	* 0061-0061 : NMI Control Register which contains two speaker control bits.
	18	*/
	19	DEFINE_RAW_SPINLOCK(i8253_lock);
	20	EXPORT_SYMBOL(i8253_lock);
	21
	22	#ifdef CONFIG_CLKSRC_I8253
89c0b8e2 RK	23	/*
	24	* Since the PIT overflows every tick, its not very useful
	25	* to just read by itself. So use jiffies to emulate a free
	26	* running counter:
	27	*/
	28	static cycle_t i8253_read(struct clocksource *cs)
	29	{
	30	static int old_count;
	31	static u32 old_jifs;
	32	unsigned long flags;
	33	int count;
	34	u32 jifs;
	35
	36	raw_spin_lock_irqsave(&i8253_lock, flags);
	37	/*
d6ad4187	38	* Although our caller may have the read side of jiffies_lock,
89c0b8e2 RK	39	* this is now a seqlock, and we are cheating in this routine
	40	* by having side effects on state that we cannot undo if
	41	* there is a collision on the seqlock and our caller has to
	42	* retry. (Namely, old_jifs and old_count.) So we must treat
	43	* jiffies as volatile despite the lock. We read jiffies
	44	* before latching the timer count to guarantee that although
	45	* the jiffies value might be older than the count (that is,
	46	* the counter may underflow between the last point where
	47	* jiffies was incremented and the point where we latch the
	48	* count), it cannot be newer.
	49	*/
	50	jifs = jiffies;
e6220bdc TG	51	outb_p(0x00, PIT_MODE); /* latch the count ASAP */
	52	count = inb_p(PIT_CH0); /* read the latched count */
	53	count \|= inb_p(PIT_CH0) << 8;
89c0b8e2 RK	54
89c0b8e2 RK	55	/* VIA686a test code... reset the latch if count > max + 1 */
5f724e84	56	if (count > PIT_LATCH) {
e6220bdc TG	57	outb_p(0x34, PIT_MODE);
	58	outb_p(PIT_LATCH & 0xff, PIT_CH0);
	59	outb_p(PIT_LATCH >> 8, PIT_CH0);
89c0b8e2 RK	60	count = PIT_LATCH - 1;
	61	}
	62
	63	/*
	64	* It's possible for count to appear to go the wrong way for a
	65	* couple of reasons:
	66	*
	67	* 1. The timer counter underflows, but we haven't handled the
	68	* resulting interrupt and incremented jiffies yet.
	69	* 2. Hardware problem with the timer, not giving us continuous time,
	70	* the counter does small "jumps" upwards on some Pentium systems,
	71	* (see c't 95/10 page 335 for Neptun bug.)
	72	*
	73	* Previous attempts to handle these cases intelligently were
	74	* buggy, so we just do the simple thing now.
	75	*/
	76	if (count > old_count && jifs == old_jifs)
	77	count = old_count;
	78
	79	old_count = count;
	80	old_jifs = jifs;
	81
	82	raw_spin_unlock_irqrestore(&i8253_lock, flags);
	83
	84	count = (PIT_LATCH - 1) - count;
	85
	86	return (cycle_t)(jifs * PIT_LATCH) + count;
	87	}
	88
	89	static struct clocksource i8253_cs = {
	90	.name = "pit",
	91	.rating = 110,
	92	.read = i8253_read,
	93	.mask = CLOCKSOURCE_MASK(32),
	94	};
	95
	96	int __init clocksource_i8253_init(void)
	97	{
	98	return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
	99	}
15f304b6	100	#endif
e6220bdc TG	101
	102	#ifdef CONFIG_CLKEVT_I8253
	103	/*
	104	* Initialize the PIT timer.
	105	*
	106	* This is also called after resume to bring the PIT into operation again.
	107	*/
	108	static void init_pit_timer(enum clock_event_mode mode,
	109	struct clock_event_device *evt)
	110	{
	111	raw_spin_lock(&i8253_lock);
	112
	113	switch (mode) {
	114	case CLOCK_EVT_MODE_PERIODIC:
	115	/* binary, mode 2, LSB/MSB, ch 0 */
	116	outb_p(0x34, PIT_MODE);
5f724e84 DS	117	outb_p(PIT_LATCH & 0xff , PIT_CH0); /* LSB */
5f724e84 DS	118	outb_p(PIT_LATCH >> 8 , PIT_CH0); /* MSB */
e6220bdc TG	119	break;
	120
	121	case CLOCK_EVT_MODE_SHUTDOWN:
	122	case CLOCK_EVT_MODE_UNUSED:
	123	if (evt->mode == CLOCK_EVT_MODE_PERIODIC \|\|
	124	evt->mode == CLOCK_EVT_MODE_ONESHOT) {
	125	outb_p(0x30, PIT_MODE);
	126	outb_p(0, PIT_CH0);
	127	outb_p(0, PIT_CH0);
	128	}
	129	break;
	130
	131	case CLOCK_EVT_MODE_ONESHOT:
	132	/* One shot setup */
	133	outb_p(0x38, PIT_MODE);
	134	break;
	135
	136	case CLOCK_EVT_MODE_RESUME:
	137	/* Nothing to do here */
	138	break;
	139	}
	140	raw_spin_unlock(&i8253_lock);
	141	}
	142
	143	/*
	144	* Program the next event in oneshot mode
	145	*
	146	* Delta is given in PIT ticks
	147	*/
	148	static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
	149	{
	150	raw_spin_lock(&i8253_lock);
	151	outb_p(delta & 0xff , PIT_CH0); /* LSB */
	152	outb_p(delta >> 8 , PIT_CH0); /* MSB */
	153	raw_spin_unlock(&i8253_lock);
	154
	155	return 0;
	156	}
	157
	158	/*
	159	* On UP the PIT can serve all of the possible timer functions. On SMP systems
	160	* it can be solely used for the global tick.
	161	*/
	162	struct clock_event_device i8253_clockevent = {
	163	.name = "pit",
	164	.features = CLOCK_EVT_FEAT_PERIODIC,
	165	.set_mode = init_pit_timer,
	166	.set_next_event = pit_next_event,
	167	};
	168
	169	/*
	170	* Initialize the conversion factor and the min/max deltas of the clock event
	171	* structure and register the clock event source with the framework.
	172	*/
	173	void __init clockevent_i8253_init(bool oneshot)
	174	{
	175	if (oneshot)
	176	i8253_clockevent.features \|= CLOCK_EVT_FEAT_ONESHOT;
	177	/*
	178	* Start pit with the boot cpu mask. x86 might make it global
	179	* when it is used as broadcast device later.
	180	*/
	181	i8253_clockevent.cpumask = cpumask_of(smp_processor_id());
	182
183	clockevents_config_and_register(&i8253_clockevent, PIT_TICK_RATE,
184	0xF, 0x7FFF);
185	}
186	#endif