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tty: move ipwireless driver from drivers/char/pcmcia/ to drivers/tty/
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / stallion.c
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1da177e4
LT		 1/*****************************************************************************/
2
3/*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (C) 1996-1999 Stallion Technologies
7 * Copyright (C) 1994-1996 Greg Ungerer.
8 *
9 * This code is loosely based on the Linux serial driver, written by
10 * Linus Torvalds, Theodore T'so and others.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26
27/*****************************************************************************/
28
1da177e4 29#include <linux/module.h>
d43c36dc 30#include <linux/sched.h>
1da177e4
LT		 31#include <linux/slab.h>
32#include <linux/interrupt.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
35#include <linux/serial.h>
8561c44c 36#include <linux/seq_file.h>
1da177e4
LT		 37#include <linux/cd1400.h>
38#include <linux/sc26198.h>
39#include <linux/comstats.h>
40#include <linux/stallion.h>
41#include <linux/ioport.h>
42#include <linux/init.h>
1da177e4
LT		 43#include <linux/device.h>
44#include <linux/delay.h>
843b568c 45#include <linux/ctype.h>
1da177e4
LT		 46
47#include <asm/io.h>
48#include <asm/uaccess.h>
49
1da177e4 50#include <linux/pci.h>
1da177e4
LT		 51
52/*****************************************************************************/
53
54/*
55 * Define different board types. Use the standard Stallion "assigned"
56 * board numbers. Boards supported in this driver are abbreviated as
57 * EIO = EasyIO and ECH = EasyConnection 8/32.
58 */
59#define BRD_EASYIO 20
60#define BRD_ECH 21
61#define BRD_ECHMC 22
62#define BRD_ECHPCI 26
63#define BRD_ECH64PCI 27
64#define BRD_EASYIOPCI 28
65
843b568c 66struct stlconf {
6b2c9457 67 unsigned int brdtype;
1da177e4
LT		 68 int ioaddr1;
69 int ioaddr2;
70 unsigned long memaddr;
71 int irq;
72 int irqtype;
1da177e4
LT		 73};
74
843b568c 75static unsigned int stl_nrbrds;
1da177e4
LT		 76
77/*****************************************************************************/
78
79/*
80 * Define some important driver characteristics. Device major numbers
81 * allocated as per Linux Device Registry.
82 */
83#ifndef STL_SIOMEMMAJOR
84#define STL_SIOMEMMAJOR 28
85#endif
86#ifndef STL_SERIALMAJOR
87#define STL_SERIALMAJOR 24
88#endif
89#ifndef STL_CALLOUTMAJOR
90#define STL_CALLOUTMAJOR 25
91#endif
92
93/*
94 * Set the TX buffer size. Bigger is better, but we don't want
95 * to chew too much memory with buffers!
96 */
97#define STL_TXBUFLOW 512
98#define STL_TXBUFSIZE 4096
99
100/*****************************************************************************/
101
102/*
103 * Define our local driver identity first. Set up stuff to deal with
104 * all the local structures required by a serial tty driver.
105 */
106static char *stl_drvtitle = "Stallion Multiport Serial Driver";
107static char *stl_drvname = "stallion";
108static char *stl_drvversion = "5.6.0";
109
110static struct tty_driver *stl_serial;
111
1da177e4
LT		 112/*
113 * Define a local default termios struct. All ports will be created
114 * with this termios initially. Basically all it defines is a raw port
115 * at 9600, 8 data bits, 1 stop bit.
116 */
606d099c 117static struct ktermios stl_deftermios = {
1da177e4
LT		 118 .c_cflag = (B9600 | CS8 | CREAD | HUPCL | CLOCAL),
119 .c_cc = INIT_C_CC,
606d099c
AC		 120 .c_ispeed = 9600,
121 .c_ospeed = 9600,
1da177e4
LT		 122};
123
1da177e4
LT		 124/*
125 * Define global place to put buffer overflow characters.
126 */
127static char stl_unwanted[SC26198_RXFIFOSIZE];
128
129/*****************************************************************************/
130
79cfe7ab 131static DEFINE_MUTEX(stl_brdslock);
ca7ed0f2 132static struct stlbrd *stl_brds[STL_MAXBRDS];
1da177e4 133
31f35939
AC		 134static const struct tty_port_operations stl_port_ops;
135
1da177e4
LT		 136/*
137 * Per board state flags. Used with the state field of the board struct.
138 * Not really much here!
139 */
140#define BRD_FOUND 0x1
fc06b5cf
JS		 141#define STL_PROBED 0x2
142
1da177e4
LT		 143
144/*
145 * Define the port structure istate flags. These set of flags are
146 * modified at interrupt time - so setting and reseting them needs
147 * to be atomic. Use the bit clear/setting routines for this.
148 */
149#define ASYI_TXBUSY 1
150#define ASYI_TXLOW 2
ccfea3c9 151#define ASYI_TXFLOWED 3
1da177e4
LT		 152
153/*
154 * Define an array of board names as printable strings. Handy for
155 * referencing boards when printing trace and stuff.
156 */
157static char *stl_brdnames[] = {
615e4a71
JS		 158 NULL,
159 NULL,
160 NULL,
161 NULL,
162 NULL,
163 NULL,
164 NULL,
165 NULL,
166 NULL,
167 NULL,
168 NULL,
169 NULL,
170 NULL,
171 NULL,
172 NULL,
173 NULL,
174 NULL,
175 NULL,
176 NULL,
177 NULL,
1da177e4
LT		 178 "EasyIO",
179 "EC8/32-AT",
180 "EC8/32-MC",
615e4a71
JS		 181 NULL,
182 NULL,
183 NULL,
1da177e4
LT		 184 "EC8/32-PCI",
185 "EC8/64-PCI",
186 "EasyIO-PCI",
187};
188
189/*****************************************************************************/
190
191/*
192 * Define some string labels for arguments passed from the module
193 * load line. These allow for easy board definitions, and easy
194 * modification of the io, memory and irq resoucres.
195 */
6b2c9457 196static unsigned int stl_nargs;
1da177e4
LT		 197static char *board0[4];
198static char *board1[4];
199static char *board2[4];
200static char *board3[4];
201
202static char **stl_brdsp[] = {
203 (char **) &board0,
204 (char **) &board1,
205 (char **) &board2,
206 (char **) &board3
207};
208
209/*
210 * Define a set of common board names, and types. This is used to
211 * parse any module arguments.
212 */
213
ca7ed0f2 214static struct {
1da177e4
LT		 215 char *name;
216 int type;
ca7ed0f2 217} stl_brdstr[] = {
1da177e4
LT		 218 { "easyio", BRD_EASYIO },
219 { "eio", BRD_EASYIO },
220 { "20", BRD_EASYIO },
221 { "ec8/32", BRD_ECH },
222 { "ec8/32-at", BRD_ECH },
223 { "ec8/32-isa", BRD_ECH },
224 { "ech", BRD_ECH },
225 { "echat", BRD_ECH },
226 { "21", BRD_ECH },
227 { "ec8/32-mc", BRD_ECHMC },
228 { "ec8/32-mca", BRD_ECHMC },
229 { "echmc", BRD_ECHMC },
230 { "echmca", BRD_ECHMC },
231 { "22", BRD_ECHMC },
232 { "ec8/32-pc", BRD_ECHPCI },
233 { "ec8/32-pci", BRD_ECHPCI },
234 { "26", BRD_ECHPCI },
235 { "ec8/64-pc", BRD_ECH64PCI },
236 { "ec8/64-pci", BRD_ECH64PCI },
237 { "ech-pci", BRD_ECH64PCI },
238 { "echpci", BRD_ECH64PCI },
239 { "echpc", BRD_ECH64PCI },
240 { "27", BRD_ECH64PCI },
241 { "easyio-pc", BRD_EASYIOPCI },
242 { "easyio-pci", BRD_EASYIOPCI },
243 { "eio-pci", BRD_EASYIOPCI },
244 { "eiopci", BRD_EASYIOPCI },
245 { "28", BRD_EASYIOPCI },
246};
247
248/*
249 * Define the module agruments.
250 */
1da177e4
LT		 251
252module_param_array(board0, charp, &stl_nargs, 0);
253MODULE_PARM_DESC(board0, "Board 0 config -> name[,ioaddr[,ioaddr2][,irq]]");
254module_param_array(board1, charp, &stl_nargs, 0);
255MODULE_PARM_DESC(board1, "Board 1 config -> name[,ioaddr[,ioaddr2][,irq]]");
256module_param_array(board2, charp, &stl_nargs, 0);
257MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,ioaddr2][,irq]]");
258module_param_array(board3, charp, &stl_nargs, 0);
259MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,ioaddr2][,irq]]");
260
261/*****************************************************************************/
262
263/*
264 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
265 * to the directly accessible io ports of these boards (not the uarts -
266 * they are in cd1400.h and sc26198.h).
267 */
268#define EIO_8PORTRS 0x04
269#define EIO_4PORTRS 0x05
270#define EIO_8PORTDI 0x00
271#define EIO_8PORTM 0x06
272#define EIO_MK3 0x03
273#define EIO_IDBITMASK 0x07
274
275#define EIO_BRDMASK 0xf0
276#define ID_BRD4 0x10
277#define ID_BRD8 0x20
278#define ID_BRD16 0x30
279
280#define EIO_INTRPEND 0x08
281#define EIO_INTEDGE 0x00
282#define EIO_INTLEVEL 0x08
283#define EIO_0WS 0x10
284
285#define ECH_ID 0xa0
286#define ECH_IDBITMASK 0xe0
287#define ECH_BRDENABLE 0x08
288#define ECH_BRDDISABLE 0x00
289#define ECH_INTENABLE 0x01
290#define ECH_INTDISABLE 0x00
291#define ECH_INTLEVEL 0x02
292#define ECH_INTEDGE 0x00
293#define ECH_INTRPEND 0x01
294#define ECH_BRDRESET 0x01
295
296#define ECHMC_INTENABLE 0x01
297#define ECHMC_BRDRESET 0x02
298
299#define ECH_PNLSTATUS 2
300#define ECH_PNL16PORT 0x20
301#define ECH_PNLIDMASK 0x07
302#define ECH_PNLXPID 0x40
303#define ECH_PNLINTRPEND 0x80
304
305#define ECH_ADDR2MASK 0x1e0
306
307/*
308 * Define the vector mapping bits for the programmable interrupt board
309 * hardware. These bits encode the interrupt for the board to use - it
310 * is software selectable (except the EIO-8M).
311 */
312static unsigned char stl_vecmap[] = {
313 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
314 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
315};
316
b65b5b59
AC		 317/*
318 * Lock ordering is that you may not take stallion_lock holding
319 * brd_lock.
320 */
321
322static spinlock_t brd_lock; /* Guard the board mapping */
323static spinlock_t stallion_lock; /* Guard the tty driver */
324
1da177e4
LT		 325/*
326 * Set up enable and disable macros for the ECH boards. They require
327 * the secondary io address space to be activated and deactivated.
328 * This way all ECH boards can share their secondary io region.
329 * If this is an ECH-PCI board then also need to set the page pointer
330 * to point to the correct page.
331 */
332#define BRDENABLE(brdnr,pagenr) \
333 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
334 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE), \
335 stl_brds[(brdnr)]->ioctrl); \
336 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
337 outb((pagenr), stl_brds[(brdnr)]->ioctrl);
338
339#define BRDDISABLE(brdnr) \
340 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
341 outb((stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE), \
342 stl_brds[(brdnr)]->ioctrl);
343
344#define STL_CD1400MAXBAUD 230400
345#define STL_SC26198MAXBAUD 460800
346
347#define STL_BAUDBASE 115200
348#define STL_CLOSEDELAY (5 * HZ / 10)
349
350/*****************************************************************************/
351
1da177e4
LT		 352/*
353 * Define the Stallion PCI vendor and device IDs.
354 */
355#ifndef PCI_VENDOR_ID_STALLION
356#define PCI_VENDOR_ID_STALLION 0x124d
357#endif
358#ifndef PCI_DEVICE_ID_ECHPCI832
359#define PCI_DEVICE_ID_ECHPCI832 0x0000
360#endif
361#ifndef PCI_DEVICE_ID_ECHPCI864
362#define PCI_DEVICE_ID_ECHPCI864 0x0002
363#endif
364#ifndef PCI_DEVICE_ID_EIOPCI
365#define PCI_DEVICE_ID_EIOPCI 0x0003
366#endif
367
368/*
369 * Define structure to hold all Stallion PCI boards.
370 */
1da177e4 371
b1b84fe0
JS		 372static struct pci_device_id stl_pcibrds[] = {
373 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI864),
374 .driver_data = BRD_ECH64PCI },
375 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_EIOPCI),
376 .driver_data = BRD_EASYIOPCI },
377 { PCI_DEVICE(PCI_VENDOR_ID_STALLION, PCI_DEVICE_ID_ECHPCI832),
378 .driver_data = BRD_ECHPCI },
379 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87410),
380 .driver_data = BRD_ECHPCI },
381 { }
382};
383MODULE_DEVICE_TABLE(pci, stl_pcibrds);
1da177e4
LT		 384
385/*****************************************************************************/
386
387/*
388 * Define macros to extract a brd/port number from a minor number.
389 */
390#define MINOR2BRD(min) (((min) & 0xc0) >> 6)
391#define MINOR2PORT(min) ((min) & 0x3f)
392
393/*
394 * Define a baud rate table that converts termios baud rate selector
395 * into the actual baud rate value. All baud rate calculations are
396 * based on the actual baud rate required.
397 */
398static unsigned int stl_baudrates[] = {
399 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, 4800,
400 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600
401};
402
1da177e4
LT		 403/*****************************************************************************/
404
405/*
406 * Declare all those functions in this driver!
407 */
408
894cb917 409static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg);
ca7ed0f2 410static int stl_brdinit(struct stlbrd *brdp);
d18a750f 411static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp);
ca7ed0f2 412static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp);
1da177e4 413
1da177e4
LT		 414/*
415 * CD1400 uart specific handling functions.
416 */
ca7ed0f2
JS		 417static void stl_cd1400setreg(struct stlport *portp, int regnr, int value);
418static int stl_cd1400getreg(struct stlport *portp, int regnr);
419static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value);
420static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
421static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 422static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 423static int stl_cd1400getsignals(struct stlport *portp);
424static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts);
425static void stl_cd1400ccrwait(struct stlport *portp);
426static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx);
427static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx);
428static void stl_cd1400disableintrs(struct stlport *portp);
429static void stl_cd1400sendbreak(struct stlport *portp, int len);
430static void stl_cd1400flowctrl(struct stlport *portp, int state);
431static void stl_cd1400sendflow(struct stlport *portp, int state);
432static void stl_cd1400flush(struct stlport *portp);
433static int stl_cd1400datastate(struct stlport *portp);
434static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase);
435static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase);
436static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr);
437static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr);
438static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr);
439
440static inline int stl_cd1400breakisr(struct stlport *portp, int ioaddr);
1da177e4
LT		 441
442/*
443 * SC26198 uart specific handling functions.
444 */
ca7ed0f2
JS		 445static void stl_sc26198setreg(struct stlport *portp, int regnr, int value);
446static int stl_sc26198getreg(struct stlport *portp, int regnr);
447static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value);
448static int stl_sc26198getglobreg(struct stlport *portp, int regnr);
449static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp);
450static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 451static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 452static int stl_sc26198getsignals(struct stlport *portp);
453static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts);
454static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx);
455static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx);
456static void stl_sc26198disableintrs(struct stlport *portp);
457static void stl_sc26198sendbreak(struct stlport *portp, int len);
458static void stl_sc26198flowctrl(struct stlport *portp, int state);
459static void stl_sc26198sendflow(struct stlport *portp, int state);
460static void stl_sc26198flush(struct stlport *portp);
461static int stl_sc26198datastate(struct stlport *portp);
462static void stl_sc26198wait(struct stlport *portp);
463static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty);
464static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase);
465static void stl_sc26198txisr(struct stlport *port);
466static void stl_sc26198rxisr(struct stlport *port, unsigned int iack);
467static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch);
468static void stl_sc26198rxbadchars(struct stlport *portp);
469static void stl_sc26198otherisr(struct stlport *port, unsigned int iack);
1da177e4
LT		 470
471/*****************************************************************************/
472
473/*
474 * Generic UART support structure.
475 */
476typedef struct uart {
ca7ed0f2
JS		 477 int (*panelinit)(struct stlbrd *brdp, struct stlpanel *panelp);
478 void (*portinit)(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp);
606d099c 479 void (*setport)(struct stlport *portp, struct ktermios *tiosp);
ca7ed0f2
JS		 480 int (*getsignals)(struct stlport *portp);
481 void (*setsignals)(struct stlport *portp, int dtr, int rts);
482 void (*enablerxtx)(struct stlport *portp, int rx, int tx);
483 void (*startrxtx)(struct stlport *portp, int rx, int tx);
484 void (*disableintrs)(struct stlport *portp);
485 void (*sendbreak)(struct stlport *portp, int len);
486 void (*flowctrl)(struct stlport *portp, int state);
487 void (*sendflow)(struct stlport *portp, int state);
488 void (*flush)(struct stlport *portp);
489 int (*datastate)(struct stlport *portp);
490 void (*intr)(struct stlpanel *panelp, unsigned int iobase);
1da177e4
LT		 491} uart_t;
492
493/*
494 * Define some macros to make calling these functions nice and clean.
495 */
496#define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
497#define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
498#define stl_setport (* ((uart_t *) portp->uartp)->setport)
499#define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
500#define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
501#define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
502#define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
503#define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
504#define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
505#define stl_flowctrl (* ((uart_t *) portp->uartp)->flowctrl)
506#define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
507#define stl_flush (* ((uart_t *) portp->uartp)->flush)
508#define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
509
510/*****************************************************************************/
511
512/*
513 * CD1400 UART specific data initialization.
514 */
515static uart_t stl_cd1400uart = {
516 stl_cd1400panelinit,
517 stl_cd1400portinit,
518 stl_cd1400setport,
519 stl_cd1400getsignals,
520 stl_cd1400setsignals,
521 stl_cd1400enablerxtx,
522 stl_cd1400startrxtx,
523 stl_cd1400disableintrs,
524 stl_cd1400sendbreak,
525 stl_cd1400flowctrl,
526 stl_cd1400sendflow,
527 stl_cd1400flush,
528 stl_cd1400datastate,
529 stl_cd1400eiointr
530};
531
532/*
533 * Define the offsets within the register bank of a cd1400 based panel.
534 * These io address offsets are common to the EasyIO board as well.
535 */
536#define EREG_ADDR 0
537#define EREG_DATA 4
538#define EREG_RXACK 5
539#define EREG_TXACK 6
540#define EREG_MDACK 7
541
542#define EREG_BANKSIZE 8
543
544#define CD1400_CLK 25000000
545#define CD1400_CLK8M 20000000
546
547/*
548 * Define the cd1400 baud rate clocks. These are used when calculating
549 * what clock and divisor to use for the required baud rate. Also
550 * define the maximum baud rate allowed, and the default base baud.
551 */
552static int stl_cd1400clkdivs[] = {
553 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
554};
555
556/*****************************************************************************/
557
558/*
559 * SC26198 UART specific data initization.
560 */
561static uart_t stl_sc26198uart = {
562 stl_sc26198panelinit,
563 stl_sc26198portinit,
564 stl_sc26198setport,
565 stl_sc26198getsignals,
566 stl_sc26198setsignals,
567 stl_sc26198enablerxtx,
568 stl_sc26198startrxtx,
569 stl_sc26198disableintrs,
570 stl_sc26198sendbreak,
571 stl_sc26198flowctrl,
572 stl_sc26198sendflow,
573 stl_sc26198flush,
574 stl_sc26198datastate,
575 stl_sc26198intr
576};
577
578/*
579 * Define the offsets within the register bank of a sc26198 based panel.
580 */
581#define XP_DATA 0
582#define XP_ADDR 1
583#define XP_MODID 2
584#define XP_STATUS 2
585#define XP_IACK 3
586
587#define XP_BANKSIZE 4
588
589/*
590 * Define the sc26198 baud rate table. Offsets within the table
591 * represent the actual baud rate selector of sc26198 registers.
592 */
593static unsigned int sc26198_baudtable[] = {
594 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
595 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
596 230400, 460800, 921600
597};
598
fe971071 599#define SC26198_NRBAUDS ARRAY_SIZE(sc26198_baudtable)
1da177e4
LT		 600
601/*****************************************************************************/
602
603/*
604 * Define the driver info for a user level control device. Used mainly
605 * to get at port stats - only not using the port device itself.
606 */
62322d25 607static const struct file_operations stl_fsiomem = {
1da177e4 608 .owner = THIS_MODULE,
894cb917 609 .unlocked_ioctl = stl_memioctl,
6038f373 610 .llseek = noop_llseek,
1da177e4
LT		 611};
612
ca8eca68 613static struct class *stallion_class;
1da177e4 614
ccfea3c9
JS		 615static void stl_cd_change(struct stlport *portp)
616{
617 unsigned int oldsigs = portp->sigs;
d18a750f 618 struct tty_struct *tty = tty_port_tty_get(&portp->port);
ccfea3c9 619
d18a750f 620 if (!tty)
ccfea3c9
JS		 621 return;
622
623 portp->sigs = stl_getsignals(portp);
624
625 if ((portp->sigs & TIOCM_CD) && ((oldsigs & TIOCM_CD) == 0))
f8ae4764 626 wake_up_interruptible(&portp->port.open_wait);
ccfea3c9
JS		 627
628 if ((oldsigs & TIOCM_CD) && ((portp->sigs & TIOCM_CD) == 0))
f8ae4764 629 if (portp->port.flags & ASYNC_CHECK_CD)
d18a750f
AC		 630 tty_hangup(tty);
631 tty_kref_put(tty);
ccfea3c9
JS		 632}
633
1da177e4
LT		 634/*
635 * Check for any arguments passed in on the module load command line.
636 */
637
1da177e4
LT		 638/*****************************************************************************/
639
1da177e4
LT		 640/*
641 * Parse the supplied argument string, into the board conf struct.
642 */
643
40e82652 644static int __init stl_parsebrd(struct stlconf *confp, char **argp)
1da177e4
LT		 645{
646 char *sp;
6b2c9457 647 unsigned int i;
1da177e4 648
a0564e14 649 pr_debug("stl_parsebrd(confp=%p,argp=%p)\n", confp, argp);
1da177e4 650
615e4a71 651 if ((argp[0] == NULL) || (*argp[0] == 0))
014c2544 652 return 0;
1da177e4 653
c62429d9 654 for (sp = argp[0], i = 0; (*sp != 0) && (i < 25); sp++, i++)
843b568c 655 *sp = tolower(*sp);
1da177e4 656
c62429d9 657 for (i = 0; i < ARRAY_SIZE(stl_brdstr); i++)
1da177e4
LT		 658 if (strcmp(stl_brdstr[i].name, argp[0]) == 0)
659 break;
c62429d9 660
fe971071 661 if (i == ARRAY_SIZE(stl_brdstr)) {
1da177e4 662 printk("STALLION: unknown board name, %s?\n", argp[0]);
fe971071 663 return 0;
1da177e4
LT		 664 }
665
666 confp->brdtype = stl_brdstr[i].type;
667
668 i = 1;
615e4a71 669 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 670 confp->ioaddr1 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 671 i++;
672 if (confp->brdtype == BRD_ECH) {
615e4a71 673 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 674 confp->ioaddr2 = simple_strtoul(argp[i], NULL, 0);
1da177e4
LT		 675 i++;
676 }
615e4a71 677 if ((argp[i] != NULL) && (*argp[i] != 0))
843b568c 678 confp->irq = simple_strtoul(argp[i], NULL, 0);
014c2544 679 return 1;
1da177e4
LT		 680}
681
682/*****************************************************************************/
683
1da177e4
LT		 684/*
685 * Allocate a new board structure. Fill out the basic info in it.
686 */
687
ca7ed0f2 688static struct stlbrd *stl_allocbrd(void)
1da177e4 689{
ca7ed0f2 690 struct stlbrd *brdp;
1da177e4 691
ca7ed0f2 692 brdp = kzalloc(sizeof(struct stlbrd), GFP_KERNEL);
b0b4ed72 693 if (!brdp) {
b65b5b59 694 printk("STALLION: failed to allocate memory (size=%Zd)\n",
ca7ed0f2 695 sizeof(struct stlbrd));
b0b4ed72 696 return NULL;
1da177e4
LT		 697 }
698
1da177e4 699 brdp->magic = STL_BOARDMAGIC;
014c2544 700 return brdp;
1da177e4
LT		 701}
702
703/*****************************************************************************/
704
047e9658
AC		 705static int stl_activate(struct tty_port *port, struct tty_struct *tty)
706{
707 struct stlport *portp = container_of(port, struct stlport, port);
708 if (!portp->tx.buf) {
709 portp->tx.buf = kmalloc(STL_TXBUFSIZE, GFP_KERNEL);
710 if (!portp->tx.buf)
711 return -ENOMEM;
712 portp->tx.head = portp->tx.buf;
713 portp->tx.tail = portp->tx.buf;
714 }
715 stl_setport(portp, tty->termios);
716 portp->sigs = stl_getsignals(portp);
717 stl_setsignals(portp, 1, 1);
718 stl_enablerxtx(portp, 1, 1);
719 stl_startrxtx(portp, 1, 0);
720 return 0;
721}
722
1da177e4
LT		 723static int stl_open(struct tty_struct *tty, struct file *filp)
724{
ca7ed0f2
JS		 725 struct stlport *portp;
726 struct stlbrd *brdp;
6b2c9457 727 unsigned int minordev, brdnr, panelnr;
4350f3ff 728 int portnr;
1da177e4 729
a0564e14 730 pr_debug("stl_open(tty=%p,filp=%p): device=%s\n", tty, filp, tty->name);
1da177e4
LT		 731
732 minordev = tty->index;
733 brdnr = MINOR2BRD(minordev);
734 if (brdnr >= stl_nrbrds)
014c2544 735 return -ENODEV;
1da177e4 736 brdp = stl_brds[brdnr];
615e4a71 737 if (brdp == NULL)
014c2544 738 return -ENODEV;
4350f3ff 739
1da177e4 740 minordev = MINOR2PORT(minordev);
c62429d9 741 for (portnr = -1, panelnr = 0; panelnr < STL_MAXPANELS; panelnr++) {
615e4a71 742 if (brdp->panels[panelnr] == NULL)
1da177e4
LT		 743 break;
744 if (minordev < brdp->panels[panelnr]->nrports) {
745 portnr = minordev;
746 break;
747 }
748 minordev -= brdp->panels[panelnr]->nrports;
749 }
750 if (portnr < 0)
014c2544 751 return -ENODEV;
1da177e4
LT		 752
753 portp = brdp->panels[panelnr]->ports[portnr];
615e4a71 754 if (portp == NULL)
014c2544 755 return -ENODEV;
a2d1e351
AC		 756
757 tty->driver_data = portp;
047e9658 758 return tty_port_open(&portp->port, tty, filp);
1da177e4 759
1da177e4
LT		 760}
761
762/*****************************************************************************/
763
31f35939
AC		 764static int stl_carrier_raised(struct tty_port *port)
765{
766 struct stlport *portp = container_of(port, struct stlport, port);
767 return (portp->sigs & TIOCM_CD) ? 1 : 0;
768}
769
fcc8ac18 770static void stl_dtr_rts(struct tty_port *port, int on)
1da177e4 771{
4350f3ff
AC		 772 struct stlport *portp = container_of(port, struct stlport, port);
773 /* Takes brd_lock internally */
fcc8ac18 774 stl_setsignals(portp, on, on);
1da177e4
LT		 775}
776
777/*****************************************************************************/
778
96b066b8
JS		 779static void stl_flushbuffer(struct tty_struct *tty)
780{
781 struct stlport *portp;
782
783 pr_debug("stl_flushbuffer(tty=%p)\n", tty);
784
96b066b8
JS		 785 portp = tty->driver_data;
786 if (portp == NULL)
787 return;
788
789 stl_flush(portp);
790 tty_wakeup(tty);
791}
792
793/*****************************************************************************/
794
795static void stl_waituntilsent(struct tty_struct *tty, int timeout)
796{
797 struct stlport *portp;
798 unsigned long tend;
799
800 pr_debug("stl_waituntilsent(tty=%p,timeout=%d)\n", tty, timeout);
801
96b066b8
JS		 802 portp = tty->driver_data;
803 if (portp == NULL)
804 return;
805
806 if (timeout == 0)
807 timeout = HZ;
808 tend = jiffies + timeout;
809
810 while (stl_datastate(portp)) {
811 if (signal_pending(current))
812 break;
813 msleep_interruptible(20);
814 if (time_after_eq(jiffies, tend))
815 break;
816 }
817}
818
819/*****************************************************************************/
820
047e9658 821static void stl_shutdown(struct tty_port *port)
1da177e4 822{
047e9658 823 struct stlport *portp = container_of(port, struct stlport, port);
1da177e4 824 stl_disableintrs(portp);
1da177e4 825 stl_enablerxtx(portp, 0, 0);
047e9658 826 stl_flush(portp);
1da177e4 827 portp->istate = 0;
615e4a71 828 if (portp->tx.buf != NULL) {
1da177e4 829 kfree(portp->tx.buf);
615e4a71
JS		 830 portp->tx.buf = NULL;
831 portp->tx.head = NULL;
832 portp->tx.tail = NULL;
1da177e4 833 }
047e9658
AC		 834}
835
836static void stl_close(struct tty_struct *tty, struct file *filp)
837{
838 struct stlport*portp;
839 pr_debug("stl_close(tty=%p,filp=%p)\n", tty, filp);
1da177e4 840
047e9658 841 portp = tty->driver_data;
a2d1e351
AC		 842 if(portp == NULL)
843 return;
047e9658 844 tty_port_close(&portp->port, tty, filp);
1da177e4
LT		 845}
846
847/*****************************************************************************/
848
849/*
850 * Write routine. Take data and stuff it in to the TX ring queue.
851 * If transmit interrupts are not running then start them.
852 */
853
854static int stl_write(struct tty_struct *tty, const unsigned char *buf, int count)
855{
ca7ed0f2 856 struct stlport *portp;
1da177e4
LT		 857 unsigned int len, stlen;
858 unsigned char *chbuf;
859 char *head, *tail;
860
a0564e14 861 pr_debug("stl_write(tty=%p,buf=%p,count=%d)\n", tty, buf, count);
1da177e4 862
1da177e4 863 portp = tty->driver_data;
615e4a71 864 if (portp == NULL)
014c2544 865 return 0;
615e4a71 866 if (portp->tx.buf == NULL)
014c2544 867 return 0;
1da177e4
LT		 868
869/*
870 * If copying direct from user space we must cater for page faults,
871 * causing us to "sleep" here for a while. To handle this copy in all
872 * the data we need now, into a local buffer. Then when we got it all
873 * copy it into the TX buffer.
874 */
875 chbuf = (unsigned char *) buf;
876
877 head = portp->tx.head;
878 tail = portp->tx.tail;
879 if (head >= tail) {
880 len = STL_TXBUFSIZE - (head - tail) - 1;
881 stlen = STL_TXBUFSIZE - (head - portp->tx.buf);
882 } else {
883 len = tail - head - 1;
884 stlen = len;
885 }
886
843b568c 887 len = min(len, (unsigned int)count);
1da177e4
LT		 888 count = 0;
889 while (len > 0) {
843b568c 890 stlen = min(len, stlen);
1da177e4
LT		 891 memcpy(head, chbuf, stlen);
892 len -= stlen;
893 chbuf += stlen;
894 count += stlen;
895 head += stlen;
896 if (head >= (portp->tx.buf + STL_TXBUFSIZE)) {
897 head = portp->tx.buf;
898 stlen = tail - head;
899 }
900 }
901 portp->tx.head = head;
902
903 clear_bit(ASYI_TXLOW, &portp->istate);
904 stl_startrxtx(portp, -1, 1);
905
014c2544 906 return count;
1da177e4
LT		 907}
908
909/*****************************************************************************/
910
4a561222 911static int stl_putchar(struct tty_struct *tty, unsigned char ch)
1da177e4 912{
ca7ed0f2 913 struct stlport *portp;
1da177e4
LT		 914 unsigned int len;
915 char *head, *tail;
916
a0564e14 917 pr_debug("stl_putchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 918
1da177e4 919 portp = tty->driver_data;
615e4a71 920 if (portp == NULL)
4a561222 921 return -EINVAL;
615e4a71 922 if (portp->tx.buf == NULL)
4a561222 923 return -EINVAL;
1da177e4
LT		 924
925 head = portp->tx.head;
926 tail = portp->tx.tail;
927
928 len = (head >= tail) ? (STL_TXBUFSIZE - (head - tail)) : (tail - head);
929 len--;
930
931 if (len > 0) {
932 *head++ = ch;
933 if (head >= (portp->tx.buf + STL_TXBUFSIZE))
934 head = portp->tx.buf;
935 }
936 portp->tx.head = head;
4a561222 937 return 0;
1da177e4
LT		 938}
939
940/*****************************************************************************/
941
942/*
943 * If there are any characters in the buffer then make sure that TX
944 * interrupts are on and get'em out. Normally used after the putchar
945 * routine has been called.
946 */
947
948static void stl_flushchars(struct tty_struct *tty)
949{
ca7ed0f2 950 struct stlport *portp;
1da177e4 951
a0564e14 952 pr_debug("stl_flushchars(tty=%p)\n", tty);
1da177e4 953
1da177e4 954 portp = tty->driver_data;
615e4a71 955 if (portp == NULL)
1da177e4 956 return;
615e4a71 957 if (portp->tx.buf == NULL)
1da177e4
LT		 958 return;
959
1da177e4
LT		 960 stl_startrxtx(portp, -1, 1);
961}
962
963/*****************************************************************************/
964
965static int stl_writeroom(struct tty_struct *tty)
966{
ca7ed0f2 967 struct stlport *portp;
1da177e4
LT		 968 char *head, *tail;
969
a0564e14 970 pr_debug("stl_writeroom(tty=%p)\n", tty);
1da177e4 971
1da177e4 972 portp = tty->driver_data;
615e4a71 973 if (portp == NULL)
014c2544 974 return 0;
615e4a71 975 if (portp->tx.buf == NULL)
014c2544 976 return 0;
1da177e4
LT		 977
978 head = portp->tx.head;
979 tail = portp->tx.tail;
c62429d9 980 return (head >= tail) ? (STL_TXBUFSIZE - (head - tail) - 1) : (tail - head - 1);
1da177e4
LT		 981}
982
983/*****************************************************************************/
984
985/*
986 * Return number of chars in the TX buffer. Normally we would just
987 * calculate the number of chars in the buffer and return that, but if
988 * the buffer is empty and TX interrupts are still on then we return
989 * that the buffer still has 1 char in it. This way whoever called us
990 * will not think that ALL chars have drained - since the UART still
991 * must have some chars in it (we are busy after all).
992 */
993
994static int stl_charsinbuffer(struct tty_struct *tty)
995{
ca7ed0f2 996 struct stlport *portp;
1da177e4
LT		 997 unsigned int size;
998 char *head, *tail;
999
a0564e14 1000 pr_debug("stl_charsinbuffer(tty=%p)\n", tty);
1da177e4 1001
1da177e4 1002 portp = tty->driver_data;
615e4a71 1003 if (portp == NULL)
014c2544 1004 return 0;
615e4a71 1005 if (portp->tx.buf == NULL)
014c2544 1006 return 0;
1da177e4
LT		 1007
1008 head = portp->tx.head;
1009 tail = portp->tx.tail;
1010 size = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
1011 if ((size == 0) && test_bit(ASYI_TXBUSY, &portp->istate))
1012 size = 1;
014c2544 1013 return size;
1da177e4
LT		 1014}
1015
1016/*****************************************************************************/
1017
1018/*
1019 * Generate the serial struct info.
1020 */
1021
ca7ed0f2 1022static int stl_getserial(struct stlport *portp, struct serial_struct __user *sp)
1da177e4
LT		 1023{
1024 struct serial_struct sio;
ca7ed0f2 1025 struct stlbrd *brdp;
1da177e4 1026
a0564e14 1027 pr_debug("stl_getserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1028
1029 memset(&sio, 0, sizeof(struct serial_struct));
b4eda9cb
AC		 1030
1031 mutex_lock(&portp->port.mutex);
1da177e4
LT		 1032 sio.line = portp->portnr;
1033 sio.port = portp->ioaddr;
f8ae4764 1034 sio.flags = portp->port.flags;
1da177e4
LT		 1035 sio.baud_base = portp->baud_base;
1036 sio.close_delay = portp->close_delay;
1037 sio.closing_wait = portp->closing_wait;
1038 sio.custom_divisor = portp->custom_divisor;
1039 sio.hub6 = 0;
1040 if (portp->uartp == &stl_cd1400uart) {
1041 sio.type = PORT_CIRRUS;
1042 sio.xmit_fifo_size = CD1400_TXFIFOSIZE;
1043 } else {
1044 sio.type = PORT_UNKNOWN;
1045 sio.xmit_fifo_size = SC26198_TXFIFOSIZE;
1046 }
1047
1048 brdp = stl_brds[portp->brdnr];
615e4a71 1049 if (brdp != NULL)
1da177e4 1050 sio.irq = brdp->irq;
b4eda9cb 1051 mutex_unlock(&portp->port.mutex);
1da177e4
LT		 1052
1053 return copy_to_user(sp, &sio, sizeof(struct serial_struct)) ? -EFAULT : 0;
1054}
1055
1056/*****************************************************************************/
1057
1058/*
1059 * Set port according to the serial struct info.
1060 * At this point we do not do any auto-configure stuff, so we will
1061 * just quietly ignore any requests to change irq, etc.
1062 */
1063
d18a750f 1064static int stl_setserial(struct tty_struct *tty, struct serial_struct __user *sp)
1da177e4 1065{
d18a750f 1066 struct stlport * portp = tty->driver_data;
1da177e4
LT		 1067 struct serial_struct sio;
1068
a0564e14 1069 pr_debug("stl_setserial(portp=%p,sp=%p)\n", portp, sp);
1da177e4
LT		 1070
1071 if (copy_from_user(&sio, sp, sizeof(struct serial_struct)))
1072 return -EFAULT;
b4eda9cb 1073 mutex_lock(&portp->port.mutex);
1da177e4
LT		 1074 if (!capable(CAP_SYS_ADMIN)) {
1075 if ((sio.baud_base != portp->baud_base) ||
1076 (sio.close_delay != portp->close_delay) ||
1077 ((sio.flags & ~ASYNC_USR_MASK) !=
b4eda9cb
AC		 1078 (portp->port.flags & ~ASYNC_USR_MASK))) {
1079 mutex_unlock(&portp->port.mutex);
014c2544 1080 return -EPERM;
b4eda9cb 1081 }
1da177e4
LT		 1082 }
1083
f8ae4764 1084 portp->port.flags = (portp->port.flags & ~ASYNC_USR_MASK) |
1da177e4
LT		 1085 (sio.flags & ASYNC_USR_MASK);
1086 portp->baud_base = sio.baud_base;
1087 portp->close_delay = sio.close_delay;
1088 portp->closing_wait = sio.closing_wait;
1089 portp->custom_divisor = sio.custom_divisor;
b4eda9cb 1090 mutex_unlock(&portp->port.mutex);
d18a750f 1091 stl_setport(portp, tty->termios);
014c2544 1092 return 0;
1da177e4
LT		 1093}
1094
1095/*****************************************************************************/
1096
60b33c13 1097static int stl_tiocmget(struct tty_struct *tty)
1da177e4 1098{
ca7ed0f2 1099 struct stlport *portp;
1da177e4 1100
1da177e4 1101 portp = tty->driver_data;
615e4a71 1102 if (portp == NULL)
014c2544 1103 return -ENODEV;
1da177e4 1104 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1105 return -EIO;
1da177e4
LT		 1106
1107 return stl_getsignals(portp);
1108}
1109
20b9d177 1110static int stl_tiocmset(struct tty_struct *tty,
1da177e4
LT		 1111 unsigned int set, unsigned int clear)
1112{
ca7ed0f2 1113 struct stlport *portp;
1da177e4
LT		 1114 int rts = -1, dtr = -1;
1115
1da177e4 1116 portp = tty->driver_data;
615e4a71 1117 if (portp == NULL)
014c2544 1118 return -ENODEV;
1da177e4 1119 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1120 return -EIO;
1da177e4
LT		 1121
1122 if (set & TIOCM_RTS)
1123 rts = 1;
1124 if (set & TIOCM_DTR)
1125 dtr = 1;
1126 if (clear & TIOCM_RTS)
1127 rts = 0;
1128 if (clear & TIOCM_DTR)
1129 dtr = 0;
1130
1131 stl_setsignals(portp, dtr, rts);
1132 return 0;
1133}
1134
6caa76b7 1135static int stl_ioctl(struct tty_struct *tty, unsigned int cmd, unsigned long arg)
1da177e4 1136{
ca7ed0f2 1137 struct stlport *portp;
1da177e4
LT		 1138 int rc;
1139 void __user *argp = (void __user *)arg;
1140
6caa76b7 1141 pr_debug("stl_ioctl(tty=%p,cmd=%x,arg=%lx)\n", tty, cmd, arg);
1da177e4 1142
1da177e4 1143 portp = tty->driver_data;
615e4a71 1144 if (portp == NULL)
014c2544 1145 return -ENODEV;
1da177e4
LT		 1146
1147 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
c62429d9 1148 (cmd != COM_GETPORTSTATS) && (cmd != COM_CLRPORTSTATS))
1da177e4 1149 if (tty->flags & (1 << TTY_IO_ERROR))
014c2544 1150 return -EIO;
1da177e4
LT		 1151
1152 rc = 0;
1153
1154 switch (cmd) {
1da177e4
LT		 1155 case TIOCGSERIAL:
1156 rc = stl_getserial(portp, argp);
1157 break;
1158 case TIOCSSERIAL:
d18a750f 1159 rc = stl_setserial(tty, argp);
1da177e4
LT		 1160 break;
1161 case COM_GETPORTSTATS:
d18a750f 1162 rc = stl_getportstats(tty, portp, argp);
1da177e4
LT		 1163 break;
1164 case COM_CLRPORTSTATS:
1165 rc = stl_clrportstats(portp, argp);
1166 break;
1167 case TIOCSERCONFIG:
1168 case TIOCSERGWILD:
1169 case TIOCSERSWILD:
1170 case TIOCSERGETLSR:
1171 case TIOCSERGSTRUCT:
1172 case TIOCSERGETMULTI:
1173 case TIOCSERSETMULTI:
1174 default:
1175 rc = -ENOIOCTLCMD;
1176 break;
1177 }
014c2544 1178 return rc;
1da177e4
LT		 1179}
1180
1181/*****************************************************************************/
1182
96b066b8
JS		 1183/*
1184 * Start the transmitter again. Just turn TX interrupts back on.
1185 */
1186
1187static void stl_start(struct tty_struct *tty)
1188{
1189 struct stlport *portp;
1190
1191 pr_debug("stl_start(tty=%p)\n", tty);
1192
96b066b8
JS		 1193 portp = tty->driver_data;
1194 if (portp == NULL)
1195 return;
1196 stl_startrxtx(portp, -1, 1);
1197}
1198
1199/*****************************************************************************/
1200
606d099c 1201static void stl_settermios(struct tty_struct *tty, struct ktermios *old)
1da177e4 1202{
ca7ed0f2 1203 struct stlport *portp;
606d099c 1204 struct ktermios *tiosp;
1da177e4 1205
a0564e14 1206 pr_debug("stl_settermios(tty=%p,old=%p)\n", tty, old);
1da177e4 1207
1da177e4 1208 portp = tty->driver_data;
615e4a71 1209 if (portp == NULL)
1da177e4
LT		 1210 return;
1211
1212 tiosp = tty->termios;
1213 if ((tiosp->c_cflag == old->c_cflag) &&
1214 (tiosp->c_iflag == old->c_iflag))
1215 return;
1216
1217 stl_setport(portp, tiosp);
1218 stl_setsignals(portp, ((tiosp->c_cflag & (CBAUD & ~CBAUDEX)) ? 1 : 0),
1219 -1);
1220 if ((old->c_cflag & CRTSCTS) && ((tiosp->c_cflag & CRTSCTS) == 0)) {
1221 tty->hw_stopped = 0;
1222 stl_start(tty);
1223 }
1224 if (((old->c_cflag & CLOCAL) == 0) && (tiosp->c_cflag & CLOCAL))
f8ae4764 1225 wake_up_interruptible(&portp->port.open_wait);
1da177e4
LT		 1226}
1227
1228/*****************************************************************************/
1229
1230/*
1231 * Attempt to flow control who ever is sending us data. Based on termios
1232 * settings use software or/and hardware flow control.
1233 */
1234
1235static void stl_throttle(struct tty_struct *tty)
1236{
ca7ed0f2 1237 struct stlport *portp;
1da177e4 1238
a0564e14 1239 pr_debug("stl_throttle(tty=%p)\n", tty);
1da177e4 1240
1da177e4 1241 portp = tty->driver_data;
615e4a71 1242 if (portp == NULL)
1da177e4
LT		 1243 return;
1244 stl_flowctrl(portp, 0);
1245}
1246
1247/*****************************************************************************/
1248
1249/*
1250 * Unflow control the device sending us data...
1251 */
1252
1253static void stl_unthrottle(struct tty_struct *tty)
1254{
ca7ed0f2 1255 struct stlport *portp;
1da177e4 1256
a0564e14 1257 pr_debug("stl_unthrottle(tty=%p)\n", tty);
1da177e4 1258
1da177e4 1259 portp = tty->driver_data;
615e4a71 1260 if (portp == NULL)
1da177e4
LT		 1261 return;
1262 stl_flowctrl(portp, 1);
1263}
1264
1265/*****************************************************************************/
1266
1267/*
1268 * Stop the transmitter. Basically to do this we will just turn TX
1269 * interrupts off.
1270 */
1271
1272static void stl_stop(struct tty_struct *tty)
1273{
ca7ed0f2 1274 struct stlport *portp;
1da177e4 1275
a0564e14 1276 pr_debug("stl_stop(tty=%p)\n", tty);
1da177e4 1277
1da177e4 1278 portp = tty->driver_data;
615e4a71 1279 if (portp == NULL)
1da177e4
LT		 1280 return;
1281 stl_startrxtx(portp, -1, 0);
1282}
1283
1284/*****************************************************************************/
1285
1da177e4
LT		 1286/*
1287 * Hangup this port. This is pretty much like closing the port, only
1288 * a little more brutal. No waiting for data to drain. Shutdown the
1289 * port and maybe drop signals.
1290 */
1291
1292static void stl_hangup(struct tty_struct *tty)
1293{
047e9658 1294 struct stlport *portp = tty->driver_data;
a0564e14 1295 pr_debug("stl_hangup(tty=%p)\n", tty);
1da177e4 1296
615e4a71 1297 if (portp == NULL)
1da177e4 1298 return;
047e9658 1299 tty_port_hangup(&portp->port);
1da177e4
LT		 1300}
1301
1302/*****************************************************************************/
1303
4a561222 1304static int stl_breakctl(struct tty_struct *tty, int state)
1da177e4 1305{
ca7ed0f2 1306 struct stlport *portp;
1da177e4 1307
a0564e14 1308 pr_debug("stl_breakctl(tty=%p,state=%d)\n", tty, state);
1da177e4 1309
1da177e4 1310 portp = tty->driver_data;
615e4a71 1311 if (portp == NULL)
4a561222 1312 return -EINVAL;
1da177e4
LT		 1313
1314 stl_sendbreak(portp, ((state == -1) ? 1 : 2));
4a561222 1315 return 0;
1da177e4
LT		 1316}
1317
1318/*****************************************************************************/
1319
1da177e4
LT		 1320static void stl_sendxchar(struct tty_struct *tty, char ch)
1321{
ca7ed0f2 1322 struct stlport *portp;
1da177e4 1323
a0564e14 1324 pr_debug("stl_sendxchar(tty=%p,ch=%x)\n", tty, ch);
1da177e4 1325
1da177e4 1326 portp = tty->driver_data;
615e4a71 1327 if (portp == NULL)
1da177e4
LT		 1328 return;
1329
1330 if (ch == STOP_CHAR(tty))
1331 stl_sendflow(portp, 0);
1332 else if (ch == START_CHAR(tty))
1333 stl_sendflow(portp, 1);
1334 else
1335 stl_putchar(tty, ch);
1336}
1337
8561c44c 1338static void stl_portinfo(struct seq_file *m, struct stlport *portp, int portnr)
1da177e4 1339{
8561c44c
AD		 1340 int sigs;
1341 char sep;
1da177e4 1342
8561c44c 1343 seq_printf(m, "%d: uart:%s tx:%d rx:%d",
1da177e4
LT		 1344 portnr, (portp->hwid == 1) ? "SC26198" : "CD1400",
1345 (int) portp->stats.txtotal, (int) portp->stats.rxtotal);
1346
1347 if (portp->stats.rxframing)
8561c44c 1348 seq_printf(m, " fe:%d", (int) portp->stats.rxframing);
1da177e4 1349 if (portp->stats.rxparity)
8561c44c 1350 seq_printf(m, " pe:%d", (int) portp->stats.rxparity);
1da177e4 1351 if (portp->stats.rxbreaks)
8561c44c 1352 seq_printf(m, " brk:%d", (int) portp->stats.rxbreaks);
1da177e4 1353 if (portp->stats.rxoverrun)
8561c44c 1354 seq_printf(m, " oe:%d", (int) portp->stats.rxoverrun);
1da177e4
LT		 1355
1356 sigs = stl_getsignals(portp);
8561c44c
AD		 1357 sep = ' ';
1358 if (sigs & TIOCM_RTS) {
1359 seq_printf(m, "%c%s", sep, "RTS");
1360 sep = '|';
1361 }
1362 if (sigs & TIOCM_CTS) {
1363 seq_printf(m, "%c%s", sep, "CTS");
1364 sep = '|';
1365 }
1366 if (sigs & TIOCM_DTR) {
1367 seq_printf(m, "%c%s", sep, "DTR");
1368 sep = '|';
1369 }
1370 if (sigs & TIOCM_CD) {
1371 seq_printf(m, "%c%s", sep, "DCD");
1372 sep = '|';
1373 }
1374 if (sigs & TIOCM_DSR) {
1375 seq_printf(m, "%c%s", sep, "DSR");
1376 sep = '|';
1377 }
1378 seq_putc(m, '\n');
1da177e4
LT		 1379}
1380
1381/*****************************************************************************/
1382
1383/*
1384 * Port info, read from the /proc file system.
1385 */
1386
8561c44c 1387static int stl_proc_show(struct seq_file *m, void *v)
1da177e4 1388{
ca7ed0f2
JS		 1389 struct stlbrd *brdp;
1390 struct stlpanel *panelp;
1391 struct stlport *portp;
6b2c9457 1392 unsigned int brdnr, panelnr, portnr;
8561c44c 1393 int totalport;
1da177e4 1394
1da177e4 1395 totalport = 0;
8561c44c
AD		 1396
1397 seq_printf(m, "%s: version %s\n", stl_drvtitle, stl_drvversion);
1da177e4
LT		 1398
1399/*
1400 * We scan through for each board, panel and port. The offset is
1401 * calculated on the fly, and irrelevant ports are skipped.
1402 */
c62429d9 1403 for (brdnr = 0; brdnr < stl_nrbrds; brdnr++) {
1da177e4 1404 brdp = stl_brds[brdnr];
615e4a71 1405 if (brdp == NULL)
1da177e4
LT		 1406 continue;
1407 if (brdp->state == 0)
1408 continue;
1409
1da177e4 1410 totalport = brdnr * STL_MAXPORTS;
c62429d9 1411 for (panelnr = 0; panelnr < brdp->nrpanels; panelnr++) {
1da177e4 1412 panelp = brdp->panels[panelnr];
615e4a71 1413 if (panelp == NULL)
1da177e4
LT		 1414 continue;
1415
c62429d9 1416 for (portnr = 0; portnr < panelp->nrports; portnr++,
1da177e4
LT		 1417 totalport++) {
1418 portp = panelp->ports[portnr];
615e4a71 1419 if (portp == NULL)
1da177e4 1420 continue;
8561c44c 1421 stl_portinfo(m, portp, totalport);
1da177e4
LT		 1422 }
1423 }
1424 }
8561c44c
AD		 1425 return 0;
1426}
1da177e4 1427
8561c44c
AD		 1428static int stl_proc_open(struct inode *inode, struct file *file)
1429{
1430 return single_open(file, stl_proc_show, NULL);
1da177e4
LT		 1431}
1432
8561c44c
AD		 1433static const struct file_operations stl_proc_fops = {
1434 .owner = THIS_MODULE,
1435 .open = stl_proc_open,
1436 .read = seq_read,
1437 .llseek = seq_lseek,
1438 .release = single_release,
1439};
1440
1da177e4
LT		 1441/*****************************************************************************/
1442
1443/*
1444 * All board interrupts are vectored through here first. This code then
1445 * calls off to the approrpriate board interrupt handlers.
1446 */
1447
7d12e780 1448static irqreturn_t stl_intr(int irq, void *dev_id)
1da177e4 1449{
ca7ed0f2 1450 struct stlbrd *brdp = dev_id;
1da177e4 1451
a6f97b29 1452 pr_debug("stl_intr(brdp=%p,irq=%d)\n", brdp, brdp->irq);
1da177e4
LT		 1453
1454 return IRQ_RETVAL((* brdp->isr)(brdp));
1455}
1456
1457/*****************************************************************************/
1458
1459/*
1460 * Interrupt service routine for EasyIO board types.
1461 */
1462
ca7ed0f2 1463static int stl_eiointr(struct stlbrd *brdp)
1da177e4 1464{
ca7ed0f2 1465 struct stlpanel *panelp;
1da177e4
LT		 1466 unsigned int iobase;
1467 int handled = 0;
1468
b65b5b59 1469 spin_lock(&brd_lock);
1da177e4
LT		 1470 panelp = brdp->panels[0];
1471 iobase = panelp->iobase;
1472 while (inb(brdp->iostatus) & EIO_INTRPEND) {
1473 handled = 1;
1474 (* panelp->isr)(panelp, iobase);
1475 }
b65b5b59 1476 spin_unlock(&brd_lock);
1da177e4
LT		 1477 return handled;
1478}
1479
1480/*****************************************************************************/
1481
1482/*
1483 * Interrupt service routine for ECH-AT board types.
1484 */
1485
ca7ed0f2 1486static int stl_echatintr(struct stlbrd *brdp)
1da177e4 1487{
ca7ed0f2 1488 struct stlpanel *panelp;
6b2c9457 1489 unsigned int ioaddr, bnknr;
1da177e4
LT		 1490 int handled = 0;
1491
1492 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1493
1494 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1495 handled = 1;
c62429d9 1496 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1497 ioaddr = brdp->bnkstataddr[bnknr];
1498 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1499 panelp = brdp->bnk2panel[bnknr];
1500 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1501 }
1502 }
1503 }
1504
1505 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
1506
1507 return handled;
1508}
1509
1510/*****************************************************************************/
1511
1512/*
1513 * Interrupt service routine for ECH-MCA board types.
1514 */
1515
ca7ed0f2 1516static int stl_echmcaintr(struct stlbrd *brdp)
1da177e4 1517{
ca7ed0f2 1518 struct stlpanel *panelp;
6b2c9457 1519 unsigned int ioaddr, bnknr;
1da177e4
LT		 1520 int handled = 0;
1521
1522 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1523 handled = 1;
c62429d9 1524 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1525 ioaddr = brdp->bnkstataddr[bnknr];
1526 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1527 panelp = brdp->bnk2panel[bnknr];
1528 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1529 }
1530 }
1531 }
1532 return handled;
1533}
1534
1535/*****************************************************************************/
1536
1537/*
1538 * Interrupt service routine for ECH-PCI board types.
1539 */
1540
ca7ed0f2 1541static int stl_echpciintr(struct stlbrd *brdp)
1da177e4 1542{
ca7ed0f2 1543 struct stlpanel *panelp;
6b2c9457 1544 unsigned int ioaddr, bnknr, recheck;
1da177e4
LT		 1545 int handled = 0;
1546
1547 while (1) {
1548 recheck = 0;
c62429d9 1549 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1550 outb(brdp->bnkpageaddr[bnknr], brdp->ioctrl);
1551 ioaddr = brdp->bnkstataddr[bnknr];
1552 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1553 panelp = brdp->bnk2panel[bnknr];
1554 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1555 recheck++;
1556 handled = 1;
1557 }
1558 }
1559 if (! recheck)
1560 break;
1561 }
1562 return handled;
1563}
1564
1565/*****************************************************************************/
1566
1567/*
1568 * Interrupt service routine for ECH-8/64-PCI board types.
1569 */
1570
ca7ed0f2 1571static int stl_echpci64intr(struct stlbrd *brdp)
1da177e4 1572{
ca7ed0f2 1573 struct stlpanel *panelp;
6b2c9457 1574 unsigned int ioaddr, bnknr;
1da177e4
LT		 1575 int handled = 0;
1576
1577 while (inb(brdp->ioctrl) & 0x1) {
1578 handled = 1;
c62429d9 1579 for (bnknr = 0; bnknr < brdp->nrbnks; bnknr++) {
1da177e4
LT		 1580 ioaddr = brdp->bnkstataddr[bnknr];
1581 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1582 panelp = brdp->bnk2panel[bnknr];
1583 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1584 }
1585 }
1586 }
1587
1588 return handled;
1589}
1590
1591/*****************************************************************************/
1592
1da177e4
LT		 1593/*
1594 * Initialize all the ports on a panel.
1595 */
1596
705c1862 1597static int __devinit stl_initports(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4 1598{
6b2c9457
JS		 1599 struct stlport *portp;
1600 unsigned int i;
1601 int chipmask;
1da177e4 1602
a0564e14 1603 pr_debug("stl_initports(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 1604
1605 chipmask = stl_panelinit(brdp, panelp);
1606
1607/*
1608 * All UART's are initialized (if found!). Now go through and setup
1609 * each ports data structures.
1610 */
c62429d9 1611 for (i = 0; i < panelp->nrports; i++) {
ca7ed0f2 1612 portp = kzalloc(sizeof(struct stlport), GFP_KERNEL);
b0b4ed72 1613 if (!portp) {
1da177e4 1614 printk("STALLION: failed to allocate memory "
ca7ed0f2 1615 "(size=%Zd)\n", sizeof(struct stlport));
1da177e4
LT		 1616 break;
1617 }
d18a750f 1618 tty_port_init(&portp->port);
31f35939 1619 portp->port.ops = &stl_port_ops;
1da177e4
LT		 1620 portp->magic = STL_PORTMAGIC;
1621 portp->portnr = i;
1622 portp->brdnr = panelp->brdnr;
1623 portp->panelnr = panelp->panelnr;
1624 portp->uartp = panelp->uartp;
1625 portp->clk = brdp->clk;
1626 portp->baud_base = STL_BAUDBASE;
1627 portp->close_delay = STL_CLOSEDELAY;
1628 portp->closing_wait = 30 * HZ;
f8ae4764
AC		 1629 init_waitqueue_head(&portp->port.open_wait);
1630 init_waitqueue_head(&portp->port.close_wait);
1da177e4
LT		 1631 portp->stats.brd = portp->brdnr;
1632 portp->stats.panel = portp->panelnr;
1633 portp->stats.port = portp->portnr;
1634 panelp->ports[i] = portp;
1635 stl_portinit(brdp, panelp, portp);
1636 }
1637
c62429d9 1638 return 0;
1da177e4
LT		 1639}
1640
3b85b341
JS		 1641static void stl_cleanup_panels(struct stlbrd *brdp)
1642{
1643 struct stlpanel *panelp;
1644 struct stlport *portp;
1645 unsigned int j, k;
d18a750f 1646 struct tty_struct *tty;
3b85b341
JS		 1647
1648 for (j = 0; j < STL_MAXPANELS; j++) {
1649 panelp = brdp->panels[j];
1650 if (panelp == NULL)
1651 continue;
1652 for (k = 0; k < STL_PORTSPERPANEL; k++) {
1653 portp = panelp->ports[k];
1654 if (portp == NULL)
1655 continue;
d18a750f
AC		 1656 tty = tty_port_tty_get(&portp->port);
1657 if (tty != NULL) {
1658 stl_hangup(tty);
1659 tty_kref_put(tty);
1660 }
3b85b341
JS		 1661 kfree(portp->tx.buf);
1662 kfree(portp);
1663 }
1664 kfree(panelp);
1665 }
1666}
1667
1da177e4
LT		 1668/*****************************************************************************/
1669
1670/*
1671 * Try to find and initialize an EasyIO board.
1672 */
1673
705c1862 1674static int __devinit stl_initeio(struct stlbrd *brdp)
1da177e4 1675{
ca7ed0f2 1676 struct stlpanel *panelp;
1da177e4
LT		 1677 unsigned int status;
1678 char *name;
3b85b341 1679 int retval;
1da177e4 1680
a0564e14 1681 pr_debug("stl_initeio(brdp=%p)\n", brdp);
1da177e4
LT		 1682
1683 brdp->ioctrl = brdp->ioaddr1 + 1;
1684 brdp->iostatus = brdp->ioaddr1 + 2;
1685
1686 status = inb(brdp->iostatus);
1687 if ((status & EIO_IDBITMASK) == EIO_MK3)
1688 brdp->ioctrl++;
1689
1690/*
1691 * Handle board specific stuff now. The real difference is PCI
1692 * or not PCI.
1693 */
1694 if (brdp->brdtype == BRD_EASYIOPCI) {
1695 brdp->iosize1 = 0x80;
1696 brdp->iosize2 = 0x80;
1697 name = "serial(EIO-PCI)";
1698 outb(0x41, (brdp->ioaddr2 + 0x4c));
1699 } else {
1700 brdp->iosize1 = 8;
1701 name = "serial(EIO)";
1702 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1703 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1704 printk("STALLION: invalid irq=%d for brd=%d\n",
1705 brdp->irq, brdp->brdnr);
3b85b341
JS		 1706 retval = -EINVAL;
1707 goto err;
1da177e4
LT		 1708 }
1709 outb((stl_vecmap[brdp->irq] | EIO_0WS |
1710 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)),
1711 brdp->ioctrl);
1712 }
1713
3b85b341 1714 retval = -EBUSY;
1da177e4
LT		 1715 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1716 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1717 "%x conflicts with another device\n", brdp->brdnr,
1718 brdp->ioaddr1);
3b85b341 1719 goto err;
1da177e4
LT		 1720 }
1721
1722 if (brdp->iosize2 > 0)
1723 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1724 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1725 "address %x conflicts with another device\n",
1726 brdp->brdnr, brdp->ioaddr2);
1727 printk(KERN_WARNING "STALLION: Warning, also "
1728 "releasing board %d I/O address %x \n",
1729 brdp->brdnr, brdp->ioaddr1);
3b85b341 1730 goto err_rel1;
1da177e4
LT		 1731 }
1732
1733/*
1734 * Everything looks OK, so let's go ahead and probe for the hardware.
1735 */
1736 brdp->clk = CD1400_CLK;
1737 brdp->isr = stl_eiointr;
1738
3b85b341 1739 retval = -ENODEV;
1da177e4
LT		 1740 switch (status & EIO_IDBITMASK) {
1741 case EIO_8PORTM:
1742 brdp->clk = CD1400_CLK8M;
1743 /* fall thru */
1744 case EIO_8PORTRS:
1745 case EIO_8PORTDI:
1746 brdp->nrports = 8;
1747 break;
1748 case EIO_4PORTRS:
1749 brdp->nrports = 4;
1750 break;
1751 case EIO_MK3:
1752 switch (status & EIO_BRDMASK) {
1753 case ID_BRD4:
1754 brdp->nrports = 4;
1755 break;
1756 case ID_BRD8:
1757 brdp->nrports = 8;
1758 break;
1759 case ID_BRD16:
1760 brdp->nrports = 16;
1761 break;
1762 default:
3b85b341 1763 goto err_rel2;
1da177e4
LT		 1764 }
1765 break;
1766 default:
3b85b341 1767 goto err_rel2;
1da177e4
LT		 1768 }
1769
1770/*
1771 * We have verified that the board is actually present, so now we
1772 * can complete the setup.
1773 */
1774
ca7ed0f2 1775 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1776 if (!panelp) {
1da177e4 1777 printk(KERN_WARNING "STALLION: failed to allocate memory "
ca7ed0f2 1778 "(size=%Zd)\n", sizeof(struct stlpanel));
3b85b341
JS		 1779 retval = -ENOMEM;
1780 goto err_rel2;
1da177e4 1781 }
1da177e4
LT		 1782
1783 panelp->magic = STL_PANELMAGIC;
1784 panelp->brdnr = brdp->brdnr;
1785 panelp->panelnr = 0;
1786 panelp->nrports = brdp->nrports;
1787 panelp->iobase = brdp->ioaddr1;
1788 panelp->hwid = status;
1789 if ((status & EIO_IDBITMASK) == EIO_MK3) {
615e4a71 1790 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1791 panelp->isr = stl_sc26198intr;
1792 } else {
615e4a71 1793 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1794 panelp->isr = stl_cd1400eiointr;
1795 }
1796
1797 brdp->panels[0] = panelp;
1798 brdp->nrpanels = 1;
1799 brdp->state |= BRD_FOUND;
1800 brdp->hwid = status;
0f2ed4c6 1801 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 1802 printk("STALLION: failed to register interrupt "
1803 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 1804 retval = -ENODEV;
1805 goto err_fr;
1da177e4 1806 }
3b85b341
JS		 1807
1808 return 0;
1809err_fr:
1810 stl_cleanup_panels(brdp);
1811err_rel2:
1812 if (brdp->iosize2 > 0)
1813 release_region(brdp->ioaddr2, brdp->iosize2);
1814err_rel1:
1815 release_region(brdp->ioaddr1, brdp->iosize1);
1816err:
1817 return retval;
1da177e4
LT		 1818}
1819
1820/*****************************************************************************/
1821
1822/*
1823 * Try to find an ECH board and initialize it. This code is capable of
1824 * dealing with all types of ECH board.
1825 */
1826
705c1862 1827static int __devinit stl_initech(struct stlbrd *brdp)
1da177e4 1828{
ca7ed0f2 1829 struct stlpanel *panelp;
6b2c9457
JS		 1830 unsigned int status, nxtid, ioaddr, conflict, panelnr, banknr, i;
1831 int retval;
1da177e4
LT		 1832 char *name;
1833
a0564e14 1834 pr_debug("stl_initech(brdp=%p)\n", brdp);
1da177e4
LT		 1835
1836 status = 0;
1837 conflict = 0;
1838
1839/*
1840 * Set up the initial board register contents for boards. This varies a
1841 * bit between the different board types. So we need to handle each
1842 * separately. Also do a check that the supplied IRQ is good.
1843 */
1844 switch (brdp->brdtype) {
1845
1846 case BRD_ECH:
1847 brdp->isr = stl_echatintr;
1848 brdp->ioctrl = brdp->ioaddr1 + 1;
1849 brdp->iostatus = brdp->ioaddr1 + 1;
1850 status = inb(brdp->iostatus);
3b85b341
JS		 1851 if ((status & ECH_IDBITMASK) != ECH_ID) {
1852 retval = -ENODEV;
1853 goto err;
1854 }
1da177e4
LT		 1855 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1856 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1857 printk("STALLION: invalid irq=%d for brd=%d\n",
1858 brdp->irq, brdp->brdnr);
3b85b341
JS		 1859 retval = -EINVAL;
1860 goto err;
1da177e4
LT		 1861 }
1862 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
1863 status |= (stl_vecmap[brdp->irq] << 1);
1864 outb((status | ECH_BRDRESET), brdp->ioaddr1);
1865 brdp->ioctrlval = ECH_INTENABLE |
1866 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
c62429d9 1867 for (i = 0; i < 10; i++)
1da177e4
LT		 1868 outb((brdp->ioctrlval | ECH_BRDENABLE), brdp->ioctrl);
1869 brdp->iosize1 = 2;
1870 brdp->iosize2 = 32;
1871 name = "serial(EC8/32)";
1872 outb(status, brdp->ioaddr1);
1873 break;
1874
1875 case BRD_ECHMC:
1876 brdp->isr = stl_echmcaintr;
1877 brdp->ioctrl = brdp->ioaddr1 + 0x20;
1878 brdp->iostatus = brdp->ioctrl;
1879 status = inb(brdp->iostatus);
3b85b341
JS		 1880 if ((status & ECH_IDBITMASK) != ECH_ID) {
1881 retval = -ENODEV;
1882 goto err;
1883 }
1da177e4
LT		 1884 if ((brdp->irq < 0) || (brdp->irq > 15) ||
1885 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
1886 printk("STALLION: invalid irq=%d for brd=%d\n",
1887 brdp->irq, brdp->brdnr);
3b85b341
JS		 1888 retval = -EINVAL;
1889 goto err;
1da177e4
LT		 1890 }
1891 outb(ECHMC_BRDRESET, brdp->ioctrl);
1892 outb(ECHMC_INTENABLE, brdp->ioctrl);
1893 brdp->iosize1 = 64;
1894 name = "serial(EC8/32-MC)";
1895 break;
1896
1897 case BRD_ECHPCI:
1898 brdp->isr = stl_echpciintr;
1899 brdp->ioctrl = brdp->ioaddr1 + 2;
1900 brdp->iosize1 = 4;
1901 brdp->iosize2 = 8;
1902 name = "serial(EC8/32-PCI)";
1903 break;
1904
1905 case BRD_ECH64PCI:
1906 brdp->isr = stl_echpci64intr;
1907 brdp->ioctrl = brdp->ioaddr2 + 0x40;
1908 outb(0x43, (brdp->ioaddr1 + 0x4c));
1909 brdp->iosize1 = 0x80;
1910 brdp->iosize2 = 0x80;
1911 name = "serial(EC8/64-PCI)";
1912 break;
1913
1914 default:
1915 printk("STALLION: unknown board type=%d\n", brdp->brdtype);
3b85b341
JS		 1916 retval = -EINVAL;
1917 goto err;
1da177e4
LT		 1918 }
1919
1920/*
1921 * Check boards for possible IO address conflicts and return fail status
1922 * if an IO conflict found.
1923 */
3b85b341 1924 retval = -EBUSY;
1da177e4
LT		 1925 if (!request_region(brdp->ioaddr1, brdp->iosize1, name)) {
1926 printk(KERN_WARNING "STALLION: Warning, board %d I/O address "
1927 "%x conflicts with another device\n", brdp->brdnr,
1928 brdp->ioaddr1);
3b85b341 1929 goto err;
1da177e4
LT		 1930 }
1931
1932 if (brdp->iosize2 > 0)
1933 if (!request_region(brdp->ioaddr2, brdp->iosize2, name)) {
1934 printk(KERN_WARNING "STALLION: Warning, board %d I/O "
1935 "address %x conflicts with another device\n",
1936 brdp->brdnr, brdp->ioaddr2);
1937 printk(KERN_WARNING "STALLION: Warning, also "
1938 "releasing board %d I/O address %x \n",
1939 brdp->brdnr, brdp->ioaddr1);
3b85b341 1940 goto err_rel1;
1da177e4
LT		 1941 }
1942
1943/*
1944 * Scan through the secondary io address space looking for panels.
1945 * As we find'em allocate and initialize panel structures for each.
1946 */
1947 brdp->clk = CD1400_CLK;
1948 brdp->hwid = status;
1949
1950 ioaddr = brdp->ioaddr2;
1951 banknr = 0;
1952 panelnr = 0;
1953 nxtid = 0;
1954
c62429d9 1955 for (i = 0; i < STL_MAXPANELS; i++) {
1da177e4
LT		 1956 if (brdp->brdtype == BRD_ECHPCI) {
1957 outb(nxtid, brdp->ioctrl);
1958 ioaddr = brdp->ioaddr2;
1959 }
1960 status = inb(ioaddr + ECH_PNLSTATUS);
1961 if ((status & ECH_PNLIDMASK) != nxtid)
64834b22 1962 break;
ca7ed0f2 1963 panelp = kzalloc(sizeof(struct stlpanel), GFP_KERNEL);
b0b4ed72 1964 if (!panelp) {
1da177e4 1965 printk("STALLION: failed to allocate memory "
ca7ed0f2 1966 "(size=%Zd)\n", sizeof(struct stlpanel));
49277b1c 1967 retval = -ENOMEM;
3b85b341 1968 goto err_fr;
1da177e4 1969 }
1da177e4
LT		 1970 panelp->magic = STL_PANELMAGIC;
1971 panelp->brdnr = brdp->brdnr;
1972 panelp->panelnr = panelnr;
1973 panelp->iobase = ioaddr;
1974 panelp->pagenr = nxtid;
1975 panelp->hwid = status;
1976 brdp->bnk2panel[banknr] = panelp;
1977 brdp->bnkpageaddr[banknr] = nxtid;
1978 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
1979
1980 if (status & ECH_PNLXPID) {
615e4a71 1981 panelp->uartp = &stl_sc26198uart;
1da177e4
LT		 1982 panelp->isr = stl_sc26198intr;
1983 if (status & ECH_PNL16PORT) {
1984 panelp->nrports = 16;
1985 brdp->bnk2panel[banknr] = panelp;
1986 brdp->bnkpageaddr[banknr] = nxtid;
1987 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
1988 ECH_PNLSTATUS;
c62429d9 1989 } else
1da177e4 1990 panelp->nrports = 8;
1da177e4 1991 } else {
615e4a71 1992 panelp->uartp = &stl_cd1400uart;
1da177e4
LT		 1993 panelp->isr = stl_cd1400echintr;
1994 if (status & ECH_PNL16PORT) {
1995 panelp->nrports = 16;
1996 panelp->ackmask = 0x80;
1997 if (brdp->brdtype != BRD_ECHPCI)
1998 ioaddr += EREG_BANKSIZE;
1999 brdp->bnk2panel[banknr] = panelp;
2000 brdp->bnkpageaddr[banknr] = ++nxtid;
2001 brdp->bnkstataddr[banknr++] = ioaddr +
2002 ECH_PNLSTATUS;
2003 } else {
2004 panelp->nrports = 8;
2005 panelp->ackmask = 0xc0;
2006 }
2007 }
2008
2009 nxtid++;
2010 ioaddr += EREG_BANKSIZE;
2011 brdp->nrports += panelp->nrports;
2012 brdp->panels[panelnr++] = panelp;
2013 if ((brdp->brdtype != BRD_ECHPCI) &&
49277b1c
JS		 2014 (ioaddr >= (brdp->ioaddr2 + brdp->iosize2))) {
2015 retval = -EINVAL;
3b85b341 2016 goto err_fr;
49277b1c 2017 }
1da177e4
LT		 2018 }
2019
2020 brdp->nrpanels = panelnr;
2021 brdp->nrbnks = banknr;
2022 if (brdp->brdtype == BRD_ECH)
2023 outb((brdp->ioctrlval | ECH_BRDDISABLE), brdp->ioctrl);
2024
2025 brdp->state |= BRD_FOUND;
0f2ed4c6 2026 if (request_irq(brdp->irq, stl_intr, IRQF_SHARED, name, brdp) != 0) {
1da177e4
LT		 2027 printk("STALLION: failed to register interrupt "
2028 "routine for %s irq=%d\n", name, brdp->irq);
3b85b341
JS		 2029 retval = -ENODEV;
2030 goto err_fr;
1da177e4
LT		 2031 }
2032
3b85b341
JS		 2033 return 0;
2034err_fr:
2035 stl_cleanup_panels(brdp);
2036 if (brdp->iosize2 > 0)
2037 release_region(brdp->ioaddr2, brdp->iosize2);
2038err_rel1:
2039 release_region(brdp->ioaddr1, brdp->iosize1);
2040err:
2041 return retval;
1da177e4
LT		 2042}
2043
2044/*****************************************************************************/
2045
2046/*
2047 * Initialize and configure the specified board.
2048 * Scan through all the boards in the configuration and see what we
2049 * can find. Handle EIO and the ECH boards a little differently here
2050 * since the initial search and setup is very different.
2051 */
2052
705c1862 2053static int __devinit stl_brdinit(struct stlbrd *brdp)
1da177e4 2054{
3b85b341 2055 int i, retval;
1da177e4 2056
a0564e14 2057 pr_debug("stl_brdinit(brdp=%p)\n", brdp);
1da177e4
LT		 2058
2059 switch (brdp->brdtype) {
2060 case BRD_EASYIO:
2061 case BRD_EASYIOPCI:
3b85b341
JS		 2062 retval = stl_initeio(brdp);
2063 if (retval)
2064 goto err;
1da177e4
LT		 2065 break;
2066 case BRD_ECH:
2067 case BRD_ECHMC:
2068 case BRD_ECHPCI:
2069 case BRD_ECH64PCI:
3b85b341
JS		 2070 retval = stl_initech(brdp);
2071 if (retval)
2072 goto err;
1da177e4
LT		 2073 break;
2074 default:
2075 printk("STALLION: board=%d is unknown board type=%d\n",
2076 brdp->brdnr, brdp->brdtype);
3b85b341
JS		 2077 retval = -ENODEV;
2078 goto err;
1da177e4
LT		 2079 }
2080
1da177e4
LT		 2081 if ((brdp->state & BRD_FOUND) == 0) {
2082 printk("STALLION: %s board not found, board=%d io=%x irq=%d\n",
2083 stl_brdnames[brdp->brdtype], brdp->brdnr,
2084 brdp->ioaddr1, brdp->irq);
3b85b341 2085 goto err_free;
1da177e4
LT		 2086 }
2087
c62429d9 2088 for (i = 0; i < STL_MAXPANELS; i++)
615e4a71 2089 if (brdp->panels[i] != NULL)
1da177e4
LT		 2090 stl_initports(brdp, brdp->panels[i]);
2091
2092 printk("STALLION: %s found, board=%d io=%x irq=%d "
2093 "nrpanels=%d nrports=%d\n", stl_brdnames[brdp->brdtype],
2094 brdp->brdnr, brdp->ioaddr1, brdp->irq, brdp->nrpanels,
2095 brdp->nrports);
3b85b341
JS		 2096
2097 return 0;
2098err_free:
2099 free_irq(brdp->irq, brdp);
2100
2101 stl_cleanup_panels(brdp);
2102
2103 release_region(brdp->ioaddr1, brdp->iosize1);
2104 if (brdp->iosize2 > 0)
2105 release_region(brdp->ioaddr2, brdp->iosize2);
3b85b341
JS		 2106err:
2107 return retval;
1da177e4
LT		 2108}
2109
2110/*****************************************************************************/
2111
2112/*
2113 * Find the next available board number that is free.
2114 */
2115
705c1862 2116static int __devinit stl_getbrdnr(void)
1da177e4 2117{
6b2c9457 2118 unsigned int i;
1da177e4 2119
c62429d9 2120 for (i = 0; i < STL_MAXBRDS; i++)
615e4a71 2121 if (stl_brds[i] == NULL) {
1da177e4
LT		 2122 if (i >= stl_nrbrds)
2123 stl_nrbrds = i + 1;
c62429d9 2124 return i;
1da177e4 2125 }
c62429d9
JS		 2126
2127 return -1;
1da177e4
LT		 2128}
2129
b1b84fe0 2130/*****************************************************************************/
1da177e4
LT		 2131/*
2132 * We have a Stallion board. Allocate a board structure and
2133 * initialize it. Read its IO and IRQ resources from PCI
2134 * configuration space.
2135 */
2136
b1b84fe0
JS		 2137static int __devinit stl_pciprobe(struct pci_dev *pdev,
2138 const struct pci_device_id *ent)
1da177e4 2139{
b1b84fe0 2140 struct stlbrd *brdp;
aeaccfe4 2141 unsigned int i, brdtype = ent->driver_data;
6b2c9457 2142 int brdnr, retval = -ENODEV;
1da177e4 2143
b1b84fe0 2144 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
3b85b341 2145 goto err;
b1b84fe0 2146
3b85b341
JS		 2147 retval = pci_enable_device(pdev);
2148 if (retval)
2149 goto err;
2150 brdp = stl_allocbrd();
2151 if (brdp == NULL) {
2152 retval = -ENOMEM;
2153 goto err;
2154 }
79cfe7ab 2155 mutex_lock(&stl_brdslock);
6b2c9457
JS		 2156 brdnr = stl_getbrdnr();
2157 if (brdnr < 0) {
fefaf9a7 2158 dev_err(&pdev->dev, "too many boards found, "
1da177e4 2159 "maximum supported %d\n", STL_MAXBRDS);
79cfe7ab 2160 mutex_unlock(&stl_brdslock);
49277b1c 2161 retval = -ENODEV;
3b85b341 2162 goto err_fr;
1da177e4 2163 }
6b2c9457 2164 brdp->brdnr = (unsigned int)brdnr;
79cfe7ab
JS		 2165 stl_brds[brdp->brdnr] = brdp;
2166 mutex_unlock(&stl_brdslock);
2167
1da177e4 2168 brdp->brdtype = brdtype;
fc06b5cf 2169 brdp->state |= STL_PROBED;
1da177e4 2170
1da177e4
LT		 2171/*
2172 * We have all resources from the board, so let's setup the actual
2173 * board structure now.
2174 */
2175 switch (brdtype) {
2176 case BRD_ECHPCI:
b1b84fe0
JS		 2177 brdp->ioaddr2 = pci_resource_start(pdev, 0);
2178 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2179 break;
2180 case BRD_ECH64PCI:
b1b84fe0
JS		 2181 brdp->ioaddr2 = pci_resource_start(pdev, 2);
2182 brdp->ioaddr1 = pci_resource_start(pdev, 1);
1da177e4
LT		 2183 break;
2184 case BRD_EASYIOPCI:
b1b84fe0
JS		 2185 brdp->ioaddr1 = pci_resource_start(pdev, 2);
2186 brdp->ioaddr2 = pci_resource_start(pdev, 1);
1da177e4
LT		 2187 break;
2188 default:
fefaf9a7 2189 dev_err(&pdev->dev, "unknown PCI board type=%u\n", brdtype);
1da177e4
LT		 2190 break;
2191 }
2192
b1b84fe0 2193 brdp->irq = pdev->irq;
3b85b341
JS		 2194 retval = stl_brdinit(brdp);
2195 if (retval)
79cfe7ab 2196 goto err_null;
1da177e4 2197
b1b84fe0
JS		 2198 pci_set_drvdata(pdev, brdp);
2199
aeaccfe4
JS		 2200 for (i = 0; i < brdp->nrports; i++)
2201 tty_register_device(stl_serial,
2202 brdp->brdnr * STL_MAXPORTS + i, &pdev->dev);
2203
3b85b341 2204 return 0;
79cfe7ab
JS		 2205err_null:
2206 stl_brds[brdp->brdnr] = NULL;
3b85b341
JS		 2207err_fr:
2208 kfree(brdp);
2209err:
2210 return retval;
1da177e4
LT		 2211}
2212
b1b84fe0 2213static void __devexit stl_pciremove(struct pci_dev *pdev)
1da177e4 2214{
b1b84fe0 2215 struct stlbrd *brdp = pci_get_drvdata(pdev);
aeaccfe4 2216 unsigned int i;
1da177e4 2217
b1b84fe0 2218 free_irq(brdp->irq, brdp);
1da177e4 2219
b1b84fe0 2220 stl_cleanup_panels(brdp);
1da177e4 2221
b1b84fe0
JS		 2222 release_region(brdp->ioaddr1, brdp->iosize1);
2223 if (brdp->iosize2 > 0)
2224 release_region(brdp->ioaddr2, brdp->iosize2);
1da177e4 2225
aeaccfe4
JS		 2226 for (i = 0; i < brdp->nrports; i++)
2227 tty_unregister_device(stl_serial,
2228 brdp->brdnr * STL_MAXPORTS + i);
2229
b1b84fe0
JS		 2230 stl_brds[brdp->brdnr] = NULL;
2231 kfree(brdp);
1da177e4
LT		 2232}
2233
b1b84fe0
JS		 2234static struct pci_driver stl_pcidriver = {
2235 .name = "stallion",
2236 .id_table = stl_pcibrds,
2237 .probe = stl_pciprobe,
2238 .remove = __devexit_p(stl_pciremove)
2239};
1da177e4
LT		 2240
2241/*****************************************************************************/
2242
1da177e4
LT		 2243/*
2244 * Return the board stats structure to user app.
2245 */
2246
2247static int stl_getbrdstats(combrd_t __user *bp)
2248{
6b2c9457 2249 combrd_t stl_brdstats;
ca7ed0f2
JS		 2250 struct stlbrd *brdp;
2251 struct stlpanel *panelp;
6b2c9457 2252 unsigned int i;
1da177e4
LT		 2253
2254 if (copy_from_user(&stl_brdstats, bp, sizeof(combrd_t)))
2255 return -EFAULT;
2256 if (stl_brdstats.brd >= STL_MAXBRDS)
c62429d9 2257 return -ENODEV;
1da177e4 2258 brdp = stl_brds[stl_brdstats.brd];
615e4a71 2259 if (brdp == NULL)
c62429d9 2260 return -ENODEV;
1da177e4
LT		 2261
2262 memset(&stl_brdstats, 0, sizeof(combrd_t));
2263 stl_brdstats.brd = brdp->brdnr;
2264 stl_brdstats.type = brdp->brdtype;
2265 stl_brdstats.hwid = brdp->hwid;
2266 stl_brdstats.state = brdp->state;
2267 stl_brdstats.ioaddr = brdp->ioaddr1;
2268 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2269 stl_brdstats.irq = brdp->irq;
2270 stl_brdstats.nrpanels = brdp->nrpanels;
2271 stl_brdstats.nrports = brdp->nrports;
c62429d9 2272 for (i = 0; i < brdp->nrpanels; i++) {
1da177e4
LT		 2273 panelp = brdp->panels[i];
2274 stl_brdstats.panels[i].panel = i;
2275 stl_brdstats.panels[i].hwid = panelp->hwid;
2276 stl_brdstats.panels[i].nrports = panelp->nrports;
2277 }
2278
2279 return copy_to_user(bp, &stl_brdstats, sizeof(combrd_t)) ? -EFAULT : 0;
2280}
2281
2282/*****************************************************************************/
2283
2284/*
2285 * Resolve the referenced port number into a port struct pointer.
2286 */
2287
ca7ed0f2 2288static struct stlport *stl_getport(int brdnr, int panelnr, int portnr)
1da177e4 2289{
ca7ed0f2
JS		 2290 struct stlbrd *brdp;
2291 struct stlpanel *panelp;
1da177e4 2292
c62429d9
JS		 2293 if (brdnr < 0 || brdnr >= STL_MAXBRDS)
2294 return NULL;
1da177e4 2295 brdp = stl_brds[brdnr];
615e4a71 2296 if (brdp == NULL)
c62429d9 2297 return NULL;
6b2c9457 2298 if (panelnr < 0 || (unsigned int)panelnr >= brdp->nrpanels)
c62429d9 2299 return NULL;
1da177e4 2300 panelp = brdp->panels[panelnr];
615e4a71 2301 if (panelp == NULL)
c62429d9 2302 return NULL;
6b2c9457 2303 if (portnr < 0 || (unsigned int)portnr >= panelp->nrports)
c62429d9
JS		 2304 return NULL;
2305 return panelp->ports[portnr];
1da177e4
LT		 2306}
2307
2308/*****************************************************************************/
2309
2310/*
2311 * Return the port stats structure to user app. A NULL port struct
2312 * pointer passed in means that we need to find out from the app
2313 * what port to get stats for (used through board control device).
2314 */
2315
d18a750f 2316static int stl_getportstats(struct tty_struct *tty, struct stlport *portp, comstats_t __user *cp)
1da177e4 2317{
6b2c9457 2318 comstats_t stl_comstats;
1da177e4
LT		 2319 unsigned char *head, *tail;
2320 unsigned long flags;
2321
2322 if (!portp) {
2323 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2324 return -EFAULT;
2325 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2326 stl_comstats.port);
615e4a71 2327 if (portp == NULL)
c62429d9 2328 return -ENODEV;
1da177e4
LT		 2329 }
2330
b4eda9cb 2331 mutex_lock(&portp->port.mutex);
1da177e4 2332 portp->stats.state = portp->istate;
f8ae4764 2333 portp->stats.flags = portp->port.flags;
1da177e4
LT		 2334 portp->stats.hwid = portp->hwid;
2335
2336 portp->stats.ttystate = 0;
2337 portp->stats.cflags = 0;
2338 portp->stats.iflags = 0;
2339 portp->stats.oflags = 0;
2340 portp->stats.lflags = 0;
2341 portp->stats.rxbuffered = 0;
2342
b65b5b59 2343 spin_lock_irqsave(&stallion_lock, flags);
d18a750f
AC		 2344 if (tty != NULL && portp->port.tty == tty) {
2345 portp->stats.ttystate = tty->flags;
2346 /* No longer available as a statistic */
2347 portp->stats.rxbuffered = 1; /*tty->flip.count; */
2348 if (tty->termios != NULL) {
2349 portp->stats.cflags = tty->termios->c_cflag;
2350 portp->stats.iflags = tty->termios->c_iflag;
2351 portp->stats.oflags = tty->termios->c_oflag;
2352 portp->stats.lflags = tty->termios->c_lflag;
1da177e4 2353 }
d18a750f 2354 }
b65b5b59 2355 spin_unlock_irqrestore(&stallion_lock, flags);
1da177e4
LT		 2356
2357 head = portp->tx.head;
2358 tail = portp->tx.tail;
c62429d9
JS		 2359 portp->stats.txbuffered = (head >= tail) ? (head - tail) :
2360 (STL_TXBUFSIZE - (tail - head));
1da177e4
LT		 2361
2362 portp->stats.signals = (unsigned long) stl_getsignals(portp);
b4eda9cb 2363 mutex_unlock(&portp->port.mutex);
1da177e4
LT		 2364
2365 return copy_to_user(cp, &portp->stats,
2366 sizeof(comstats_t)) ? -EFAULT : 0;
2367}
2368
2369/*****************************************************************************/
2370
2371/*
2372 * Clear the port stats structure. We also return it zeroed out...
2373 */
2374
ca7ed0f2 2375static int stl_clrportstats(struct stlport *portp, comstats_t __user *cp)
1da177e4 2376{
6b2c9457
JS		 2377 comstats_t stl_comstats;
2378
1da177e4
LT		 2379 if (!portp) {
2380 if (copy_from_user(&stl_comstats, cp, sizeof(comstats_t)))
2381 return -EFAULT;
2382 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2383 stl_comstats.port);
615e4a71 2384 if (portp == NULL)
c62429d9 2385 return -ENODEV;
1da177e4
LT		 2386 }
2387
b4eda9cb 2388 mutex_lock(&portp->port.mutex);
1da177e4
LT		 2389 memset(&portp->stats, 0, sizeof(comstats_t));
2390 portp->stats.brd = portp->brdnr;
2391 portp->stats.panel = portp->panelnr;
2392 portp->stats.port = portp->portnr;
b4eda9cb 2393 mutex_unlock(&portp->port.mutex);
1da177e4
LT		 2394 return copy_to_user(cp, &portp->stats,
2395 sizeof(comstats_t)) ? -EFAULT : 0;
2396}
2397
2398/*****************************************************************************/
2399
2400/*
2401 * Return the entire driver ports structure to a user app.
2402 */
2403
ca7ed0f2 2404static int stl_getportstruct(struct stlport __user *arg)
1da177e4 2405{
6b2c9457 2406 struct stlport stl_dummyport;
ca7ed0f2 2407 struct stlport *portp;
1da177e4 2408
ca7ed0f2 2409 if (copy_from_user(&stl_dummyport, arg, sizeof(struct stlport)))
1da177e4
LT		 2410 return -EFAULT;
2411 portp = stl_getport(stl_dummyport.brdnr, stl_dummyport.panelnr,
2412 stl_dummyport.portnr);
2413 if (!portp)
2414 return -ENODEV;
ca7ed0f2 2415 return copy_to_user(arg, portp, sizeof(struct stlport)) ? -EFAULT : 0;
1da177e4
LT		 2416}
2417
2418/*****************************************************************************/
2419
2420/*
2421 * Return the entire driver board structure to a user app.
2422 */
2423
ca7ed0f2 2424static int stl_getbrdstruct(struct stlbrd __user *arg)
1da177e4 2425{
6b2c9457 2426 struct stlbrd stl_dummybrd;
ca7ed0f2 2427 struct stlbrd *brdp;
1da177e4 2428
ca7ed0f2 2429 if (copy_from_user(&stl_dummybrd, arg, sizeof(struct stlbrd)))
1da177e4 2430 return -EFAULT;
6b2c9457 2431 if (stl_dummybrd.brdnr >= STL_MAXBRDS)
1da177e4
LT		 2432 return -ENODEV;
2433 brdp = stl_brds[stl_dummybrd.brdnr];
2434 if (!brdp)
c62429d9 2435 return -ENODEV;
ca7ed0f2 2436 return copy_to_user(arg, brdp, sizeof(struct stlbrd)) ? -EFAULT : 0;
1da177e4
LT		 2437}
2438
2439/*****************************************************************************/
2440
2441/*
2442 * The "staliomem" device is also required to do some special operations
2443 * on the board and/or ports. In this driver it is mostly used for stats
2444 * collection.
2445 */
2446
894cb917 2447static long stl_memioctl(struct file *fp, unsigned int cmd, unsigned long arg)
1da177e4
LT		 2448{
2449 int brdnr, rc;
2450 void __user *argp = (void __user *)arg;
2451
894cb917 2452 pr_debug("stl_memioctl(fp=%p,cmd=%x,arg=%lx)\n", fp, cmd,arg);
1da177e4 2453
894cb917 2454 brdnr = iminor(fp->f_dentry->d_inode);
1da177e4 2455 if (brdnr >= STL_MAXBRDS)
c62429d9 2456 return -ENODEV;
1da177e4
LT		 2457 rc = 0;
2458
2459 switch (cmd) {
2460 case COM_GETPORTSTATS:
d18a750f 2461 rc = stl_getportstats(NULL, NULL, argp);
1da177e4
LT		 2462 break;
2463 case COM_CLRPORTSTATS:
2464 rc = stl_clrportstats(NULL, argp);
2465 break;
2466 case COM_GETBRDSTATS:
2467 rc = stl_getbrdstats(argp);
2468 break;
2469 case COM_READPORT:
2470 rc = stl_getportstruct(argp);
2471 break;
2472 case COM_READBOARD:
2473 rc = stl_getbrdstruct(argp);
2474 break;
2475 default:
2476 rc = -ENOIOCTLCMD;
2477 break;
2478 }
c62429d9 2479 return rc;
1da177e4
LT		 2480}
2481
b68e31d0 2482static const struct tty_operations stl_ops = {
1da177e4
LT		 2483 .open = stl_open,
2484 .close = stl_close,
2485 .write = stl_write,
2486 .put_char = stl_putchar,
2487 .flush_chars = stl_flushchars,
2488 .write_room = stl_writeroom,
2489 .chars_in_buffer = stl_charsinbuffer,
2490 .ioctl = stl_ioctl,
2491 .set_termios = stl_settermios,
2492 .throttle = stl_throttle,
2493 .unthrottle = stl_unthrottle,
2494 .stop = stl_stop,
2495 .start = stl_start,
2496 .hangup = stl_hangup,
2497 .flush_buffer = stl_flushbuffer,
2498 .break_ctl = stl_breakctl,
2499 .wait_until_sent = stl_waituntilsent,
2500 .send_xchar = stl_sendxchar,
1da177e4
LT		 2501 .tiocmget = stl_tiocmget,
2502 .tiocmset = stl_tiocmset,
8561c44c 2503 .proc_fops = &stl_proc_fops,
1da177e4
LT		 2504};
2505
31f35939
AC		 2506static const struct tty_port_operations stl_port_ops = {
2507 .carrier_raised = stl_carrier_raised,
fcc8ac18 2508 .dtr_rts = stl_dtr_rts,
047e9658
AC		 2509 .activate = stl_activate,
2510 .shutdown = stl_shutdown,
31f35939
AC		 2511};
2512
1da177e4
LT		 2513/*****************************************************************************/
2514/* CD1400 HARDWARE FUNCTIONS */
2515/*****************************************************************************/
2516
2517/*
2518 * These functions get/set/update the registers of the cd1400 UARTs.
2519 * Access to the cd1400 registers is via an address/data io port pair.
2520 * (Maybe should make this inline...)
2521 */
2522
ca7ed0f2 2523static int stl_cd1400getreg(struct stlport *portp, int regnr)
1da177e4
LT		 2524{
2525 outb((regnr + portp->uartaddr), portp->ioaddr);
014c2544 2526 return inb(portp->ioaddr + EREG_DATA);
1da177e4
LT		 2527}
2528
ca7ed0f2 2529static void stl_cd1400setreg(struct stlport *portp, int regnr, int value)
1da177e4 2530{
c62429d9 2531 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2532 outb(value, portp->ioaddr + EREG_DATA);
2533}
2534
ca7ed0f2 2535static int stl_cd1400updatereg(struct stlport *portp, int regnr, int value)
1da177e4 2536{
c62429d9 2537 outb(regnr + portp->uartaddr, portp->ioaddr);
1da177e4
LT		 2538 if (inb(portp->ioaddr + EREG_DATA) != value) {
2539 outb(value, portp->ioaddr + EREG_DATA);
014c2544 2540 return 1;
1da177e4 2541 }
014c2544 2542 return 0;
1da177e4
LT		 2543}
2544
2545/*****************************************************************************/
2546
2547/*
2548 * Inbitialize the UARTs in a panel. We don't care what sort of board
2549 * these ports are on - since the port io registers are almost
2550 * identical when dealing with ports.
2551 */
2552
ca7ed0f2 2553static int stl_cd1400panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 2554{
2555 unsigned int gfrcr;
2556 int chipmask, i, j;
2557 int nrchips, uartaddr, ioaddr;
b65b5b59 2558 unsigned long flags;
1da177e4 2559
a0564e14 2560 pr_debug("stl_panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4 2561
b65b5b59 2562 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2563 BRDENABLE(panelp->brdnr, panelp->pagenr);
2564
2565/*
2566 * Check that each chip is present and started up OK.
2567 */
2568 chipmask = 0;
2569 nrchips = panelp->nrports / CD1400_PORTS;
c62429d9 2570 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 2571 if (brdp->brdtype == BRD_ECHPCI) {
2572 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
2573 ioaddr = panelp->iobase;
c62429d9 2574 } else
1da177e4 2575 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
1da177e4
LT		 2576 uartaddr = (i & 0x01) ? 0x080 : 0;
2577 outb((GFRCR + uartaddr), ioaddr);
2578 outb(0, (ioaddr + EREG_DATA));
2579 outb((CCR + uartaddr), ioaddr);
2580 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2581 outb(CCR_RESETFULL, (ioaddr + EREG_DATA));
2582 outb((GFRCR + uartaddr), ioaddr);
c62429d9 2583 for (j = 0; j < CCR_MAXWAIT; j++)
1da177e4
LT		 2584 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
2585 break;
c62429d9 2586
1da177e4
LT		 2587 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
2588 printk("STALLION: cd1400 not responding, "
2589 "brd=%d panel=%d chip=%d\n",
2590 panelp->brdnr, panelp->panelnr, i);
2591 continue;
2592 }
2593 chipmask |= (0x1 << i);
2594 outb((PPR + uartaddr), ioaddr);
2595 outb(PPR_SCALAR, (ioaddr + EREG_DATA));
2596 }
2597
2598 BRDDISABLE(panelp->brdnr);
b65b5b59 2599 spin_unlock_irqrestore(&brd_lock, flags);
014c2544 2600 return chipmask;
1da177e4
LT		 2601}
2602
2603/*****************************************************************************/
2604
2605/*
2606 * Initialize hardware specific port registers.
2607 */
2608
ca7ed0f2 2609static void stl_cd1400portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 2610{
b65b5b59 2611 unsigned long flags;
a0564e14
JS		 2612 pr_debug("stl_cd1400portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
2613 panelp, portp);
1da177e4 2614
615e4a71
JS		 2615 if ((brdp == NULL) || (panelp == NULL) ||
2616 (portp == NULL))
1da177e4
LT		 2617 return;
2618
b65b5b59 2619 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2620 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
2621 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
2622 portp->uartaddr = (portp->portnr & 0x04) << 5;
2623 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
2624
2625 BRDENABLE(portp->brdnr, portp->pagenr);
2626 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2627 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
2628 portp->hwid = stl_cd1400getreg(portp, GFRCR);
2629 BRDDISABLE(portp->brdnr);
b65b5b59 2630 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2631}
2632
2633/*****************************************************************************/
2634
2635/*
2636 * Wait for the command register to be ready. We will poll this,
2637 * since it won't usually take too long to be ready.
2638 */
2639
ca7ed0f2 2640static void stl_cd1400ccrwait(struct stlport *portp)
1da177e4
LT		 2641{
2642 int i;
2643
c62429d9
JS		 2644 for (i = 0; i < CCR_MAXWAIT; i++)
2645 if (stl_cd1400getreg(portp, CCR) == 0)
1da177e4 2646 return;
1da177e4
LT		 2647
2648 printk("STALLION: cd1400 not responding, port=%d panel=%d brd=%d\n",
2649 portp->portnr, portp->panelnr, portp->brdnr);
2650}
2651
2652/*****************************************************************************/
2653
2654/*
2655 * Set up the cd1400 registers for a port based on the termios port
2656 * settings.
2657 */
2658
606d099c 2659static void stl_cd1400setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 2660{
ca7ed0f2 2661 struct stlbrd *brdp;
1da177e4
LT		 2662 unsigned long flags;
2663 unsigned int clkdiv, baudrate;
2664 unsigned char cor1, cor2, cor3;
2665 unsigned char cor4, cor5, ccr;
2666 unsigned char srer, sreron, sreroff;
2667 unsigned char mcor1, mcor2, rtpr;
2668 unsigned char clk, div;
2669
2670 cor1 = 0;
2671 cor2 = 0;
2672 cor3 = 0;
2673 cor4 = 0;
2674 cor5 = 0;
2675 ccr = 0;
2676 rtpr = 0;
2677 clk = 0;
2678 div = 0;
2679 mcor1 = 0;
2680 mcor2 = 0;
2681 sreron = 0;
2682 sreroff = 0;
2683
2684 brdp = stl_brds[portp->brdnr];
615e4a71 2685 if (brdp == NULL)
1da177e4
LT		 2686 return;
2687
2688/*
2689 * Set up the RX char ignore mask with those RX error types we
2690 * can ignore. We can get the cd1400 to help us out a little here,
2691 * it will ignore parity errors and breaks for us.
2692 */
2693 portp->rxignoremsk = 0;
2694 if (tiosp->c_iflag & IGNPAR) {
2695 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
2696 cor1 |= COR1_PARIGNORE;
2697 }
2698 if (tiosp->c_iflag & IGNBRK) {
2699 portp->rxignoremsk |= ST_BREAK;
2700 cor4 |= COR4_IGNBRK;
2701 }
2702
2703 portp->rxmarkmsk = ST_OVERRUN;
2704 if (tiosp->c_iflag & (INPCK | PARMRK))
2705 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
2706 if (tiosp->c_iflag & BRKINT)
2707 portp->rxmarkmsk |= ST_BREAK;
2708
2709/*
2710 * Go through the char size, parity and stop bits and set all the
2711 * option register appropriately.
2712 */
2713 switch (tiosp->c_cflag & CSIZE) {
2714 case CS5:
2715 cor1 |= COR1_CHL5;
2716 break;
2717 case CS6:
2718 cor1 |= COR1_CHL6;
2719 break;
2720 case CS7:
2721 cor1 |= COR1_CHL7;
2722 break;
2723 default:
2724 cor1 |= COR1_CHL8;
2725 break;
2726 }
2727
2728 if (tiosp->c_cflag & CSTOPB)
2729 cor1 |= COR1_STOP2;
2730 else
2731 cor1 |= COR1_STOP1;
2732
2733 if (tiosp->c_cflag & PARENB) {
2734 if (tiosp->c_cflag & PARODD)
2735 cor1 |= (COR1_PARENB | COR1_PARODD);
2736 else
2737 cor1 |= (COR1_PARENB | COR1_PAREVEN);
2738 } else {
2739 cor1 |= COR1_PARNONE;
2740 }
2741
2742/*
2743 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
2744 * space for hardware flow control and the like. This should be set to
2745 * VMIN. Also here we will set the RX data timeout to 10ms - this should
2746 * really be based on VTIME.
2747 */
2748 cor3 |= FIFO_RXTHRESHOLD;
2749 rtpr = 2;
2750
2751/*
2752 * Calculate the baud rate timers. For now we will just assume that
2753 * the input and output baud are the same. Could have used a baud
2754 * table here, but this way we can generate virtually any baud rate
2755 * we like!
2756 */
2757 baudrate = tiosp->c_cflag & CBAUD;
2758 if (baudrate & CBAUDEX) {
2759 baudrate &= ~CBAUDEX;
2760 if ((baudrate < 1) || (baudrate > 4))
2761 tiosp->c_cflag &= ~CBAUDEX;
2762 else
2763 baudrate += 15;
2764 }
2765 baudrate = stl_baudrates[baudrate];
2766 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 2767 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 2768 baudrate = 57600;
f8ae4764 2769 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 2770 baudrate = 115200;
f8ae4764 2771 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 2772 baudrate = 230400;
f8ae4764 2773 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 2774 baudrate = 460800;
f8ae4764 2775 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 2776 baudrate = (portp->baud_base / portp->custom_divisor);
2777 }
2778 if (baudrate > STL_CD1400MAXBAUD)
2779 baudrate = STL_CD1400MAXBAUD;
2780
2781 if (baudrate > 0) {
c62429d9
JS		 2782 for (clk = 0; clk < CD1400_NUMCLKS; clk++) {
2783 clkdiv = (portp->clk / stl_cd1400clkdivs[clk]) / baudrate;
1da177e4
LT		 2784 if (clkdiv < 0x100)
2785 break;
2786 }
2787 div = (unsigned char) clkdiv;
2788 }
2789
2790/*
2791 * Check what form of modem signaling is required and set it up.
2792 */
2793 if ((tiosp->c_cflag & CLOCAL) == 0) {
2794 mcor1 |= MCOR1_DCD;
2795 mcor2 |= MCOR2_DCD;
2796 sreron |= SRER_MODEM;
f8ae4764 2797 portp->port.flags |= ASYNC_CHECK_CD;
c62429d9 2798 } else
f8ae4764 2799 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 2800
2801/*
2802 * Setup cd1400 enhanced modes if we can. In particular we want to
2803 * handle as much of the flow control as possible automatically. As
2804 * well as saving a few CPU cycles it will also greatly improve flow
2805 * control reliability.
2806 */
2807 if (tiosp->c_iflag & IXON) {
2808 cor2 |= COR2_TXIBE;
2809 cor3 |= COR3_SCD12;
2810 if (tiosp->c_iflag & IXANY)
2811 cor2 |= COR2_IXM;
2812 }
2813
2814 if (tiosp->c_cflag & CRTSCTS) {
2815 cor2 |= COR2_CTSAE;
2816 mcor1 |= FIFO_RTSTHRESHOLD;
2817 }
2818
2819/*
2820 * All cd1400 register values calculated so go through and set
2821 * them all up.
2822 */
2823
a0564e14 2824 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 2825 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14 2826 pr_debug(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n",
1da177e4 2827 cor1, cor2, cor3, cor4, cor5);
a0564e14 2828 pr_debug(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
1da177e4 2829 mcor1, mcor2, rtpr, sreron, sreroff);
a0564e14
JS		 2830 pr_debug(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
2831 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 2832 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
2833 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 2834
b65b5b59 2835 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2836 BRDENABLE(portp->brdnr, portp->pagenr);
2837 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
2838 srer = stl_cd1400getreg(portp, SRER);
2839 stl_cd1400setreg(portp, SRER, 0);
2840 if (stl_cd1400updatereg(portp, COR1, cor1))
2841 ccr = 1;
2842 if (stl_cd1400updatereg(portp, COR2, cor2))
2843 ccr = 1;
2844 if (stl_cd1400updatereg(portp, COR3, cor3))
2845 ccr = 1;
2846 if (ccr) {
2847 stl_cd1400ccrwait(portp);
2848 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
2849 }
2850 stl_cd1400setreg(portp, COR4, cor4);
2851 stl_cd1400setreg(portp, COR5, cor5);
2852 stl_cd1400setreg(portp, MCOR1, mcor1);
2853 stl_cd1400setreg(portp, MCOR2, mcor2);
2854 if (baudrate > 0) {
2855 stl_cd1400setreg(portp, TCOR, clk);
2856 stl_cd1400setreg(portp, TBPR, div);
2857 stl_cd1400setreg(portp, RCOR, clk);
2858 stl_cd1400setreg(portp, RBPR, div);
2859 }
2860 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
2861 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
2862 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
2863 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
2864 stl_cd1400setreg(portp, RTPR, rtpr);
2865 mcor1 = stl_cd1400getreg(portp, MSVR1);
2866 if (mcor1 & MSVR1_DCD)
2867 portp->sigs |= TIOCM_CD;
2868 else
2869 portp->sigs &= ~TIOCM_CD;
2870 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
2871 BRDDISABLE(portp->brdnr);
b65b5b59 2872 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2873}
2874
2875/*****************************************************************************/
2876
2877/*
2878 * Set the state of the DTR and RTS signals.
2879 */
2880
ca7ed0f2 2881static void stl_cd1400setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 2882{
2883 unsigned char msvr1, msvr2;
2884 unsigned long flags;
2885
a0564e14
JS		 2886 pr_debug("stl_cd1400setsignals(portp=%p,dtr=%d,rts=%d)\n",
2887 portp, dtr, rts);
1da177e4
LT		 2888
2889 msvr1 = 0;
2890 msvr2 = 0;
2891 if (dtr > 0)
2892 msvr1 = MSVR1_DTR;
2893 if (rts > 0)
2894 msvr2 = MSVR2_RTS;
2895
b65b5b59 2896 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2897 BRDENABLE(portp->brdnr, portp->pagenr);
2898 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2899 if (rts >= 0)
2900 stl_cd1400setreg(portp, MSVR2, msvr2);
2901 if (dtr >= 0)
2902 stl_cd1400setreg(portp, MSVR1, msvr1);
2903 BRDDISABLE(portp->brdnr);
b65b5b59 2904 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2905}
2906
2907/*****************************************************************************/
2908
2909/*
2910 * Return the state of the signals.
2911 */
2912
ca7ed0f2 2913static int stl_cd1400getsignals(struct stlport *portp)
1da177e4
LT		 2914{
2915 unsigned char msvr1, msvr2;
2916 unsigned long flags;
2917 int sigs;
2918
a0564e14 2919 pr_debug("stl_cd1400getsignals(portp=%p)\n", portp);
1da177e4 2920
b65b5b59 2921 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2922 BRDENABLE(portp->brdnr, portp->pagenr);
2923 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2924 msvr1 = stl_cd1400getreg(portp, MSVR1);
2925 msvr2 = stl_cd1400getreg(portp, MSVR2);
2926 BRDDISABLE(portp->brdnr);
b65b5b59 2927 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2928
2929 sigs = 0;
2930 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
2931 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
2932 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
2933 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
2934#if 0
2935 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
2936 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
2937#else
2938 sigs |= TIOCM_DSR;
2939#endif
014c2544 2940 return sigs;
1da177e4
LT		 2941}
2942
2943/*****************************************************************************/
2944
2945/*
2946 * Enable/Disable the Transmitter and/or Receiver.
2947 */
2948
ca7ed0f2 2949static void stl_cd1400enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 2950{
2951 unsigned char ccr;
2952 unsigned long flags;
2953
a0564e14
JS		 2954 pr_debug("stl_cd1400enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
2955
1da177e4
LT		 2956 ccr = 0;
2957
2958 if (tx == 0)
2959 ccr |= CCR_TXDISABLE;
2960 else if (tx > 0)
2961 ccr |= CCR_TXENABLE;
2962 if (rx == 0)
2963 ccr |= CCR_RXDISABLE;
2964 else if (rx > 0)
2965 ccr |= CCR_RXENABLE;
2966
b65b5b59 2967 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 2968 BRDENABLE(portp->brdnr, portp->pagenr);
2969 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2970 stl_cd1400ccrwait(portp);
2971 stl_cd1400setreg(portp, CCR, ccr);
2972 stl_cd1400ccrwait(portp);
2973 BRDDISABLE(portp->brdnr);
b65b5b59 2974 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 2975}
2976
2977/*****************************************************************************/
2978
2979/*
2980 * Start/stop the Transmitter and/or Receiver.
2981 */
2982
ca7ed0f2 2983static void stl_cd1400startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 2984{
2985 unsigned char sreron, sreroff;
2986 unsigned long flags;
2987
a0564e14 2988 pr_debug("stl_cd1400startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 2989
2990 sreron = 0;
2991 sreroff = 0;
2992 if (tx == 0)
2993 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
2994 else if (tx == 1)
2995 sreron |= SRER_TXDATA;
2996 else if (tx >= 2)
2997 sreron |= SRER_TXEMPTY;
2998 if (rx == 0)
2999 sreroff |= SRER_RXDATA;
3000 else if (rx > 0)
3001 sreron |= SRER_RXDATA;
3002
b65b5b59 3003 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3004 BRDENABLE(portp->brdnr, portp->pagenr);
3005 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3006 stl_cd1400setreg(portp, SRER,
3007 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3008 BRDDISABLE(portp->brdnr);
3009 if (tx > 0)
3010 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3011 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3012}
3013
3014/*****************************************************************************/
3015
3016/*
3017 * Disable all interrupts from this port.
3018 */
3019
ca7ed0f2 3020static void stl_cd1400disableintrs(struct stlport *portp)
1da177e4
LT		 3021{
3022 unsigned long flags;
3023
a0564e14
JS		 3024 pr_debug("stl_cd1400disableintrs(portp=%p)\n", portp);
3025
b65b5b59 3026 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3027 BRDENABLE(portp->brdnr, portp->pagenr);
3028 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3029 stl_cd1400setreg(portp, SRER, 0);
3030 BRDDISABLE(portp->brdnr);
b65b5b59 3031 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3032}
3033
3034/*****************************************************************************/
3035
ca7ed0f2 3036static void stl_cd1400sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3037{
3038 unsigned long flags;
3039
a0564e14 3040 pr_debug("stl_cd1400sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3041
b65b5b59 3042 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3043 BRDENABLE(portp->brdnr, portp->pagenr);
3044 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3045 stl_cd1400setreg(portp, SRER,
3046 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3047 SRER_TXEMPTY));
3048 BRDDISABLE(portp->brdnr);
3049 portp->brklen = len;
3050 if (len == 1)
3051 portp->stats.txbreaks++;
b65b5b59 3052 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3053}
3054
3055/*****************************************************************************/
3056
3057/*
3058 * Take flow control actions...
3059 */
3060
ca7ed0f2 3061static void stl_cd1400flowctrl(struct stlport *portp, int state)
1da177e4
LT		 3062{
3063 struct tty_struct *tty;
3064 unsigned long flags;
3065
a0564e14 3066 pr_debug("stl_cd1400flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 3067
615e4a71 3068 if (portp == NULL)
1da177e4 3069 return;
d18a750f 3070 tty = tty_port_tty_get(&portp->port);
615e4a71 3071 if (tty == NULL)
1da177e4
LT		 3072 return;
3073
b65b5b59 3074 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3075 BRDENABLE(portp->brdnr, portp->pagenr);
3076 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3077
3078 if (state) {
3079 if (tty->termios->c_iflag & IXOFF) {
3080 stl_cd1400ccrwait(portp);
3081 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3082 portp->stats.rxxon++;
3083 stl_cd1400ccrwait(portp);
3084 }
3085/*
3086 * Question: should we return RTS to what it was before? It may
3087 * have been set by an ioctl... Suppose not, since if you have
3088 * hardware flow control set then it is pretty silly to go and
3089 * set the RTS line by hand.
3090 */
3091 if (tty->termios->c_cflag & CRTSCTS) {
3092 stl_cd1400setreg(portp, MCOR1,
3093 (stl_cd1400getreg(portp, MCOR1) |
3094 FIFO_RTSTHRESHOLD));
3095 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3096 portp->stats.rxrtson++;
3097 }
3098 } else {
3099 if (tty->termios->c_iflag & IXOFF) {
3100 stl_cd1400ccrwait(portp);
3101 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3102 portp->stats.rxxoff++;
3103 stl_cd1400ccrwait(portp);
3104 }
3105 if (tty->termios->c_cflag & CRTSCTS) {
3106 stl_cd1400setreg(portp, MCOR1,
3107 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3108 stl_cd1400setreg(portp, MSVR2, 0);
3109 portp->stats.rxrtsoff++;
3110 }
3111 }
3112
3113 BRDDISABLE(portp->brdnr);
b65b5b59 3114 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3115 tty_kref_put(tty);
1da177e4
LT		 3116}
3117
3118/*****************************************************************************/
3119
3120/*
3121 * Send a flow control character...
3122 */
3123
ca7ed0f2 3124static void stl_cd1400sendflow(struct stlport *portp, int state)
1da177e4
LT		 3125{
3126 struct tty_struct *tty;
3127 unsigned long flags;
3128
a0564e14 3129 pr_debug("stl_cd1400sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 3130
615e4a71 3131 if (portp == NULL)
1da177e4 3132 return;
d18a750f 3133 tty = tty_port_tty_get(&portp->port);
615e4a71 3134 if (tty == NULL)
1da177e4
LT		 3135 return;
3136
b65b5b59 3137 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3138 BRDENABLE(portp->brdnr, portp->pagenr);
3139 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3140 if (state) {
3141 stl_cd1400ccrwait(portp);
3142 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3143 portp->stats.rxxon++;
3144 stl_cd1400ccrwait(portp);
3145 } else {
3146 stl_cd1400ccrwait(portp);
3147 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3148 portp->stats.rxxoff++;
3149 stl_cd1400ccrwait(portp);
3150 }
3151 BRDDISABLE(portp->brdnr);
b65b5b59 3152 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 3153 tty_kref_put(tty);
1da177e4
LT		 3154}
3155
3156/*****************************************************************************/
3157
ca7ed0f2 3158static void stl_cd1400flush(struct stlport *portp)
1da177e4
LT		 3159{
3160 unsigned long flags;
3161
a0564e14 3162 pr_debug("stl_cd1400flush(portp=%p)\n", portp);
1da177e4 3163
615e4a71 3164 if (portp == NULL)
1da177e4
LT		 3165 return;
3166
b65b5b59 3167 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3168 BRDENABLE(portp->brdnr, portp->pagenr);
3169 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3170 stl_cd1400ccrwait(portp);
3171 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
3172 stl_cd1400ccrwait(portp);
3173 portp->tx.tail = portp->tx.head;
3174 BRDDISABLE(portp->brdnr);
b65b5b59 3175 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3176}
3177
3178/*****************************************************************************/
3179
3180/*
3181 * Return the current state of data flow on this port. This is only
6f0b31c3 3182 * really interesting when determining if data has fully completed
1da177e4
LT		 3183 * transmission or not... This is easy for the cd1400, it accurately
3184 * maintains the busy port flag.
3185 */
3186
ca7ed0f2 3187static int stl_cd1400datastate(struct stlport *portp)
1da177e4 3188{
a0564e14 3189 pr_debug("stl_cd1400datastate(portp=%p)\n", portp);
1da177e4 3190
615e4a71 3191 if (portp == NULL)
014c2544 3192 return 0;
1da177e4 3193
014c2544 3194 return test_bit(ASYI_TXBUSY, &portp->istate) ? 1 : 0;
1da177e4
LT		 3195}
3196
3197/*****************************************************************************/
3198
3199/*
3200 * Interrupt service routine for cd1400 EasyIO boards.
3201 */
3202
ca7ed0f2 3203static void stl_cd1400eiointr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3204{
3205 unsigned char svrtype;
3206
a0564e14 3207 pr_debug("stl_cd1400eiointr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4 3208
b65b5b59 3209 spin_lock(&brd_lock);
1da177e4
LT		 3210 outb(SVRR, iobase);
3211 svrtype = inb(iobase + EREG_DATA);
3212 if (panelp->nrports > 4) {
3213 outb((SVRR + 0x80), iobase);
3214 svrtype |= inb(iobase + EREG_DATA);
3215 }
3216
3217 if (svrtype & SVRR_RX)
3218 stl_cd1400rxisr(panelp, iobase);
3219 else if (svrtype & SVRR_TX)
3220 stl_cd1400txisr(panelp, iobase);
3221 else if (svrtype & SVRR_MDM)
3222 stl_cd1400mdmisr(panelp, iobase);
b65b5b59
AC		 3223
3224 spin_unlock(&brd_lock);
1da177e4
LT		 3225}
3226
3227/*****************************************************************************/
3228
3229/*
3230 * Interrupt service routine for cd1400 panels.
3231 */
3232
ca7ed0f2 3233static void stl_cd1400echintr(struct stlpanel *panelp, unsigned int iobase)
1da177e4
LT		 3234{
3235 unsigned char svrtype;
3236
a0564e14 3237 pr_debug("stl_cd1400echintr(panelp=%p,iobase=%x)\n", panelp, iobase);
1da177e4
LT		 3238
3239 outb(SVRR, iobase);
3240 svrtype = inb(iobase + EREG_DATA);
3241 outb((SVRR + 0x80), iobase);
3242 svrtype |= inb(iobase + EREG_DATA);
3243 if (svrtype & SVRR_RX)
3244 stl_cd1400rxisr(panelp, iobase);
3245 else if (svrtype & SVRR_TX)
3246 stl_cd1400txisr(panelp, iobase);
3247 else if (svrtype & SVRR_MDM)
3248 stl_cd1400mdmisr(panelp, iobase);
3249}
3250
3251
3252/*****************************************************************************/
3253
3254/*
3255 * Unfortunately we need to handle breaks in the TX data stream, since
3256 * this is the only way to generate them on the cd1400.
3257 */
3258
60be4810 3259static int stl_cd1400breakisr(struct stlport *portp, int ioaddr)
1da177e4
LT		 3260{
3261 if (portp->brklen == 1) {
3262 outb((COR2 + portp->uartaddr), ioaddr);
3263 outb((inb(ioaddr + EREG_DATA) | COR2_ETC),
3264 (ioaddr + EREG_DATA));
3265 outb((TDR + portp->uartaddr), ioaddr);
3266 outb(ETC_CMD, (ioaddr + EREG_DATA));
3267 outb(ETC_STARTBREAK, (ioaddr + EREG_DATA));
3268 outb((SRER + portp->uartaddr), ioaddr);
3269 outb((inb(ioaddr + EREG_DATA) & ~(SRER_TXDATA | SRER_TXEMPTY)),
3270 (ioaddr + EREG_DATA));
014c2544 3271 return 1;
1da177e4
LT		 3272 } else if (portp->brklen > 1) {
3273 outb((TDR + portp->uartaddr), ioaddr);
3274 outb(ETC_CMD, (ioaddr + EREG_DATA));
3275 outb(ETC_STOPBREAK, (ioaddr + EREG_DATA));
3276 portp->brklen = -1;
014c2544 3277 return 1;
1da177e4
LT		 3278 } else {
3279 outb((COR2 + portp->uartaddr), ioaddr);
3280 outb((inb(ioaddr + EREG_DATA) & ~COR2_ETC),
3281 (ioaddr + EREG_DATA));
3282 portp->brklen = 0;
3283 }
014c2544 3284 return 0;
1da177e4
LT		 3285}
3286
3287/*****************************************************************************/
3288
3289/*
3290 * Transmit interrupt handler. This has gotta be fast! Handling TX
3291 * chars is pretty simple, stuff as many as possible from the TX buffer
3292 * into the cd1400 FIFO. Must also handle TX breaks here, since they
3293 * are embedded as commands in the data stream. Oh no, had to use a goto!
3294 * This could be optimized more, will do when I get time...
3295 * In practice it is possible that interrupts are enabled but that the
3296 * port has been hung up. Need to handle not having any TX buffer here,
3297 * this is done by using the side effect that head and tail will also
3298 * be NULL if the buffer has been freed.
3299 */
3300
ca7ed0f2 3301static void stl_cd1400txisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3302{
ca7ed0f2 3303 struct stlport *portp;
1da177e4
LT		 3304 int len, stlen;
3305 char *head, *tail;
3306 unsigned char ioack, srer;
d18a750f 3307 struct tty_struct *tty;
1da177e4 3308
a0564e14 3309 pr_debug("stl_cd1400txisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3310
3311 ioack = inb(ioaddr + EREG_TXACK);
3312 if (((ioack & panelp->ackmask) != 0) ||
3313 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
3314 printk("STALLION: bad TX interrupt ack value=%x\n", ioack);
3315 return;
3316 }
3317 portp = panelp->ports[(ioack >> 3)];
3318
3319/*
3320 * Unfortunately we need to handle breaks in the data stream, since
3321 * this is the only way to generate them on the cd1400. Do it now if
3322 * a break is to be sent.
3323 */
3324 if (portp->brklen != 0)
3325 if (stl_cd1400breakisr(portp, ioaddr))
3326 goto stl_txalldone;
3327
3328 head = portp->tx.head;
3329 tail = portp->tx.tail;
3330 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
3331 if ((len == 0) || ((len < STL_TXBUFLOW) &&
3332 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
3333 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 3334 tty = tty_port_tty_get(&portp->port);
3335 if (tty) {
3336 tty_wakeup(tty);
3337 tty_kref_put(tty);
3338 }
1da177e4
LT		 3339 }
3340
3341 if (len == 0) {
3342 outb((SRER + portp->uartaddr), ioaddr);
3343 srer = inb(ioaddr + EREG_DATA);
3344 if (srer & SRER_TXDATA) {
3345 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
3346 } else {
3347 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
3348 clear_bit(ASYI_TXBUSY, &portp->istate);
3349 }
3350 outb(srer, (ioaddr + EREG_DATA));
3351 } else {
843b568c 3352 len = min(len, CD1400_TXFIFOSIZE);
1da177e4 3353 portp->stats.txtotal += len;
319fe7c3
JS		 3354 stlen = min_t(unsigned int, len,
3355 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 3356 outb((TDR + portp->uartaddr), ioaddr);
3357 outsb((ioaddr + EREG_DATA), tail, stlen);
3358 len -= stlen;
3359 tail += stlen;
3360 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
3361 tail = portp->tx.buf;
3362 if (len > 0) {
3363 outsb((ioaddr + EREG_DATA), tail, len);
3364 tail += len;
3365 }
3366 portp->tx.tail = tail;
3367 }
3368
3369stl_txalldone:
3370 outb((EOSRR + portp->uartaddr), ioaddr);
3371 outb(0, (ioaddr + EREG_DATA));
3372}
3373
3374/*****************************************************************************/
3375
3376/*
3377 * Receive character interrupt handler. Determine if we have good chars
3378 * or bad chars and then process appropriately. Good chars are easy
3379 * just shove the lot into the RX buffer and set all status byte to 0.
3380 * If a bad RX char then process as required. This routine needs to be
3381 * fast! In practice it is possible that we get an interrupt on a port
3382 * that is closed. This can happen on hangups - since they completely
3383 * shutdown a port not in user context. Need to handle this case.
3384 */
3385
ca7ed0f2 3386static void stl_cd1400rxisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3387{
ca7ed0f2 3388 struct stlport *portp;
1da177e4
LT		 3389 struct tty_struct *tty;
3390 unsigned int ioack, len, buflen;
3391 unsigned char status;
3392 char ch;
3393
a0564e14 3394 pr_debug("stl_cd1400rxisr(panelp=%p,ioaddr=%x)\n", panelp, ioaddr);
1da177e4
LT		 3395
3396 ioack = inb(ioaddr + EREG_RXACK);
3397 if ((ioack & panelp->ackmask) != 0) {
3398 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
3399 return;
3400 }
3401 portp = panelp->ports[(ioack >> 3)];
d18a750f 3402 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 3403
3404 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
3405 outb((RDCR + portp->uartaddr), ioaddr);
3406 len = inb(ioaddr + EREG_DATA);
33f0f88f 3407 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 3408 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 3409 outb((RDSR + portp->uartaddr), ioaddr);
3410 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3411 portp->stats.rxlost += len;
3412 portp->stats.rxtotal += len;
3413 } else {
843b568c 3414 len = min(len, buflen);
1da177e4 3415 if (len > 0) {
33f0f88f 3416 unsigned char *ptr;
1da177e4 3417 outb((RDSR + portp->uartaddr), ioaddr);
33f0f88f
AC		 3418 tty_prepare_flip_string(tty, &ptr, len);
3419 insb((ioaddr + EREG_DATA), ptr, len);
1da177e4
LT		 3420 tty_schedule_flip(tty);
3421 portp->stats.rxtotal += len;
3422 }
3423 }
3424 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3425 outb((RDSR + portp->uartaddr), ioaddr);
3426 status = inb(ioaddr + EREG_DATA);
3427 ch = inb(ioaddr + EREG_DATA);
3428 if (status & ST_PARITY)
3429 portp->stats.rxparity++;
3430 if (status & ST_FRAMING)
3431 portp->stats.rxframing++;
3432 if (status & ST_OVERRUN)
3433 portp->stats.rxoverrun++;
3434 if (status & ST_BREAK)
3435 portp->stats.rxbreaks++;
3436 if (status & ST_SCHARMASK) {
3437 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3438 portp->stats.txxon++;
3439 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3440 portp->stats.txxoff++;
3441 goto stl_rxalldone;
3442 }
33f0f88f 3443 if (tty != NULL && (portp->rxignoremsk & status) == 0) {
1da177e4
LT		 3444 if (portp->rxmarkmsk & status) {
3445 if (status & ST_BREAK) {
3446 status = TTY_BREAK;
f8ae4764 3447 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 3448 do_SAK(tty);
3449 BRDENABLE(portp->brdnr, portp->pagenr);
3450 }
c62429d9 3451 } else if (status & ST_PARITY)
1da177e4 3452 status = TTY_PARITY;
c62429d9 3453 else if (status & ST_FRAMING)
1da177e4 3454 status = TTY_FRAME;
c62429d9 3455 else if(status & ST_OVERRUN)
1da177e4 3456 status = TTY_OVERRUN;
c62429d9 3457 else
1da177e4 3458 status = 0;
c62429d9 3459 } else
1da177e4 3460 status = 0;
33f0f88f
AC		 3461 tty_insert_flip_char(tty, ch, status);
3462 tty_schedule_flip(tty);
1da177e4
LT		 3463 }
3464 } else {
3465 printk("STALLION: bad RX interrupt ack value=%x\n", ioack);
d18a750f 3466 tty_kref_put(tty);
1da177e4
LT		 3467 return;
3468 }
3469
3470stl_rxalldone:
d18a750f 3471 tty_kref_put(tty);
1da177e4
LT		 3472 outb((EOSRR + portp->uartaddr), ioaddr);
3473 outb(0, (ioaddr + EREG_DATA));
3474}
3475
3476/*****************************************************************************/
3477
3478/*
3479 * Modem interrupt handler. The is called when the modem signal line
3480 * (DCD) has changed state. Leave most of the work to the off-level
3481 * processing routine.
3482 */
3483
ca7ed0f2 3484static void stl_cd1400mdmisr(struct stlpanel *panelp, int ioaddr)
1da177e4 3485{
ca7ed0f2 3486 struct stlport *portp;
1da177e4
LT		 3487 unsigned int ioack;
3488 unsigned char misr;
3489
a0564e14 3490 pr_debug("stl_cd1400mdmisr(panelp=%p)\n", panelp);
1da177e4
LT		 3491
3492 ioack = inb(ioaddr + EREG_MDACK);
3493 if (((ioack & panelp->ackmask) != 0) ||
3494 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3495 printk("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3496 return;
3497 }
3498 portp = panelp->ports[(ioack >> 3)];
3499
3500 outb((MISR + portp->uartaddr), ioaddr);
3501 misr = inb(ioaddr + EREG_DATA);
3502 if (misr & MISR_DCD) {
ccfea3c9 3503 stl_cd_change(portp);
1da177e4
LT		 3504 portp->stats.modem++;
3505 }
3506
3507 outb((EOSRR + portp->uartaddr), ioaddr);
3508 outb(0, (ioaddr + EREG_DATA));
3509}
3510
3511/*****************************************************************************/
3512/* SC26198 HARDWARE FUNCTIONS */
3513/*****************************************************************************/
3514
3515/*
3516 * These functions get/set/update the registers of the sc26198 UARTs.
3517 * Access to the sc26198 registers is via an address/data io port pair.
3518 * (Maybe should make this inline...)
3519 */
3520
ca7ed0f2 3521static int stl_sc26198getreg(struct stlport *portp, int regnr)
1da177e4
LT		 3522{
3523 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
014c2544 3524 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3525}
3526
ca7ed0f2 3527static void stl_sc26198setreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3528{
3529 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3530 outb(value, (portp->ioaddr + XP_DATA));
3531}
3532
ca7ed0f2 3533static int stl_sc26198updatereg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3534{
3535 outb((regnr | portp->uartaddr), (portp->ioaddr + XP_ADDR));
3536 if (inb(portp->ioaddr + XP_DATA) != value) {
3537 outb(value, (portp->ioaddr + XP_DATA));
014c2544 3538 return 1;
1da177e4 3539 }
014c2544 3540 return 0;
1da177e4
LT		 3541}
3542
3543/*****************************************************************************/
3544
3545/*
3546 * Functions to get and set the sc26198 global registers.
3547 */
3548
ca7ed0f2 3549static int stl_sc26198getglobreg(struct stlport *portp, int regnr)
1da177e4
LT		 3550{
3551 outb(regnr, (portp->ioaddr + XP_ADDR));
014c2544 3552 return inb(portp->ioaddr + XP_DATA);
1da177e4
LT		 3553}
3554
3555#if 0
ca7ed0f2 3556static void stl_sc26198setglobreg(struct stlport *portp, int regnr, int value)
1da177e4
LT		 3557{
3558 outb(regnr, (portp->ioaddr + XP_ADDR));
3559 outb(value, (portp->ioaddr + XP_DATA));
3560}
3561#endif
3562
3563/*****************************************************************************/
3564
3565/*
3566 * Inbitialize the UARTs in a panel. We don't care what sort of board
3567 * these ports are on - since the port io registers are almost
3568 * identical when dealing with ports.
3569 */
3570
ca7ed0f2 3571static int stl_sc26198panelinit(struct stlbrd *brdp, struct stlpanel *panelp)
1da177e4
LT		 3572{
3573 int chipmask, i;
3574 int nrchips, ioaddr;
3575
a0564e14 3576 pr_debug("stl_sc26198panelinit(brdp=%p,panelp=%p)\n", brdp, panelp);
1da177e4
LT		 3577
3578 BRDENABLE(panelp->brdnr, panelp->pagenr);
3579
3580/*
3581 * Check that each chip is present and started up OK.
3582 */
3583 chipmask = 0;
3584 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3585 if (brdp->brdtype == BRD_ECHPCI)
3586 outb(panelp->pagenr, brdp->ioctrl);
3587
c62429d9 3588 for (i = 0; i < nrchips; i++) {
1da177e4
LT		 3589 ioaddr = panelp->iobase + (i * 4);
3590 outb(SCCR, (ioaddr + XP_ADDR));
3591 outb(CR_RESETALL, (ioaddr + XP_DATA));
3592 outb(TSTR, (ioaddr + XP_ADDR));
3593 if (inb(ioaddr + XP_DATA) != 0) {
3594 printk("STALLION: sc26198 not responding, "
3595 "brd=%d panel=%d chip=%d\n",
3596 panelp->brdnr, panelp->panelnr, i);
3597 continue;
3598 }
3599 chipmask |= (0x1 << i);
3600 outb(GCCR, (ioaddr + XP_ADDR));
3601 outb(GCCR_IVRTYPCHANACK, (ioaddr + XP_DATA));
3602 outb(WDTRCR, (ioaddr + XP_ADDR));
3603 outb(0xff, (ioaddr + XP_DATA));
3604 }
3605
3606 BRDDISABLE(panelp->brdnr);
014c2544 3607 return chipmask;
1da177e4
LT		 3608}
3609
3610/*****************************************************************************/
3611
3612/*
3613 * Initialize hardware specific port registers.
3614 */
3615
ca7ed0f2 3616static void stl_sc26198portinit(struct stlbrd *brdp, struct stlpanel *panelp, struct stlport *portp)
1da177e4 3617{
a0564e14
JS		 3618 pr_debug("stl_sc26198portinit(brdp=%p,panelp=%p,portp=%p)\n", brdp,
3619 panelp, portp);
1da177e4 3620
615e4a71
JS		 3621 if ((brdp == NULL) || (panelp == NULL) ||
3622 (portp == NULL))
1da177e4
LT		 3623 return;
3624
3625 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3626 portp->uartaddr = (portp->portnr & 0x07) << 4;
3627 portp->pagenr = panelp->pagenr;
3628 portp->hwid = 0x1;
3629
3630 BRDENABLE(portp->brdnr, portp->pagenr);
3631 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3632 BRDDISABLE(portp->brdnr);
3633}
3634
3635/*****************************************************************************/
3636
3637/*
3638 * Set up the sc26198 registers for a port based on the termios port
3639 * settings.
3640 */
3641
606d099c 3642static void stl_sc26198setport(struct stlport *portp, struct ktermios *tiosp)
1da177e4 3643{
ca7ed0f2 3644 struct stlbrd *brdp;
1da177e4
LT		 3645 unsigned long flags;
3646 unsigned int baudrate;
3647 unsigned char mr0, mr1, mr2, clk;
3648 unsigned char imron, imroff, iopr, ipr;
3649
3650 mr0 = 0;
3651 mr1 = 0;
3652 mr2 = 0;
3653 clk = 0;
3654 iopr = 0;
3655 imron = 0;
3656 imroff = 0;
3657
3658 brdp = stl_brds[portp->brdnr];
615e4a71 3659 if (brdp == NULL)
1da177e4
LT		 3660 return;
3661
3662/*
3663 * Set up the RX char ignore mask with those RX error types we
3664 * can ignore.
3665 */
3666 portp->rxignoremsk = 0;
3667 if (tiosp->c_iflag & IGNPAR)
3668 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3669 SR_RXOVERRUN);
3670 if (tiosp->c_iflag & IGNBRK)
3671 portp->rxignoremsk |= SR_RXBREAK;
3672
3673 portp->rxmarkmsk = SR_RXOVERRUN;
3674 if (tiosp->c_iflag & (INPCK | PARMRK))
3675 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3676 if (tiosp->c_iflag & BRKINT)
3677 portp->rxmarkmsk |= SR_RXBREAK;
3678
3679/*
3680 * Go through the char size, parity and stop bits and set all the
3681 * option register appropriately.
3682 */
3683 switch (tiosp->c_cflag & CSIZE) {
3684 case CS5:
3685 mr1 |= MR1_CS5;
3686 break;
3687 case CS6:
3688 mr1 |= MR1_CS6;
3689 break;
3690 case CS7:
3691 mr1 |= MR1_CS7;
3692 break;
3693 default:
3694 mr1 |= MR1_CS8;
3695 break;
3696 }
3697
3698 if (tiosp->c_cflag & CSTOPB)
3699 mr2 |= MR2_STOP2;
3700 else
3701 mr2 |= MR2_STOP1;
3702
3703 if (tiosp->c_cflag & PARENB) {
3704 if (tiosp->c_cflag & PARODD)
3705 mr1 |= (MR1_PARENB | MR1_PARODD);
3706 else
3707 mr1 |= (MR1_PARENB | MR1_PAREVEN);
c62429d9 3708 } else
1da177e4 3709 mr1 |= MR1_PARNONE;
1da177e4
LT		 3710
3711 mr1 |= MR1_ERRBLOCK;
3712
3713/*
3714 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3715 * space for hardware flow control and the like. This should be set to
3716 * VMIN.
3717 */
3718 mr2 |= MR2_RXFIFOHALF;
3719
3720/*
3721 * Calculate the baud rate timers. For now we will just assume that
3722 * the input and output baud are the same. The sc26198 has a fixed
3723 * baud rate table, so only discrete baud rates possible.
3724 */
3725 baudrate = tiosp->c_cflag & CBAUD;
3726 if (baudrate & CBAUDEX) {
3727 baudrate &= ~CBAUDEX;
3728 if ((baudrate < 1) || (baudrate > 4))
3729 tiosp->c_cflag &= ~CBAUDEX;
3730 else
3731 baudrate += 15;
3732 }
3733 baudrate = stl_baudrates[baudrate];
3734 if ((tiosp->c_cflag & CBAUD) == B38400) {
f8ae4764 3735 if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
1da177e4 3736 baudrate = 57600;
f8ae4764 3737 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
1da177e4 3738 baudrate = 115200;
f8ae4764 3739 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_SHI)
1da177e4 3740 baudrate = 230400;
f8ae4764 3741 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_WARP)
1da177e4 3742 baudrate = 460800;
f8ae4764 3743 else if ((portp->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST)
1da177e4
LT		 3744 baudrate = (portp->baud_base / portp->custom_divisor);
3745 }
3746 if (baudrate > STL_SC26198MAXBAUD)
3747 baudrate = STL_SC26198MAXBAUD;
3748
c62429d9
JS		 3749 if (baudrate > 0)
3750 for (clk = 0; clk < SC26198_NRBAUDS; clk++)
1da177e4
LT		 3751 if (baudrate <= sc26198_baudtable[clk])
3752 break;
1da177e4
LT		 3753
3754/*
3755 * Check what form of modem signaling is required and set it up.
3756 */
3757 if (tiosp->c_cflag & CLOCAL) {
f8ae4764 3758 portp->port.flags &= ~ASYNC_CHECK_CD;
1da177e4
LT		 3759 } else {
3760 iopr |= IOPR_DCDCOS;
3761 imron |= IR_IOPORT;
f8ae4764 3762 portp->port.flags |= ASYNC_CHECK_CD;
1da177e4
LT		 3763 }
3764
3765/*
3766 * Setup sc26198 enhanced modes if we can. In particular we want to
3767 * handle as much of the flow control as possible automatically. As
3768 * well as saving a few CPU cycles it will also greatly improve flow
3769 * control reliability.
3770 */
3771 if (tiosp->c_iflag & IXON) {
3772 mr0 |= MR0_SWFTX | MR0_SWFT;
3773 imron |= IR_XONXOFF;
c62429d9 3774 } else
1da177e4 3775 imroff |= IR_XONXOFF;
c62429d9 3776
1da177e4
LT		 3777 if (tiosp->c_iflag & IXOFF)
3778 mr0 |= MR0_SWFRX;
3779
3780 if (tiosp->c_cflag & CRTSCTS) {
3781 mr2 |= MR2_AUTOCTS;
3782 mr1 |= MR1_AUTORTS;
3783 }
3784
3785/*
3786 * All sc26198 register values calculated so go through and set
3787 * them all up.
3788 */
3789
a0564e14 3790 pr_debug("SETPORT: portnr=%d panelnr=%d brdnr=%d\n",
1da177e4 3791 portp->portnr, portp->panelnr, portp->brdnr);
a0564e14
JS		 3792 pr_debug(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
3793 pr_debug(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
3794 pr_debug(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
1da177e4
LT		 3795 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
3796 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
1da177e4 3797
b65b5b59 3798 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3799 BRDENABLE(portp->brdnr, portp->pagenr);
3800 stl_sc26198setreg(portp, IMR, 0);
3801 stl_sc26198updatereg(portp, MR0, mr0);
3802 stl_sc26198updatereg(portp, MR1, mr1);
3803 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
3804 stl_sc26198updatereg(portp, MR2, mr2);
3805 stl_sc26198updatereg(portp, IOPIOR,
3806 ((stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr));
3807
3808 if (baudrate > 0) {
3809 stl_sc26198setreg(portp, TXCSR, clk);
3810 stl_sc26198setreg(portp, RXCSR, clk);
3811 }
3812
3813 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
3814 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
3815
3816 ipr = stl_sc26198getreg(portp, IPR);
3817 if (ipr & IPR_DCD)
3818 portp->sigs &= ~TIOCM_CD;
3819 else
3820 portp->sigs |= TIOCM_CD;
3821
3822 portp->imr = (portp->imr & ~imroff) | imron;
3823 stl_sc26198setreg(portp, IMR, portp->imr);
3824 BRDDISABLE(portp->brdnr);
b65b5b59 3825 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3826}
3827
3828/*****************************************************************************/
3829
3830/*
3831 * Set the state of the DTR and RTS signals.
3832 */
3833
ca7ed0f2 3834static void stl_sc26198setsignals(struct stlport *portp, int dtr, int rts)
1da177e4
LT		 3835{
3836 unsigned char iopioron, iopioroff;
3837 unsigned long flags;
3838
a0564e14
JS		 3839 pr_debug("stl_sc26198setsignals(portp=%p,dtr=%d,rts=%d)\n", portp,
3840 dtr, rts);
1da177e4
LT		 3841
3842 iopioron = 0;
3843 iopioroff = 0;
3844 if (dtr == 0)
3845 iopioroff |= IPR_DTR;
3846 else if (dtr > 0)
3847 iopioron |= IPR_DTR;
3848 if (rts == 0)
3849 iopioroff |= IPR_RTS;
3850 else if (rts > 0)
3851 iopioron |= IPR_RTS;
3852
b65b5b59 3853 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3854 BRDENABLE(portp->brdnr, portp->pagenr);
3855 stl_sc26198setreg(portp, IOPIOR,
3856 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
3857 BRDDISABLE(portp->brdnr);
b65b5b59 3858 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3859}
3860
3861/*****************************************************************************/
3862
3863/*
3864 * Return the state of the signals.
3865 */
3866
ca7ed0f2 3867static int stl_sc26198getsignals(struct stlport *portp)
1da177e4
LT		 3868{
3869 unsigned char ipr;
3870 unsigned long flags;
3871 int sigs;
3872
a0564e14 3873 pr_debug("stl_sc26198getsignals(portp=%p)\n", portp);
1da177e4 3874
b65b5b59 3875 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3876 BRDENABLE(portp->brdnr, portp->pagenr);
3877 ipr = stl_sc26198getreg(portp, IPR);
3878 BRDDISABLE(portp->brdnr);
b65b5b59 3879 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3880
3881 sigs = 0;
3882 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
3883 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
3884 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
3885 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
3886 sigs |= TIOCM_DSR;
014c2544 3887 return sigs;
1da177e4
LT		 3888}
3889
3890/*****************************************************************************/
3891
3892/*
3893 * Enable/Disable the Transmitter and/or Receiver.
3894 */
3895
ca7ed0f2 3896static void stl_sc26198enablerxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3897{
3898 unsigned char ccr;
3899 unsigned long flags;
3900
a0564e14 3901 pr_debug("stl_sc26198enablerxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx,tx);
1da177e4
LT		 3902
3903 ccr = portp->crenable;
3904 if (tx == 0)
3905 ccr &= ~CR_TXENABLE;
3906 else if (tx > 0)
3907 ccr |= CR_TXENABLE;
3908 if (rx == 0)
3909 ccr &= ~CR_RXENABLE;
3910 else if (rx > 0)
3911 ccr |= CR_RXENABLE;
3912
b65b5b59 3913 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3914 BRDENABLE(portp->brdnr, portp->pagenr);
3915 stl_sc26198setreg(portp, SCCR, ccr);
3916 BRDDISABLE(portp->brdnr);
3917 portp->crenable = ccr;
b65b5b59 3918 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3919}
3920
3921/*****************************************************************************/
3922
3923/*
3924 * Start/stop the Transmitter and/or Receiver.
3925 */
3926
ca7ed0f2 3927static void stl_sc26198startrxtx(struct stlport *portp, int rx, int tx)
1da177e4
LT		 3928{
3929 unsigned char imr;
3930 unsigned long flags;
3931
a0564e14 3932 pr_debug("stl_sc26198startrxtx(portp=%p,rx=%d,tx=%d)\n", portp, rx, tx);
1da177e4
LT		 3933
3934 imr = portp->imr;
3935 if (tx == 0)
3936 imr &= ~IR_TXRDY;
3937 else if (tx == 1)
3938 imr |= IR_TXRDY;
3939 if (rx == 0)
3940 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
3941 else if (rx > 0)
3942 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
3943
b65b5b59 3944 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3945 BRDENABLE(portp->brdnr, portp->pagenr);
3946 stl_sc26198setreg(portp, IMR, imr);
3947 BRDDISABLE(portp->brdnr);
3948 portp->imr = imr;
3949 if (tx > 0)
3950 set_bit(ASYI_TXBUSY, &portp->istate);
b65b5b59 3951 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3952}
3953
3954/*****************************************************************************/
3955
3956/*
3957 * Disable all interrupts from this port.
3958 */
3959
ca7ed0f2 3960static void stl_sc26198disableintrs(struct stlport *portp)
1da177e4
LT		 3961{
3962 unsigned long flags;
3963
a0564e14 3964 pr_debug("stl_sc26198disableintrs(portp=%p)\n", portp);
1da177e4 3965
b65b5b59 3966 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3967 BRDENABLE(portp->brdnr, portp->pagenr);
3968 portp->imr = 0;
3969 stl_sc26198setreg(portp, IMR, 0);
3970 BRDDISABLE(portp->brdnr);
b65b5b59 3971 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3972}
3973
3974/*****************************************************************************/
3975
ca7ed0f2 3976static void stl_sc26198sendbreak(struct stlport *portp, int len)
1da177e4
LT		 3977{
3978 unsigned long flags;
3979
a0564e14 3980 pr_debug("stl_sc26198sendbreak(portp=%p,len=%d)\n", portp, len);
1da177e4 3981
b65b5b59 3982 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 3983 BRDENABLE(portp->brdnr, portp->pagenr);
3984 if (len == 1) {
3985 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
3986 portp->stats.txbreaks++;
c62429d9 3987 } else
1da177e4 3988 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
c62429d9 3989
1da177e4 3990 BRDDISABLE(portp->brdnr);
b65b5b59 3991 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 3992}
3993
3994/*****************************************************************************/
3995
3996/*
3997 * Take flow control actions...
3998 */
3999
ca7ed0f2 4000static void stl_sc26198flowctrl(struct stlport *portp, int state)
1da177e4
LT		 4001{
4002 struct tty_struct *tty;
4003 unsigned long flags;
4004 unsigned char mr0;
4005
a0564e14 4006 pr_debug("stl_sc26198flowctrl(portp=%p,state=%x)\n", portp, state);
1da177e4 4007
615e4a71 4008 if (portp == NULL)
1da177e4 4009 return;
d18a750f 4010 tty = tty_port_tty_get(&portp->port);
615e4a71 4011 if (tty == NULL)
1da177e4
LT		 4012 return;
4013
b65b5b59 4014 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4015 BRDENABLE(portp->brdnr, portp->pagenr);
4016
4017 if (state) {
4018 if (tty->termios->c_iflag & IXOFF) {
4019 mr0 = stl_sc26198getreg(portp, MR0);
4020 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4021 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4022 mr0 |= MR0_SWFRX;
4023 portp->stats.rxxon++;
4024 stl_sc26198wait(portp);
4025 stl_sc26198setreg(portp, MR0, mr0);
4026 }
4027/*
4028 * Question: should we return RTS to what it was before? It may
4029 * have been set by an ioctl... Suppose not, since if you have
4030 * hardware flow control set then it is pretty silly to go and
4031 * set the RTS line by hand.
4032 */
4033 if (tty->termios->c_cflag & CRTSCTS) {
4034 stl_sc26198setreg(portp, MR1,
4035 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4036 stl_sc26198setreg(portp, IOPIOR,
4037 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4038 portp->stats.rxrtson++;
4039 }
4040 } else {
4041 if (tty->termios->c_iflag & IXOFF) {
4042 mr0 = stl_sc26198getreg(portp, MR0);
4043 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4044 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4045 mr0 &= ~MR0_SWFRX;
4046 portp->stats.rxxoff++;
4047 stl_sc26198wait(portp);
4048 stl_sc26198setreg(portp, MR0, mr0);
4049 }
4050 if (tty->termios->c_cflag & CRTSCTS) {
4051 stl_sc26198setreg(portp, MR1,
4052 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4053 stl_sc26198setreg(portp, IOPIOR,
4054 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4055 portp->stats.rxrtsoff++;
4056 }
4057 }
4058
4059 BRDDISABLE(portp->brdnr);
b65b5b59 4060 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4061 tty_kref_put(tty);
1da177e4
LT		 4062}
4063
4064/*****************************************************************************/
4065
4066/*
4067 * Send a flow control character.
4068 */
4069
ca7ed0f2 4070static void stl_sc26198sendflow(struct stlport *portp, int state)
1da177e4
LT		 4071{
4072 struct tty_struct *tty;
4073 unsigned long flags;
4074 unsigned char mr0;
4075
a0564e14 4076 pr_debug("stl_sc26198sendflow(portp=%p,state=%x)\n", portp, state);
1da177e4 4077
615e4a71 4078 if (portp == NULL)
1da177e4 4079 return;
d18a750f 4080 tty = tty_port_tty_get(&portp->port);
615e4a71 4081 if (tty == NULL)
1da177e4
LT		 4082 return;
4083
b65b5b59 4084 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4085 BRDENABLE(portp->brdnr, portp->pagenr);
4086 if (state) {
4087 mr0 = stl_sc26198getreg(portp, MR0);
4088 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4089 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4090 mr0 |= MR0_SWFRX;
4091 portp->stats.rxxon++;
4092 stl_sc26198wait(portp);
4093 stl_sc26198setreg(portp, MR0, mr0);
4094 } else {
4095 mr0 = stl_sc26198getreg(portp, MR0);
4096 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4097 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4098 mr0 &= ~MR0_SWFRX;
4099 portp->stats.rxxoff++;
4100 stl_sc26198wait(portp);
4101 stl_sc26198setreg(portp, MR0, mr0);
4102 }
4103 BRDDISABLE(portp->brdnr);
b65b5b59 4104 spin_unlock_irqrestore(&brd_lock, flags);
d18a750f 4105 tty_kref_put(tty);
1da177e4
LT		 4106}
4107
4108/*****************************************************************************/
4109
ca7ed0f2 4110static void stl_sc26198flush(struct stlport *portp)
1da177e4
LT		 4111{
4112 unsigned long flags;
4113
a0564e14 4114 pr_debug("stl_sc26198flush(portp=%p)\n", portp);
1da177e4 4115
615e4a71 4116 if (portp == NULL)
1da177e4
LT		 4117 return;
4118
b65b5b59 4119 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4120 BRDENABLE(portp->brdnr, portp->pagenr);
4121 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4122 stl_sc26198setreg(portp, SCCR, portp->crenable);
4123 BRDDISABLE(portp->brdnr);
4124 portp->tx.tail = portp->tx.head;
b65b5b59 4125 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4
LT		 4126}
4127
4128/*****************************************************************************/
4129
4130/*
4131 * Return the current state of data flow on this port. This is only
6f0b31c3 4132 * really interesting when determining if data has fully completed
1da177e4
LT		 4133 * transmission or not... The sc26198 interrupt scheme cannot
4134 * determine when all data has actually drained, so we need to
4135 * check the port statusy register to be sure.
4136 */
4137
ca7ed0f2 4138static int stl_sc26198datastate(struct stlport *portp)
1da177e4
LT		 4139{
4140 unsigned long flags;
4141 unsigned char sr;
4142
a0564e14 4143 pr_debug("stl_sc26198datastate(portp=%p)\n", portp);
1da177e4 4144
615e4a71 4145 if (portp == NULL)
014c2544 4146 return 0;
1da177e4 4147 if (test_bit(ASYI_TXBUSY, &portp->istate))
014c2544 4148 return 1;
1da177e4 4149
b65b5b59 4150 spin_lock_irqsave(&brd_lock, flags);
1da177e4
LT		 4151 BRDENABLE(portp->brdnr, portp->pagenr);
4152 sr = stl_sc26198getreg(portp, SR);
4153 BRDDISABLE(portp->brdnr);
b65b5b59 4154 spin_unlock_irqrestore(&brd_lock, flags);
1da177e4 4155
014c2544 4156 return (sr & SR_TXEMPTY) ? 0 : 1;
1da177e4
LT		 4157}
4158
4159/*****************************************************************************/
4160
4161/*
4162 * Delay for a small amount of time, to give the sc26198 a chance
4163 * to process a command...
4164 */
4165
ca7ed0f2 4166static void stl_sc26198wait(struct stlport *portp)
1da177e4
LT		 4167{
4168 int i;
4169
a0564e14 4170 pr_debug("stl_sc26198wait(portp=%p)\n", portp);
1da177e4 4171
615e4a71 4172 if (portp == NULL)
1da177e4
LT		 4173 return;
4174
c62429d9 4175 for (i = 0; i < 20; i++)
1da177e4
LT		 4176 stl_sc26198getglobreg(portp, TSTR);
4177}
4178
4179/*****************************************************************************/
4180
4181/*
4182 * If we are TX flow controlled and in IXANY mode then we may
4183 * need to unflow control here. We gotta do this because of the
4184 * automatic flow control modes of the sc26198.
4185 */
4186
60be4810 4187static void stl_sc26198txunflow(struct stlport *portp, struct tty_struct *tty)
1da177e4
LT		 4188{
4189 unsigned char mr0;
4190
4191 mr0 = stl_sc26198getreg(portp, MR0);
4192 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4193 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4194 stl_sc26198wait(portp);
4195 stl_sc26198setreg(portp, MR0, mr0);
4196 clear_bit(ASYI_TXFLOWED, &portp->istate);
4197}
4198
4199/*****************************************************************************/
4200
4201/*
4202 * Interrupt service routine for sc26198 panels.
4203 */
4204
ca7ed0f2 4205static void stl_sc26198intr(struct stlpanel *panelp, unsigned int iobase)
1da177e4 4206{
ca7ed0f2 4207 struct stlport *portp;
1da177e4
LT		 4208 unsigned int iack;
4209
b65b5b59
AC		 4210 spin_lock(&brd_lock);
4211
1da177e4
LT		 4212/*
4213 * Work around bug in sc26198 chip... Cannot have A6 address
4214 * line of UART high, else iack will be returned as 0.
4215 */
4216 outb(0, (iobase + 1));
4217
4218 iack = inb(iobase + XP_IACK);
4219 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4220
4221 if (iack & IVR_RXDATA)
4222 stl_sc26198rxisr(portp, iack);
4223 else if (iack & IVR_TXDATA)
4224 stl_sc26198txisr(portp);
4225 else
4226 stl_sc26198otherisr(portp, iack);
b65b5b59
AC		 4227
4228 spin_unlock(&brd_lock);
1da177e4
LT		 4229}
4230
4231/*****************************************************************************/
4232
4233/*
4234 * Transmit interrupt handler. This has gotta be fast! Handling TX
4235 * chars is pretty simple, stuff as many as possible from the TX buffer
4236 * into the sc26198 FIFO.
4237 * In practice it is possible that interrupts are enabled but that the
4238 * port has been hung up. Need to handle not having any TX buffer here,
4239 * this is done by using the side effect that head and tail will also
4240 * be NULL if the buffer has been freed.
4241 */
4242
ca7ed0f2 4243static void stl_sc26198txisr(struct stlport *portp)
1da177e4 4244{
d18a750f 4245 struct tty_struct *tty;
1da177e4
LT		 4246 unsigned int ioaddr;
4247 unsigned char mr0;
4248 int len, stlen;
4249 char *head, *tail;
4250
a0564e14 4251 pr_debug("stl_sc26198txisr(portp=%p)\n", portp);
1da177e4
LT		 4252
4253 ioaddr = portp->ioaddr;
4254 head = portp->tx.head;
4255 tail = portp->tx.tail;
4256 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4257 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4258 (test_bit(ASYI_TXLOW, &portp->istate) == 0))) {
4259 set_bit(ASYI_TXLOW, &portp->istate);
d18a750f
AC		 4260 tty = tty_port_tty_get(&portp->port);
4261 if (tty) {
4262 tty_wakeup(tty);
4263 tty_kref_put(tty);
4264 }
1da177e4
LT		 4265 }
4266
4267 if (len == 0) {
4268 outb((MR0 | portp->uartaddr), (ioaddr + XP_ADDR));
4269 mr0 = inb(ioaddr + XP_DATA);
4270 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4271 portp->imr &= ~IR_TXRDY;
4272 outb((IMR | portp->uartaddr), (ioaddr + XP_ADDR));
4273 outb(portp->imr, (ioaddr + XP_DATA));
4274 clear_bit(ASYI_TXBUSY, &portp->istate);
4275 } else {
4276 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4277 outb(mr0, (ioaddr + XP_DATA));
4278 }
4279 } else {
843b568c 4280 len = min(len, SC26198_TXFIFOSIZE);
1da177e4 4281 portp->stats.txtotal += len;
319fe7c3
JS		 4282 stlen = min_t(unsigned int, len,
4283 (portp->tx.buf + STL_TXBUFSIZE) - tail);
1da177e4
LT		 4284 outb(GTXFIFO, (ioaddr + XP_ADDR));
4285 outsb((ioaddr + XP_DATA), tail, stlen);
4286 len -= stlen;
4287 tail += stlen;
4288 if (tail >= (portp->tx.buf + STL_TXBUFSIZE))
4289 tail = portp->tx.buf;
4290 if (len > 0) {
4291 outsb((ioaddr + XP_DATA), tail, len);
4292 tail += len;
4293 }
4294 portp->tx.tail = tail;
4295 }
4296}
4297
4298/*****************************************************************************/
4299
4300/*
4301 * Receive character interrupt handler. Determine if we have good chars
4302 * or bad chars and then process appropriately. Good chars are easy
4303 * just shove the lot into the RX buffer and set all status byte to 0.
4304 * If a bad RX char then process as required. This routine needs to be
4305 * fast! In practice it is possible that we get an interrupt on a port
4306 * that is closed. This can happen on hangups - since they completely
4307 * shutdown a port not in user context. Need to handle this case.
4308 */
4309
ca7ed0f2 4310static void stl_sc26198rxisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4311{
4312 struct tty_struct *tty;
4313 unsigned int len, buflen, ioaddr;
4314
a0564e14 4315 pr_debug("stl_sc26198rxisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4 4316
d18a750f 4317 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4318 ioaddr = portp->ioaddr;
4319 outb(GIBCR, (ioaddr + XP_ADDR));
4320 len = inb(ioaddr + XP_DATA) + 1;
4321
4322 if ((iack & IVR_TYPEMASK) == IVR_RXDATA) {
33f0f88f 4323 if (tty == NULL || (buflen = tty_buffer_request_room(tty, len)) == 0) {
319fe7c3 4324 len = min_t(unsigned int, len, sizeof(stl_unwanted));
1da177e4
LT		 4325 outb(GRXFIFO, (ioaddr + XP_ADDR));
4326 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4327 portp->stats.rxlost += len;
4328 portp->stats.rxtotal += len;
4329 } else {
843b568c 4330 len = min(len, buflen);
1da177e4 4331 if (len > 0) {
33f0f88f 4332 unsigned char *ptr;
1da177e4 4333 outb(GRXFIFO, (ioaddr + XP_ADDR));
33f0f88f
AC		 4334 tty_prepare_flip_string(tty, &ptr, len);
4335 insb((ioaddr + XP_DATA), ptr, len);
1da177e4
LT		 4336 tty_schedule_flip(tty);
4337 portp->stats.rxtotal += len;
4338 }
4339 }
4340 } else {
4341 stl_sc26198rxbadchars(portp);
4342 }
4343
4344/*
4345 * If we are TX flow controlled and in IXANY mode then we may need
4346 * to unflow control here. We gotta do this because of the automatic
4347 * flow control modes of the sc26198.
4348 */
4349 if (test_bit(ASYI_TXFLOWED, &portp->istate)) {
615e4a71
JS		 4350 if ((tty != NULL) &&
4351 (tty->termios != NULL) &&
1da177e4
LT		 4352 (tty->termios->c_iflag & IXANY)) {
4353 stl_sc26198txunflow(portp, tty);
4354 }
4355 }
d18a750f 4356 tty_kref_put(tty);
1da177e4
LT		 4357}
4358
4359/*****************************************************************************/
4360
4361/*
4362 * Process an RX bad character.
4363 */
4364
60be4810 4365static void stl_sc26198rxbadch(struct stlport *portp, unsigned char status, char ch)
1da177e4
LT		 4366{
4367 struct tty_struct *tty;
4368 unsigned int ioaddr;
4369
d18a750f 4370 tty = tty_port_tty_get(&portp->port);
1da177e4
LT		 4371 ioaddr = portp->ioaddr;
4372
4373 if (status & SR_RXPARITY)
4374 portp->stats.rxparity++;
4375 if (status & SR_RXFRAMING)
4376 portp->stats.rxframing++;
4377 if (status & SR_RXOVERRUN)
4378 portp->stats.rxoverrun++;
4379 if (status & SR_RXBREAK)
4380 portp->stats.rxbreaks++;
4381
615e4a71 4382 if ((tty != NULL) &&
1da177e4
LT		 4383 ((portp->rxignoremsk & status) == 0)) {
4384 if (portp->rxmarkmsk & status) {
4385 if (status & SR_RXBREAK) {
4386 status = TTY_BREAK;
f8ae4764 4387 if (portp->port.flags & ASYNC_SAK) {
1da177e4
LT		 4388 do_SAK(tty);
4389 BRDENABLE(portp->brdnr, portp->pagenr);
4390 }
c62429d9 4391 } else if (status & SR_RXPARITY)
1da177e4 4392 status = TTY_PARITY;
c62429d9 4393 else if (status & SR_RXFRAMING)
1da177e4 4394 status = TTY_FRAME;
c62429d9 4395 else if(status & SR_RXOVERRUN)
1da177e4 4396 status = TTY_OVERRUN;
c62429d9 4397 else
1da177e4 4398 status = 0;
c62429d9 4399 } else
1da177e4 4400 status = 0;
1da177e4 4401
33f0f88f
AC		 4402 tty_insert_flip_char(tty, ch, status);
4403 tty_schedule_flip(tty);
1da177e4
LT		 4404
4405 if (status == 0)
4406 portp->stats.rxtotal++;
4407 }
d18a750f 4408 tty_kref_put(tty);
1da177e4
LT		 4409}
4410
4411/*****************************************************************************/
4412
4413/*
4414 * Process all characters in the RX FIFO of the UART. Check all char
4415 * status bytes as well, and process as required. We need to check
4416 * all bytes in the FIFO, in case some more enter the FIFO while we
4417 * are here. To get the exact character error type we need to switch
4418 * into CHAR error mode (that is why we need to make sure we empty
4419 * the FIFO).
4420 */
4421
ca7ed0f2 4422static void stl_sc26198rxbadchars(struct stlport *portp)
1da177e4
LT		 4423{
4424 unsigned char status, mr1;
4425 char ch;
4426
4427/*
4428 * To get the precise error type for each character we must switch
4429 * back into CHAR error mode.
4430 */
4431 mr1 = stl_sc26198getreg(portp, MR1);
4432 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4433
4434 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4435 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4436 ch = stl_sc26198getreg(portp, RXFIFO);
4437 stl_sc26198rxbadch(portp, status, ch);
4438 }
4439
4440/*
4441 * To get correct interrupt class we must switch back into BLOCK
4442 * error mode.
4443 */
4444 stl_sc26198setreg(portp, MR1, mr1);
4445}
4446
4447/*****************************************************************************/
4448
4449/*
4450 * Other interrupt handler. This includes modem signals, flow
4451 * control actions, etc. Most stuff is left to off-level interrupt
4452 * processing time.
4453 */
4454
ca7ed0f2 4455static void stl_sc26198otherisr(struct stlport *portp, unsigned int iack)
1da177e4
LT		 4456{
4457 unsigned char cir, ipr, xisr;
4458
a0564e14 4459 pr_debug("stl_sc26198otherisr(portp=%p,iack=%x)\n", portp, iack);
1da177e4
LT		 4460
4461 cir = stl_sc26198getglobreg(portp, CIR);
4462
4463 switch (cir & CIR_SUBTYPEMASK) {
4464 case CIR_SUBCOS:
4465 ipr = stl_sc26198getreg(portp, IPR);
4466 if (ipr & IPR_DCDCHANGE) {
ccfea3c9 4467 stl_cd_change(portp);
1da177e4
LT		 4468 portp->stats.modem++;
4469 }
4470 break;
4471 case CIR_SUBXONXOFF:
4472 xisr = stl_sc26198getreg(portp, XISR);
4473 if (xisr & XISR_RXXONGOT) {
4474 set_bit(ASYI_TXFLOWED, &portp->istate);
4475 portp->stats.txxoff++;
4476 }
4477 if (xisr & XISR_RXXOFFGOT) {
4478 clear_bit(ASYI_TXFLOWED, &portp->istate);
4479 portp->stats.txxon++;
4480 }
4481 break;
4482 case CIR_SUBBREAK:
4483 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4484 stl_sc26198rxbadchars(portp);
4485 break;
4486 default:
4487 break;
4488 }
4489}
4490
fc06b5cf
JS		 4491static void stl_free_isabrds(void)
4492{
4493 struct stlbrd *brdp;
4494 unsigned int i;
4495
4496 for (i = 0; i < stl_nrbrds; i++) {
4497 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4498 continue;
4499
4500 free_irq(brdp->irq, brdp);
4501
4502 stl_cleanup_panels(brdp);
4503
4504 release_region(brdp->ioaddr1, brdp->iosize1);
4505 if (brdp->iosize2 > 0)
4506 release_region(brdp->ioaddr2, brdp->iosize2);
4507
4508 kfree(brdp);
4509 stl_brds[i] = NULL;
4510 }
4511}
4512
23b85a15
JS		 4513/*
4514 * Loadable module initialization stuff.
4515 */
4516static int __init stallion_module_init(void)
4517{
843b568c
JS		 4518 struct stlbrd *brdp;
4519 struct stlconf conf;
aeaccfe4 4520 unsigned int i, j;
fc06b5cf 4521 int retval;
23b85a15
JS		 4522
4523 printk(KERN_INFO "%s: version %s\n", stl_drvtitle, stl_drvversion);
4524
4525 spin_lock_init(&stallion_lock);
4526 spin_lock_init(&brd_lock);
4527
e415109f
JS		 4528 stl_serial = alloc_tty_driver(STL_MAXBRDS * STL_MAXPORTS);
4529 if (!stl_serial) {
4530 retval = -ENOMEM;
4531 goto err;
4532 }
4533
4534 stl_serial->owner = THIS_MODULE;
4535 stl_serial->driver_name = stl_drvname;
4536 stl_serial->name = "ttyE";
4537 stl_serial->major = STL_SERIALMAJOR;
4538 stl_serial->minor_start = 0;
4539 stl_serial->type = TTY_DRIVER_TYPE_SERIAL;
4540 stl_serial->subtype = SERIAL_TYPE_NORMAL;
4541 stl_serial->init_termios = stl_deftermios;
4542 stl_serial->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
4543 tty_set_operations(stl_serial, &stl_ops);
4544
4545 retval = tty_register_driver(stl_serial);
4546 if (retval) {
4547 printk("STALLION: failed to register serial driver\n");
4548 goto err_frtty;
4549 }
4550
843b568c
JS		 4551/*
4552 * Find any dynamically supported boards. That is via module load
4553 * line options.
4554 */
4555 for (i = stl_nrbrds; i < stl_nargs; i++) {
4556 memset(&conf, 0, sizeof(conf));
4557 if (stl_parsebrd(&conf, stl_brdsp[i]) == 0)
4558 continue;
4559 if ((brdp = stl_allocbrd()) == NULL)
4560 continue;
4561 brdp->brdnr = i;
4562 brdp->brdtype = conf.brdtype;
4563 brdp->ioaddr1 = conf.ioaddr1;
4564 brdp->ioaddr2 = conf.ioaddr2;
4565 brdp->irq = conf.irq;
4566 brdp->irqtype = conf.irqtype;
b08b5ad9
IK		 4567 stl_brds[brdp->brdnr] = brdp;
4568 if (stl_brdinit(brdp)) {
4569 stl_brds[brdp->brdnr] = NULL;
843b568c 4570 kfree(brdp);
b08b5ad9 4571 } else {
aeaccfe4
JS		 4572 for (j = 0; j < brdp->nrports; j++)
4573 tty_register_device(stl_serial,
4574 brdp->brdnr * STL_MAXPORTS + j, NULL);
843b568c 4575 stl_nrbrds = i + 1;
79cfe7ab 4576 }
843b568c 4577 }
23b85a15 4578
79cfe7ab 4579 /* this has to be _after_ isa finding because of locking */
b1b84fe0 4580 retval = pci_register_driver(&stl_pcidriver);
e415109f
JS		 4581 if (retval && stl_nrbrds == 0) {
4582 printk(KERN_ERR "STALLION: can't register pci driver\n");
4583 goto err_unrtty;
fc06b5cf 4584 }
23b85a15
JS		 4585
4586/*
4587 * Set up a character driver for per board stuff. This is mainly used
4588 * to do stats ioctls on the ports.
4589 */
4590 if (register_chrdev(STL_SIOMEMMAJOR, "staliomem", &stl_fsiomem))
4591 printk("STALLION: failed to register serial board device\n");
4592
4593 stallion_class = class_create(THIS_MODULE, "staliomem");
e415109f
JS		 4594 if (IS_ERR(stallion_class))
4595 printk("STALLION: failed to create class\n");
23b85a15 4596 for (i = 0; i < 4; i++)
03457cd4
GKH		 4597 device_create(stallion_class, NULL, MKDEV(STL_SIOMEMMAJOR, i),
4598 NULL, "staliomem%d", i);
23b85a15 4599
23b85a15 4600 return 0;
e415109f
JS		 4601err_unrtty:
4602 tty_unregister_driver(stl_serial);
4603err_frtty:
fc06b5cf 4604 put_tty_driver(stl_serial);
b1b84fe0
JS		 4605err:
4606 return retval;
23b85a15
JS		 4607}
4608
4609static void __exit stallion_module_exit(void)
4610{
aeaccfe4
JS		 4611 struct stlbrd *brdp;
4612 unsigned int i, j;
23b85a15
JS		 4613
4614 pr_debug("cleanup_module()\n");
4615
4616 printk(KERN_INFO "Unloading %s: version %s\n", stl_drvtitle,
4617 stl_drvversion);
4618
4619/*
4620 * Free up all allocated resources used by the ports. This includes
4621 * memory and interrupts. As part of this process we will also do
4622 * a hangup on every open port - to try to flush out any processes
4623 * hanging onto ports.
4624 */
aeaccfe4
JS		 4625 for (i = 0; i < stl_nrbrds; i++) {
4626 if ((brdp = stl_brds[i]) == NULL || (brdp->state & STL_PROBED))
4627 continue;
4628 for (j = 0; j < brdp->nrports; j++)
4629 tty_unregister_device(stl_serial,
4630 brdp->brdnr * STL_MAXPORTS + j);
4631 }
fc06b5cf 4632
23b85a15 4633 for (i = 0; i < 4; i++)
07c015e7 4634 device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
68fc4fab 4635 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
23b85a15
JS		 4636 class_destroy(stallion_class);
4637
b1b84fe0
JS		 4638 pci_unregister_driver(&stl_pcidriver);
4639
fc06b5cf 4640 stl_free_isabrds();
e415109f
JS		 4641
4642 tty_unregister_driver(stl_serial);
4643 put_tty_driver(stl_serial);
23b85a15
JS		 4644}
4645
4646module_init(stallion_module_init);
4647module_exit(stallion_module_exit);
4648
4649MODULE_AUTHOR("Greg Ungerer");
4650MODULE_DESCRIPTION("Stallion Multiport Serial Driver");
4651MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)