drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / char / hw_random / exynos-rng.c
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1/*
2 * exynos-rng.c - Random Number Generator driver for the exynos
3 *
4 * Copyright (C) 2012 Samsung Electronics
5 * Jonghwa Lee <jonghwa3.lee@smasung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation;
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#include <linux/hw_random.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/io.h>
27#include <linux/platform_device.h>
28#include <linux/clk.h>
29#include <linux/pm_runtime.h>
30#include <linux/err.h>
31
32#define EXYNOS_PRNG_STATUS_OFFSET 0x10
33#define EXYNOS_PRNG_SEED_OFFSET 0x140
34#define EXYNOS_PRNG_OUT1_OFFSET 0x160
35#define SEED_SETTING_DONE BIT(1)
36#define PRNG_START 0x18
37#define PRNG_DONE BIT(5)
38#define EXYNOS_AUTOSUSPEND_DELAY 100
39
40struct exynos_rng {
41 struct device *dev;
42 struct hwrng rng;
43 void __iomem *mem;
44 struct clk *clk;
45};
46
47static u32 exynos_rng_readl(struct exynos_rng *rng, u32 offset)
48{
49 return __raw_readl(rng->mem + offset);
50}
51
52static void exynos_rng_writel(struct exynos_rng *rng, u32 val, u32 offset)
53{
54 __raw_writel(val, rng->mem + offset);
55}
56
57static int exynos_init(struct hwrng *rng)
58{
59 struct exynos_rng *exynos_rng = container_of(rng,
60 struct exynos_rng, rng);
61 int i;
62 int ret = 0;
63
64 pm_runtime_get_sync(exynos_rng->dev);
65
66 for (i = 0 ; i < 5 ; i++)
67 exynos_rng_writel(exynos_rng, jiffies,
68 EXYNOS_PRNG_SEED_OFFSET + 4*i);
69
70 if (!(exynos_rng_readl(exynos_rng, EXYNOS_PRNG_STATUS_OFFSET)
71 & SEED_SETTING_DONE))
72 ret = -EIO;
73
74 pm_runtime_put_noidle(exynos_rng->dev);
75
76 return ret;
77}
78
79static int exynos_read(struct hwrng *rng, void *buf,
80 size_t max, bool wait)
81{
82 struct exynos_rng *exynos_rng = container_of(rng,
83 struct exynos_rng, rng);
84 u32 *data = buf;
85
86 pm_runtime_get_sync(exynos_rng->dev);
87
88 exynos_rng_writel(exynos_rng, PRNG_START, 0);
89
90 while (!(exynos_rng_readl(exynos_rng,
91 EXYNOS_PRNG_STATUS_OFFSET) & PRNG_DONE))
92 cpu_relax();
93
94 exynos_rng_writel(exynos_rng, PRNG_DONE, EXYNOS_PRNG_STATUS_OFFSET);
95
96 *data = exynos_rng_readl(exynos_rng, EXYNOS_PRNG_OUT1_OFFSET);
97
98 pm_runtime_mark_last_busy(exynos_rng->dev);
99 pm_runtime_autosuspend(exynos_rng->dev);
100
101 return 4;
102}
103
bcd2982a 104static int exynos_rng_probe(struct platform_device *pdev)
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105{
106 struct exynos_rng *exynos_rng;
c7c9e1c3 107 struct resource *res;
08cd2b50 108 int ret;
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109
110 exynos_rng = devm_kzalloc(&pdev->dev, sizeof(struct exynos_rng),
111 GFP_KERNEL);
112 if (!exynos_rng)
113 return -ENOMEM;
114
115 exynos_rng->dev = &pdev->dev;
116 exynos_rng->rng.name = "exynos";
117 exynos_rng->rng.init = exynos_init;
118 exynos_rng->rng.read = exynos_read;
119 exynos_rng->clk = devm_clk_get(&pdev->dev, "secss");
120 if (IS_ERR(exynos_rng->clk)) {
121 dev_err(&pdev->dev, "Couldn't get clock.\n");
122 return -ENOENT;
123 }
124
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125 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
126 exynos_rng->mem = devm_ioremap_resource(&pdev->dev, res);
127 if (IS_ERR(exynos_rng->mem))
128 return PTR_ERR(exynos_rng->mem);
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129
130 platform_set_drvdata(pdev, exynos_rng);
131
132 pm_runtime_set_autosuspend_delay(&pdev->dev, EXYNOS_AUTOSUSPEND_DELAY);
133 pm_runtime_use_autosuspend(&pdev->dev);
134 pm_runtime_enable(&pdev->dev);
135
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136 ret = hwrng_register(&exynos_rng->rng);
137 if (ret) {
138 pm_runtime_dont_use_autosuspend(&pdev->dev);
139 pm_runtime_disable(&pdev->dev);
140 }
141
142 return ret;
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143}
144
39af33fc 145static int exynos_rng_remove(struct platform_device *pdev)
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146{
147 struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
148
149 hwrng_unregister(&exynos_rng->rng);
150
151 return 0;
152}
153
a80c5422 154#if defined(CONFIG_PM_SLEEP) || defined(CONFIG_PM_RUNTIME)
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155static int exynos_rng_runtime_suspend(struct device *dev)
156{
157 struct platform_device *pdev = to_platform_device(dev);
158 struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
159
160 clk_disable_unprepare(exynos_rng->clk);
161
162 return 0;
163}
164
165static int exynos_rng_runtime_resume(struct device *dev)
166{
167 struct platform_device *pdev = to_platform_device(dev);
168 struct exynos_rng *exynos_rng = platform_get_drvdata(pdev);
169
170 return clk_prepare_enable(exynos_rng->clk);
171}
a80c5422 172#endif
b329669e 173
ef4458a1 174static UNIVERSAL_DEV_PM_OPS(exynos_rng_pm_ops, exynos_rng_runtime_suspend,
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175 exynos_rng_runtime_resume, NULL);
176
177static struct platform_driver exynos_rng_driver = {
178 .driver = {
179 .name = "exynos-rng",
180 .owner = THIS_MODULE,
181 .pm = &exynos_rng_pm_ops,
182 },
183 .probe = exynos_rng_probe,
bcd2982a 184 .remove = exynos_rng_remove,
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185};
186
187module_platform_driver(exynos_rng_driver);
188
189MODULE_DESCRIPTION("EXYNOS 4 H/W Random Number Generator driver");
190MODULE_AUTHOR("Jonghwa Lee <jonghwa3.lee@samsung.com>");
191MODULE_LICENSE("GPL");