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drivers: power: report battery voltage in AOSP compatible format
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / block / umem.c
CommitLineData
1da177e4
LT		 1/*
2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
3 *
4 * (C) 2001 San Mehat <nettwerk@valinux.com>
5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
7 *
8 * This driver for the Micro Memory PCI Memory Module with Battery Backup
9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
10 *
11 * This driver is released to the public under the terms of the
12 * GNU GENERAL PUBLIC LICENSE version 2
13 * See the file COPYING for details.
14 *
15 * This driver provides a standard block device interface for Micro Memory(tm)
16 * PCI based RAM boards.
17 * 10/05/01: Phap Nguyen - Rebuilt the driver
18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
20 * - use stand disk partitioning (so fdisk works).
21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
22 * - incorporate into main kernel
23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
24 * - use spin_lock_bh instead of _irq
25 * - Never block on make_request. queue
26 * bh's instead.
27 * - unregister umem from devfs at mod unload
28 * - Change version to 2.3
29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
31 * 15May2002:NeilBrown - convert to bio for 2.5
32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
33 * - a sequence of writes that cover the card, and
34 * - set initialised bit then.
35 */
36
458cf5e9 37#undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
1da177e4
LT		 38#include <linux/fs.h>
39#include <linux/bio.h>
40#include <linux/kernel.h>
41#include <linux/mm.h>
42#include <linux/mman.h>
5a0e3ad6 43#include <linux/gfp.h>
1da177e4
LT		 44#include <linux/ioctl.h>
45#include <linux/module.h>
46#include <linux/init.h>
47#include <linux/interrupt.h>
1da177e4
LT		 48#include <linux/timer.h>
49#include <linux/pci.h>
910638ae 50#include <linux/dma-mapping.h>
1da177e4
LT		 51
52#include <linux/fcntl.h> /* O_ACCMODE */
53#include <linux/hdreg.h> /* HDIO_GETGEO */
54
3084f0c6 55#include "umem.h"
1da177e4
LT		 56
57#include <asm/uaccess.h>
58#include <asm/io.h>
59
1da177e4
LT		 60#define MM_MAXCARDS 4
61#define MM_RAHEAD 2 /* two sectors */
62#define MM_BLKSIZE 1024 /* 1k blocks */
63#define MM_HARDSECT 512 /* 512-byte hardware sectors */
64#define MM_SHIFT 6 /* max 64 partitions on 4 cards */
65
66/*
67 * Version Information
68 */
69
ee4a7b68
JG		 70#define DRIVER_NAME "umem"
71#define DRIVER_VERSION "v2.3"
72#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
73#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
1da177e4
LT		 74
75static int debug;
76/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
77#define HW_TRACE(x)
78
79#define DEBUG_LED_ON_TRANSFER 0x01
80#define DEBUG_BATTERY_POLLING 0x02
81
82module_param(debug, int, 0644);
83MODULE_PARM_DESC(debug, "Debug bitmask");
84
85static int pci_read_cmd = 0x0C; /* Read Multiple */
86module_param(pci_read_cmd, int, 0);
87MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
88
89static int pci_write_cmd = 0x0F; /* Write and Invalidate */
90module_param(pci_write_cmd, int, 0);
91MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
92
93static int pci_cmds;
94
95static int major_nr;
96
97#include <linux/blkdev.h>
98#include <linux/blkpg.h>
99
100struct cardinfo {
1da177e4
LT		 101 struct pci_dev *dev;
102
1da177e4 103 unsigned char __iomem *csr_remap;
1da177e4
LT		 104 unsigned int mm_size; /* size in kbytes */
105
106 unsigned int init_size; /* initial segment, in sectors,
107 * that we know to
108 * have been written
109 */
110 struct bio *bio, *currentbio, **biotail;
eea9befa
N		 111 int current_idx;
112 sector_t current_sector;
1da177e4 113
165125e1 114 struct request_queue *queue;
1da177e4
LT		 115
116 struct mm_page {
117 dma_addr_t page_dma;
118 struct mm_dma_desc *desc;
119 int cnt, headcnt;
120 struct bio *bio, **biotail;
eea9befa 121 int idx;
1da177e4
LT		 122 } mm_pages[2];
123#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
124
125 int Active, Ready;
126
127 struct tasklet_struct tasklet;
128 unsigned int dma_status;
129
130 struct {
131 int good;
132 int warned;
133 unsigned long last_change;
134 } battery[2];
135
136 spinlock_t lock;
137 int check_batteries;
138
139 int flags;
140};
141
142static struct cardinfo cards[MM_MAXCARDS];
1da177e4
LT		 143static struct timer_list battery_timer;
144
458cf5e9 145static int num_cards;
1da177e4
LT		 146
147static struct gendisk *mm_gendisk[MM_MAXCARDS];
148
149static void check_batteries(struct cardinfo *card);
150
1da177e4
LT		 151static int get_userbit(struct cardinfo *card, int bit)
152{
153 unsigned char led;
154
155 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
156 return led & bit;
157}
458cf5e9 158
1da177e4
LT		 159static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
160{
161 unsigned char led;
162
163 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
164 if (state)
165 led |= bit;
166 else
167 led &= ~bit;
168 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
169
170 return 0;
171}
458cf5e9 172
1da177e4
LT		 173/*
174 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
175 */
176static void set_led(struct cardinfo *card, int shift, unsigned char state)
177{
178 unsigned char led;
179
180 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
181 if (state == LED_FLIP)
182 led ^= (1<<shift);
183 else {
184 led &= ~(0x03 << shift);
185 led |= (state << shift);
186 }
187 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
188
189}
190
191#ifdef MM_DIAG
1da177e4
LT		 192static void dump_regs(struct cardinfo *card)
193{
194 unsigned char *p;
195 int i, i1;
196
197 p = card->csr_remap;
198 for (i = 0; i < 8; i++) {
199 printk(KERN_DEBUG "%p ", p);
200
201 for (i1 = 0; i1 < 16; i1++)
202 printk("%02x ", *p++);
203
204 printk("\n");
205 }
206}
207#endif
458cf5e9 208
1da177e4
LT		 209static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
210{
4e0af881 211 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
1da177e4 212 if (dmastat & DMASCR_ANY_ERR)
458cf5e9 213 printk(KERN_CONT "ANY_ERR ");
1da177e4 214 if (dmastat & DMASCR_MBE_ERR)
458cf5e9 215 printk(KERN_CONT "MBE_ERR ");
1da177e4 216 if (dmastat & DMASCR_PARITY_ERR_REP)
458cf5e9 217 printk(KERN_CONT "PARITY_ERR_REP ");
1da177e4 218 if (dmastat & DMASCR_PARITY_ERR_DET)
458cf5e9 219 printk(KERN_CONT "PARITY_ERR_DET ");
1da177e4 220 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
458cf5e9 221 printk(KERN_CONT "SYSTEM_ERR_SIG ");
1da177e4 222 if (dmastat & DMASCR_TARGET_ABT)
458cf5e9 223 printk(KERN_CONT "TARGET_ABT ");
1da177e4 224 if (dmastat & DMASCR_MASTER_ABT)
458cf5e9 225 printk(KERN_CONT "MASTER_ABT ");
1da177e4 226 if (dmastat & DMASCR_CHAIN_COMPLETE)
458cf5e9 227 printk(KERN_CONT "CHAIN_COMPLETE ");
1da177e4 228 if (dmastat & DMASCR_DMA_COMPLETE)
458cf5e9 229 printk(KERN_CONT "DMA_COMPLETE ");
1da177e4
LT		 230 printk("\n");
231}
232
233/*
234 * Theory of request handling
235 *
236 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
237 * We have two pages of mm_dma_desc, holding about 64 descriptors
238 * each. These are allocated at init time.
239 * One page is "Ready" and is either full, or can have request added.
240 * The other page might be "Active", which DMA is happening on it.
241 *
242 * Whenever IO on the active page completes, the Ready page is activated
243 * and the ex-Active page is clean out and made Ready.
7eaceacc 244 * Otherwise the Ready page is only activated when it becomes full.
1da177e4
LT		 245 *
246 * If a request arrives while both pages a full, it is queued, and b_rdev is
247 * overloaded to record whether it was a read or a write.
248 *
249 * The interrupt handler only polls the device to clear the interrupt.
250 * The processing of the result is done in a tasklet.
251 */
252
253static void mm_start_io(struct cardinfo *card)
254{
255 /* we have the lock, we know there is
256 * no IO active, and we know that card->Active
257 * is set
258 */
259 struct mm_dma_desc *desc;
260 struct mm_page *page;
261 int offset;
262
263 /* make the last descriptor end the chain */
264 page = &card->mm_pages[card->Active];
458cf5e9
RD		 265 pr_debug("start_io: %d %d->%d\n",
266 card->Active, page->headcnt, page->cnt - 1);
1da177e4
LT		 267 desc = &page->desc[page->cnt-1];
268
269 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
270 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
271 desc->sem_control_bits = desc->control_bits;
272
4e953a21 273
1da177e4
LT		 274 if (debug & DEBUG_LED_ON_TRANSFER)
275 set_led(card, LED_REMOVE, LED_ON);
276
277 desc = &page->desc[page->headcnt];
278 writel(0, card->csr_remap + DMA_PCI_ADDR);
279 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
280
281 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
282 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
283
284 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
285 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
286
287 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
288 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
289
458cf5e9
RD		 290 offset = ((char *)desc) - ((char *)page->desc);
291 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
1da177e4
LT		 292 card->csr_remap + DMA_DESCRIPTOR_ADDR);
293 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
294 * and on some ports will do nothing ! */
295 writel(cpu_to_le32(((u64)page->page_dma)>>32),
296 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
297
298 /* Go, go, go */
299 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
300 card->csr_remap + DMA_STATUS_CTRL);
301}
302
303static int add_bio(struct cardinfo *card);
304
305static void activate(struct cardinfo *card)
306{
4e953a21 307 /* if No page is Active, and Ready is
1da177e4
LT		 308 * not empty, then switch Ready page
309 * to active and start IO.
310 * Then add any bh's that are available to Ready
311 */
312
313 do {
314 while (add_bio(card))
315 ;
316
317 if (card->Active == -1 &&
318 card->mm_pages[card->Ready].cnt > 0) {
319 card->Active = card->Ready;
320 card->Ready = 1-card->Ready;
321 mm_start_io(card);
322 }
323
324 } while (card->Active == -1 && add_bio(card));
325}
326
327static inline void reset_page(struct mm_page *page)
328{
329 page->cnt = 0;
330 page->headcnt = 0;
331 page->bio = NULL;
458cf5e9 332 page->biotail = &page->bio;
1da177e4
LT		 333}
334
4e953a21 335/*
1da177e4
LT		 336 * If there is room on Ready page, take
337 * one bh off list and add it.
338 * return 1 if there was room, else 0.
339 */
340static int add_bio(struct cardinfo *card)
341{
342 struct mm_page *p;
343 struct mm_dma_desc *desc;
344 dma_addr_t dma_handle;
345 int offset;
346 struct bio *bio;
eea9befa
N		 347 struct bio_vec *vec;
348 int idx;
1da177e4
LT		 349 int rw;
350 int len;
351
352 bio = card->currentbio;
353 if (!bio && card->bio) {
354 card->currentbio = card->bio;
eea9befa
N		 355 card->current_idx = card->bio->bi_idx;
356 card->current_sector = card->bio->bi_sector;
1da177e4
LT		 357 card->bio = card->bio->bi_next;
358 if (card->bio == NULL)
359 card->biotail = &card->bio;
360 card->currentbio->bi_next = NULL;
361 return 1;
362 }
363 if (!bio)
364 return 0;
eea9befa 365 idx = card->current_idx;
1da177e4
LT		 366
367 rw = bio_rw(bio);
368 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
369 return 0;
370
eea9befa
N		 371 vec = bio_iovec_idx(bio, idx);
372 len = vec->bv_len;
373 dma_handle = pci_map_page(card->dev,
374 vec->bv_page,
375 vec->bv_offset,
1da177e4 376 len,
458cf5e9 377 (rw == READ) ?
1da177e4
LT		 378 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
379
380 p = &card->mm_pages[card->Ready];
381 desc = &p->desc[p->cnt];
382 p->cnt++;
eea9befa
N		 383 if (p->bio == NULL)
384 p->idx = idx;
1da177e4
LT		 385 if ((p->biotail) != &bio->bi_next) {
386 *(p->biotail) = bio;
387 p->biotail = &(bio->bi_next);
388 bio->bi_next = NULL;
389 }
390
391 desc->data_dma_handle = dma_handle;
392
393 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
eea9befa 394 desc->local_addr = cpu_to_le64(card->current_sector << 9);
1da177e4 395 desc->transfer_size = cpu_to_le32(len);
458cf5e9 396 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
1da177e4
LT		 397 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
398 desc->zero1 = desc->zero2 = 0;
458cf5e9 399 offset = (((char *)(desc+1)) - ((char *)p->desc));
1da177e4
LT		 400 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
401 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
402 DMASCR_PARITY_INT_EN|
403 DMASCR_CHAIN_EN |
404 DMASCR_SEM_EN |
405 pci_cmds);
406 if (rw == WRITE)
407 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
408 desc->sem_control_bits = desc->control_bits;
409
eea9befa
N		 410 card->current_sector += (len >> 9);
411 idx++;
412 card->current_idx = idx;
413 if (idx >= bio->bi_vcnt)
1da177e4
LT		 414 card->currentbio = NULL;
415
416 return 1;
417}
418
419static void process_page(unsigned long data)
420{
421 /* check if any of the requests in the page are DMA_COMPLETE,
422 * and deal with them appropriately.
423 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
458cf5e9
RD		 424 * dma must have hit an error on that descriptor, so use dma_status
425 * instead and assume that all following descriptors must be re-tried.
1da177e4
LT		 426 */
427 struct mm_page *page;
458cf5e9 428 struct bio *return_bio = NULL;
1da177e4
LT		 429 struct cardinfo *card = (struct cardinfo *)data;
430 unsigned int dma_status = card->dma_status;
431
432 spin_lock_bh(&card->lock);
433 if (card->Active < 0)
434 goto out_unlock;
435 page = &card->mm_pages[card->Active];
4e953a21 436
1da177e4
LT		 437 while (page->headcnt < page->cnt) {
438 struct bio *bio = page->bio;
439 struct mm_dma_desc *desc = &page->desc[page->headcnt];
440 int control = le32_to_cpu(desc->sem_control_bits);
458cf5e9 441 int last = 0;
1da177e4
LT		 442 int idx;
443
444 if (!(control & DMASCR_DMA_COMPLETE)) {
445 control = dma_status;
458cf5e9 446 last = 1;
1da177e4
LT		 447 }
448 page->headcnt++;
eea9befa
N		 449 idx = page->idx;
450 page->idx++;
451 if (page->idx >= bio->bi_vcnt) {
1da177e4 452 page->bio = bio->bi_next;
794e64d5
NB		 453 if (page->bio)
454 page->idx = page->bio->bi_idx;
eea9befa 455 }
1da177e4 456
4e953a21 457 pci_unmap_page(card->dev, desc->data_dma_handle,
458cf5e9
RD		 458 bio_iovec_idx(bio, idx)->bv_len,
459 (control & DMASCR_TRANSFER_READ) ?
1da177e4
LT		 460 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
461 if (control & DMASCR_HARD_ERROR) {
462 /* error */
463 clear_bit(BIO_UPTODATE, &bio->bi_flags);
4e0af881
JG		 464 dev_printk(KERN_WARNING, &card->dev->dev,
465 "I/O error on sector %d/%d\n",
466 le32_to_cpu(desc->local_addr)>>9,
467 le32_to_cpu(desc->transfer_size));
1da177e4 468 dump_dmastat(card, control);
7b6d91da 469 } else if ((bio->bi_rw & REQ_WRITE) &&
458cf5e9
RD		 470 le32_to_cpu(desc->local_addr) >> 9 ==
471 card->init_size) {
472 card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
473 if (card->init_size >> 1 >= card->mm_size) {
4e0af881
JG		 474 dev_printk(KERN_INFO, &card->dev->dev,
475 "memory now initialised\n");
1da177e4
LT		 476 set_userbit(card, MEMORY_INITIALIZED, 1);
477 }
478 }
479 if (bio != page->bio) {
480 bio->bi_next = return_bio;
481 return_bio = bio;
482 }
483
458cf5e9
RD		 484 if (last)
485 break;
1da177e4
LT		 486 }
487
488 if (debug & DEBUG_LED_ON_TRANSFER)
489 set_led(card, LED_REMOVE, LED_OFF);
490
491 if (card->check_batteries) {
492 card->check_batteries = 0;
493 check_batteries(card);
494 }
495 if (page->headcnt >= page->cnt) {
496 reset_page(page);
497 card->Active = -1;
498 activate(card);
499 } else {
500 /* haven't finished with this one yet */
46308c0b 501 pr_debug("do some more\n");
1da177e4
LT		 502 mm_start_io(card);
503 }
504 out_unlock:
505 spin_unlock_bh(&card->lock);
506
458cf5e9 507 while (return_bio) {
1da177e4
LT		 508 struct bio *bio = return_bio;
509
510 return_bio = bio->bi_next;
511 bio->bi_next = NULL;
6712ecf8 512 bio_endio(bio, 0);
1da177e4
LT		 513 }
514}
515
74018dc3 516static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule)
32587371 517{
9cbb1750 518 struct cardinfo *card = cb->data;
32587371 519
9cbb1750
N		 520 spin_lock_irq(&card->lock);
521 activate(card);
522 spin_unlock_irq(&card->lock);
523 kfree(cb);
32587371
TG		 524}
525
526static int mm_check_plugged(struct cardinfo *card)
527{
9cbb1750 528 return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb));
32587371
TG		 529}
530
5a7bbad2 531static void mm_make_request(struct request_queue *q, struct bio *bio)
1da177e4
LT		 532{
533 struct cardinfo *card = q->queuedata;
f2b9ecc4
ZB		 534 pr_debug("mm_make_request %llu %u\n",
535 (unsigned long long)bio->bi_sector, bio->bi_size);
1da177e4 536
1da177e4
LT		 537 spin_lock_irq(&card->lock);
538 *card->biotail = bio;
539 bio->bi_next = NULL;
540 card->biotail = &bio->bi_next;
32587371
TG		 541 if (bio->bi_rw & REQ_SYNC || !mm_check_plugged(card))
542 activate(card);
1da177e4
LT		 543 spin_unlock_irq(&card->lock);
544
5a7bbad2 545 return;
1da177e4
LT		 546}
547
7d12e780 548static irqreturn_t mm_interrupt(int irq, void *__card)
1da177e4
LT		 549{
550 struct cardinfo *card = (struct cardinfo *) __card;
551 unsigned int dma_status;
552 unsigned short cfg_status;
553
554HW_TRACE(0x30);
555
556 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
557
558 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
559 /* interrupt wasn't for me ... */
560 return IRQ_NONE;
458cf5e9 561 }
1da177e4
LT		 562
563 /* clear COMPLETION interrupts */
564 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
565 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
458cf5e9 566 card->csr_remap + DMA_STATUS_CTRL);
1da177e4
LT		 567 else
568 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
458cf5e9 569 card->csr_remap + DMA_STATUS_CTRL + 2);
4e953a21 570
1da177e4
LT		 571 /* log errors and clear interrupt status */
572 if (dma_status & DMASCR_ANY_ERR) {
573 unsigned int data_log1, data_log2;
574 unsigned int addr_log1, addr_log2;
575 unsigned char stat, count, syndrome, check;
576
577 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
578
458cf5e9
RD		 579 data_log1 = le32_to_cpu(readl(card->csr_remap +
580 ERROR_DATA_LOG));
581 data_log2 = le32_to_cpu(readl(card->csr_remap +
582 ERROR_DATA_LOG + 4));
583 addr_log1 = le32_to_cpu(readl(card->csr_remap +
584 ERROR_ADDR_LOG));
1da177e4
LT		 585 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
586
587 count = readb(card->csr_remap + ERROR_COUNT);
588 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
589 check = readb(card->csr_remap + ERROR_CHECK);
590
591 dump_dmastat(card, dma_status);
592
593 if (stat & 0x01)
4e0af881
JG		 594 dev_printk(KERN_ERR, &card->dev->dev,
595 "Memory access error detected (err count %d)\n",
596 count);
1da177e4 597 if (stat & 0x02)
4e0af881
JG		 598 dev_printk(KERN_ERR, &card->dev->dev,
599 "Multi-bit EDC error\n");
1da177e4 600
4e0af881
JG		 601 dev_printk(KERN_ERR, &card->dev->dev,
602 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
603 addr_log2, addr_log1, data_log2, data_log1);
604 dev_printk(KERN_ERR, &card->dev->dev,
605 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
606 check, syndrome);
1da177e4
LT		 607
608 writeb(0, card->csr_remap + ERROR_COUNT);
609 }
610
611 if (dma_status & DMASCR_PARITY_ERR_REP) {
4e0af881
JG		 612 dev_printk(KERN_ERR, &card->dev->dev,
613 "PARITY ERROR REPORTED\n");
1da177e4
LT		 614 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
615 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
616 }
617
618 if (dma_status & DMASCR_PARITY_ERR_DET) {
4e0af881
JG		 619 dev_printk(KERN_ERR, &card->dev->dev,
620 "PARITY ERROR DETECTED\n");
1da177e4
LT		 621 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
622 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
623 }
624
625 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
4e0af881 626 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
1da177e4
LT		 627 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
628 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
629 }
630
631 if (dma_status & DMASCR_TARGET_ABT) {
4e0af881 632 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
1da177e4
LT		 633 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
634 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
635 }
636
637 if (dma_status & DMASCR_MASTER_ABT) {
4e0af881 638 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
1da177e4
LT		 639 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
640 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
641 }
642
643 /* and process the DMA descriptors */
644 card->dma_status = dma_status;
645 tasklet_schedule(&card->tasklet);
646
647HW_TRACE(0x36);
648
4e953a21 649 return IRQ_HANDLED;
1da177e4 650}
458cf5e9 651
1da177e4
LT		 652/*
653 * If both batteries are good, no LED
654 * If either battery has been warned, solid LED
655 * If both batteries are bad, flash the LED quickly
656 * If either battery is bad, flash the LED semi quickly
657 */
658static void set_fault_to_battery_status(struct cardinfo *card)
659{
660 if (card->battery[0].good && card->battery[1].good)
661 set_led(card, LED_FAULT, LED_OFF);
662 else if (card->battery[0].warned || card->battery[1].warned)
663 set_led(card, LED_FAULT, LED_ON);
664 else if (!card->battery[0].good && !card->battery[1].good)
665 set_led(card, LED_FAULT, LED_FLASH_7_0);
666 else
667 set_led(card, LED_FAULT, LED_FLASH_3_5);
668}
669
670static void init_battery_timer(void);
671
1da177e4
LT		 672static int check_battery(struct cardinfo *card, int battery, int status)
673{
674 if (status != card->battery[battery].good) {
675 card->battery[battery].good = !card->battery[battery].good;
676 card->battery[battery].last_change = jiffies;
677
678 if (card->battery[battery].good) {
4e0af881
JG		 679 dev_printk(KERN_ERR, &card->dev->dev,
680 "Battery %d now good\n", battery + 1);
1da177e4
LT		 681 card->battery[battery].warned = 0;
682 } else
4e0af881
JG		 683 dev_printk(KERN_ERR, &card->dev->dev,
684 "Battery %d now FAILED\n", battery + 1);
1da177e4
LT		 685
686 return 1;
687 } else if (!card->battery[battery].good &&
688 !card->battery[battery].warned &&
689 time_after_eq(jiffies, card->battery[battery].last_change +
690 (HZ * 60 * 60 * 5))) {
4e0af881
JG		 691 dev_printk(KERN_ERR, &card->dev->dev,
692 "Battery %d still FAILED after 5 hours\n", battery + 1);
1da177e4
LT		 693 card->battery[battery].warned = 1;
694
695 return 1;
696 }
697
698 return 0;
699}
458cf5e9 700
1da177e4
LT		 701static void check_batteries(struct cardinfo *card)
702{
703 /* NOTE: this must *never* be called while the card
704 * is doing (bus-to-card) DMA, or you will need the
705 * reset switch
706 */
707 unsigned char status;
708 int ret1, ret2;
709
710 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
711 if (debug & DEBUG_BATTERY_POLLING)
4e0af881
JG		 712 dev_printk(KERN_DEBUG, &card->dev->dev,
713 "checking battery status, 1 = %s, 2 = %s\n",
1da177e4
LT		 714 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
715 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
716
717 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
718 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
719
720 if (ret1 || ret2)
721 set_fault_to_battery_status(card);
722}
723
724static void check_all_batteries(unsigned long ptr)
725{
726 int i;
727
4e953a21 728 for (i = 0; i < num_cards; i++)
1da177e4
LT		 729 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
730 struct cardinfo *card = &cards[i];
731 spin_lock_bh(&card->lock);
732 if (card->Active >= 0)
733 card->check_batteries = 1;
734 else
735 check_batteries(card);
736 spin_unlock_bh(&card->lock);
737 }
738
739 init_battery_timer();
740}
458cf5e9 741
1da177e4
LT		 742static void init_battery_timer(void)
743{
744 init_timer(&battery_timer);
745 battery_timer.function = check_all_batteries;
746 battery_timer.expires = jiffies + (HZ * 60);
747 add_timer(&battery_timer);
748}
458cf5e9 749
1da177e4
LT		 750static void del_battery_timer(void)
751{
752 del_timer(&battery_timer);
753}
458cf5e9 754
1da177e4
LT		 755/*
756 * Note no locks taken out here. In a worst case scenario, we could drop
757 * a chunk of system memory. But that should never happen, since validation
758 * happens at open or mount time, when locks are held.
759 *
760 * That's crap, since doing that while some partitions are opened
761 * or mounted will give you really nasty results.
762 */
763static int mm_revalidate(struct gendisk *disk)
764{
765 struct cardinfo *card = disk->private_data;
766 set_capacity(disk, card->mm_size << 1);
767 return 0;
768}
a885c8c4
CH		 769
770static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 771{
a885c8c4
CH		 772 struct cardinfo *card = bdev->bd_disk->private_data;
773 int size = card->mm_size * (1024 / MM_HARDSECT);
1da177e4 774
a885c8c4
CH		 775 /*
776 * get geometry: we have to fake one... trim the size to a
777 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
778 * whatever cylinders.
779 */
780 geo->heads = 64;
781 geo->sectors = 32;
782 geo->cylinders = size / (geo->heads * geo->sectors);
783 return 0;
1da177e4 784}
a885c8c4 785
83d5cde4 786static const struct block_device_operations mm_fops = {
1da177e4 787 .owner = THIS_MODULE,
a885c8c4 788 .getgeo = mm_getgeo,
458cf5e9 789 .revalidate_disk = mm_revalidate,
1da177e4 790};
458cf5e9 791
8d85fce7 792static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1da177e4
LT		 793{
794 int ret = -ENODEV;
795 struct cardinfo *card = &cards[num_cards];
796 unsigned char mem_present;
797 unsigned char batt_status;
798 unsigned int saved_bar, data;
ee4a7b68
JG		 799 unsigned long csr_base;
800 unsigned long csr_len;
1da177e4 801 int magic_number;
4e0af881
JG		 802 static int printed_version;
803
804 if (!printed_version++)
805 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
1da177e4 806
ee4a7b68
JG		 807 ret = pci_enable_device(dev);
808 if (ret)
809 return ret;
1da177e4
LT		 810
811 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
812 pci_set_master(dev);
813
814 card->dev = dev;
1da177e4 815
ee4a7b68
JG		 816 csr_base = pci_resource_start(dev, 0);
817 csr_len = pci_resource_len(dev, 0);
818 if (!csr_base || !csr_len)
819 return -ENODEV;
1da177e4 820
4e0af881 821 dev_printk(KERN_INFO, &dev->dev,
458cf5e9 822 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
1da177e4 823
6a35528a 824 if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
284901a9 825 pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
4e0af881 826 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
1da177e4
LT		 827 return -ENOMEM;
828 }
ee4a7b68
JG		 829
830 ret = pci_request_regions(dev, DRIVER_NAME);
831 if (ret) {
4e0af881
JG		 832 dev_printk(KERN_ERR, &card->dev->dev,
833 "Unable to request memory region\n");
1da177e4
LT		 834 goto failed_req_csr;
835 }
836
ee4a7b68 837 card->csr_remap = ioremap_nocache(csr_base, csr_len);
1da177e4 838 if (!card->csr_remap) {
4e0af881
JG		 839 dev_printk(KERN_ERR, &card->dev->dev,
840 "Unable to remap memory region\n");
1da177e4
LT		 841 ret = -ENOMEM;
842
843 goto failed_remap_csr;
844 }
845
4e0af881
JG		 846 dev_printk(KERN_INFO, &card->dev->dev,
847 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
ee4a7b68 848 csr_base, card->csr_remap, csr_len);
1da177e4 849
458cf5e9 850 switch (card->dev->device) {
1da177e4
LT		 851 case 0x5415:
852 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
853 magic_number = 0x59;
854 break;
855
856 case 0x5425:
857 card->flags |= UM_FLAG_NO_BYTE_STATUS;
858 magic_number = 0x5C;
859 break;
860
861 case 0x6155:
458cf5e9
RD		 862 card->flags |= UM_FLAG_NO_BYTE_STATUS |
863 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
1da177e4
LT		 864 magic_number = 0x99;
865 break;
866
867 default:
868 magic_number = 0x100;
869 break;
870 }
871
872 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
4e0af881 873 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
1da177e4
LT		 874 ret = -ENOMEM;
875 goto failed_magic;
876 }
877
878 card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
458cf5e9
RD		 879 PAGE_SIZE * 2,
880 &card->mm_pages[0].page_dma);
1da177e4 881 card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
458cf5e9
RD		 882 PAGE_SIZE * 2,
883 &card->mm_pages[1].page_dma);
1da177e4
LT		 884 if (card->mm_pages[0].desc == NULL ||
885 card->mm_pages[1].desc == NULL) {
4e0af881 886 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
1da177e4
LT		 887 goto failed_alloc;
888 }
889 reset_page(&card->mm_pages[0]);
890 reset_page(&card->mm_pages[1]);
891 card->Ready = 0; /* page 0 is ready */
892 card->Active = -1; /* no page is active */
893 card->bio = NULL;
894 card->biotail = &card->bio;
895
896 card->queue = blk_alloc_queue(GFP_KERNEL);
897 if (!card->queue)
898 goto failed_alloc;
899
900 blk_queue_make_request(card->queue, mm_make_request);
f3c737de 901 card->queue->queue_lock = &card->lock;
1da177e4 902 card->queue->queuedata = card;
1da177e4
LT		 903
904 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
905
906 card->check_batteries = 0;
4e953a21 907
1da177e4
LT		 908 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
909 switch (mem_present) {
910 case MEM_128_MB:
911 card->mm_size = 1024 * 128;
912 break;
913 case MEM_256_MB:
914 card->mm_size = 1024 * 256;
915 break;
916 case MEM_512_MB:
917 card->mm_size = 1024 * 512;
918 break;
919 case MEM_1_GB:
920 card->mm_size = 1024 * 1024;
921 break;
922 case MEM_2_GB:
923 card->mm_size = 1024 * 2048;
924 break;
925 default:
926 card->mm_size = 0;
927 break;
928 }
929
930 /* Clear the LED's we control */
931 set_led(card, LED_REMOVE, LED_OFF);
932 set_led(card, LED_FAULT, LED_OFF);
933
934 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
935
936 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
937 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
938 card->battery[0].last_change = card->battery[1].last_change = jiffies;
939
4e953a21 940 if (card->flags & UM_FLAG_NO_BATT)
4e0af881
JG		 941 dev_printk(KERN_INFO, &card->dev->dev,
942 "Size %d KB\n", card->mm_size);
1da177e4 943 else {
4e0af881
JG		 944 dev_printk(KERN_INFO, &card->dev->dev,
945 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
946 card->mm_size,
458cf5e9 947 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
1da177e4 948 card->battery[0].good ? "OK" : "FAILURE",
458cf5e9 949 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
1da177e4
LT		 950 card->battery[1].good ? "OK" : "FAILURE");
951
952 set_fault_to_battery_status(card);
953 }
954
955 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
956 data = 0xffffffff;
957 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
958 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
959 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
960 data &= 0xfffffff0;
961 data = ~data;
962 data += 1;
963
458cf5e9
RD		 964 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
965 card)) {
4e0af881
JG		 966 dev_printk(KERN_ERR, &card->dev->dev,
967 "Unable to allocate IRQ\n");
1da177e4 968 ret = -ENODEV;
1da177e4
LT		 969 goto failed_req_irq;
970 }
971
4e0af881 972 dev_printk(KERN_INFO, &card->dev->dev,
ee4a7b68 973 "Window size %d bytes, IRQ %d\n", data, dev->irq);
1da177e4 974
458cf5e9 975 spin_lock_init(&card->lock);
1da177e4
LT		 976
977 pci_set_drvdata(dev, card);
978
979 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
980 pci_write_cmd = 0x07; /* then Memory Write command */
981
982 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
983 unsigned short cfg_command;
984 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
985 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
986 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
987 }
988 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
989
990 num_cards++;
991
992 if (!get_userbit(card, MEMORY_INITIALIZED)) {
4e0af881 993 dev_printk(KERN_INFO, &card->dev->dev,
458cf5e9 994 "memory NOT initialized. Consider over-writing whole device.\n");
1da177e4
LT		 995 card->init_size = 0;
996 } else {
4e0af881
JG		 997 dev_printk(KERN_INFO, &card->dev->dev,
998 "memory already initialized\n");
1da177e4
LT		 999 card->init_size = card->mm_size;
1000 }
1001
1002 /* Enable ECC */
1003 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
1004
1005 return 0;
1006
1007 failed_req_irq:
1008 failed_alloc:
1009 if (card->mm_pages[0].desc)
1010 pci_free_consistent(card->dev, PAGE_SIZE*2,
1011 card->mm_pages[0].desc,
1012 card->mm_pages[0].page_dma);
1013 if (card->mm_pages[1].desc)
1014 pci_free_consistent(card->dev, PAGE_SIZE*2,
1015 card->mm_pages[1].desc,
1016 card->mm_pages[1].page_dma);
1017 failed_magic:
1da177e4
LT		 1018 iounmap(card->csr_remap);
1019 failed_remap_csr:
ee4a7b68 1020 pci_release_regions(dev);
1da177e4
LT		 1021 failed_req_csr:
1022
1023 return ret;
1024}
458cf5e9 1025
1da177e4
LT		 1026static void mm_pci_remove(struct pci_dev *dev)
1027{
1028 struct cardinfo *card = pci_get_drvdata(dev);
1029
1030 tasklet_kill(&card->tasklet);
ee4a7b68 1031 free_irq(dev->irq, card);
1da177e4 1032 iounmap(card->csr_remap);
1da177e4
LT		 1033
1034 if (card->mm_pages[0].desc)
1035 pci_free_consistent(card->dev, PAGE_SIZE*2,
1036 card->mm_pages[0].desc,
1037 card->mm_pages[0].page_dma);
1038 if (card->mm_pages[1].desc)
1039 pci_free_consistent(card->dev, PAGE_SIZE*2,
1040 card->mm_pages[1].desc,
1041 card->mm_pages[1].page_dma);
1312f40e 1042 blk_cleanup_queue(card->queue);
ee4a7b68
JG		 1043
1044 pci_release_regions(dev);
1045 pci_disable_device(dev);
1da177e4
LT		 1046}
1047
5874c18b 1048static const struct pci_device_id mm_pci_ids[] = {
458cf5e9
RD		 1049 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
1050 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
1051 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
5874c18b 1052 {
1da177e4
LT		 1053 .vendor = 0x8086,
1054 .device = 0xB555,
458cf5e9
RD		 1055 .subvendor = 0x1332,
1056 .subdevice = 0x5460,
1057 .class = 0x050000,
1058 .class_mask = 0,
5874c18b 1059 }, { /* end: all zeroes */ }
1da177e4
LT		 1060};
1061
1062MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1063
1064static struct pci_driver mm_pci_driver = {
ee4a7b68
JG		 1065 .name = DRIVER_NAME,
1066 .id_table = mm_pci_ids,
1067 .probe = mm_pci_probe,
1068 .remove = mm_pci_remove,
1da177e4 1069};
ee4a7b68 1070
1da177e4
LT		 1071static int __init mm_init(void)
1072{
1073 int retval, i;
1074 int err;
1075
9bfab8ce 1076 retval = pci_register_driver(&mm_pci_driver);
1da177e4
LT		 1077 if (retval)
1078 return -ENOMEM;
1079
cb3503ca 1080 err = major_nr = register_blkdev(0, DRIVER_NAME);
5a243e0e
N		 1081 if (err < 0) {
1082 pci_unregister_driver(&mm_pci_driver);
1da177e4 1083 return -EIO;
5a243e0e 1084 }
1da177e4
LT		 1085
1086 for (i = 0; i < num_cards; i++) {
1087 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1088 if (!mm_gendisk[i])
1089 goto out;
1090 }
1091
1092 for (i = 0; i < num_cards; i++) {
1093 struct gendisk *disk = mm_gendisk[i];
1094 sprintf(disk->disk_name, "umem%c", 'a'+i);
1da177e4
LT		 1095 spin_lock_init(&cards[i].lock);
1096 disk->major = major_nr;
1097 disk->first_minor = i << MM_SHIFT;
1098 disk->fops = &mm_fops;
1099 disk->private_data = &cards[i];
1100 disk->queue = cards[i].queue;
1101 set_capacity(disk, cards[i].mm_size << 1);
1102 add_disk(disk);
1103 }
1104
1105 init_battery_timer();
4e0af881 1106 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1da177e4
LT		 1107/* printk("mm_init: Done. 10-19-01 9:00\n"); */
1108 return 0;
1109
1110out:
5a243e0e 1111 pci_unregister_driver(&mm_pci_driver);
cb3503ca 1112 unregister_blkdev(major_nr, DRIVER_NAME);
1da177e4
LT		 1113 while (i--)
1114 put_disk(mm_gendisk[i]);
1115 return -ENOMEM;
1116}
458cf5e9 1117
1da177e4
LT		 1118static void __exit mm_cleanup(void)
1119{
1120 int i;
1121
1122 del_battery_timer();
1123
458cf5e9 1124 for (i = 0; i < num_cards ; i++) {
1da177e4
LT		 1125 del_gendisk(mm_gendisk[i]);
1126 put_disk(mm_gendisk[i]);
1127 }
1128
1129 pci_unregister_driver(&mm_pci_driver);
1130
cb3503ca 1131 unregister_blkdev(major_nr, DRIVER_NAME);
1da177e4
LT		 1132}
1133
1134module_init(mm_init);
1135module_exit(mm_cleanup);
1136
1137MODULE_AUTHOR(DRIVER_AUTHOR);
1138MODULE_DESCRIPTION(DRIVER_DESC);
1139MODULE_LICENSE("GPL");
kernel source for telekom puls (alcatel/mediatek)