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cciss: factor out cciss_getpciinfo
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
405f5571 29#include <linux/smp_lock.h>
1da177e4
LT		 30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT		 40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1da177e4
LT		 44#include <asm/uaccess.h>
45#include <asm/io.h>
46
eb0df996 47#include <linux/dma-mapping.h>
1da177e4
LT		 48#include <linux/blkdev.h>
49#include <linux/genhd.h>
50#include <linux/completion.h>
d5d3b736 51#include <scsi/scsi.h>
03bbfee5
MMOD		 52#include <scsi/sg.h>
53#include <scsi/scsi_ioctl.h>
54#include <linux/cdrom.h>
231bc2a2 55#include <linux/scatterlist.h>
0a9279cc 56#include <linux/kthread.h>
1da177e4
LT		 57
58#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 59#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
60#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 61
62/* Embedded module documentation macros - see modules.h */
63MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 64MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 65MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
66MODULE_VERSION("3.6.26");
1da177e4
LT		 67MODULE_LICENSE("GPL");
68
2ec24ff1
SC		 69static int cciss_allow_hpsa;
70module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
71MODULE_PARM_DESC(cciss_allow_hpsa,
72 "Prevent cciss driver from accessing hardware known to be "
73 " supported by the hpsa driver");
74
1da177e4
LT		 75#include "cciss_cmd.h"
76#include "cciss.h"
77#include <linux/cciss_ioctl.h>
78
79/* define the PCI info for the cards we can control */
80static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
24aac480
MM		 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
77ca7286
MM		 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
841fdffd
MM		 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
1da177e4
LT		 113 {0,}
114};
7c832835 115
1da177e4
LT		 116MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
1da177e4
LT		 118/* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
7c832835 120 * access = Address of the struct of function pointers
1da177e4
LT		 121 */
122static struct board_type products[] = {
49153998
MM		 123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
49153998
MM		 133 {0x3235103C, "Smart Array P400i", &SA5_access},
134 {0x3211103C, "Smart Array E200i", &SA5_access},
135 {0x3212103C, "Smart Array E200", &SA5_access},
136 {0x3213103C, "Smart Array E200i", &SA5_access},
137 {0x3214103C, "Smart Array E200i", &SA5_access},
138 {0x3215103C, "Smart Array E200i", &SA5_access},
139 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 140/* controllers below this line are also supported by the hpsa driver. */
141#define HPSA_BOUNDARY 0x3223103C
142 {0x3223103C, "Smart Array P800", &SA5_access},
143 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 144 {0x323D103C, "Smart Array P700m", &SA5_access},
145 {0x3241103C, "Smart Array P212", &SA5_access},
146 {0x3243103C, "Smart Array P410", &SA5_access},
147 {0x3245103C, "Smart Array P410i", &SA5_access},
148 {0x3247103C, "Smart Array P411", &SA5_access},
149 {0x3249103C, "Smart Array P812", &SA5_access},
77ca7286
MM		 150 {0x324A103C, "Smart Array P712m", &SA5_access},
151 {0x324B103C, "Smart Array P711m", &SA5_access},
841fdffd
MM		 152 {0x3250103C, "Smart Array", &SA5_access},
153 {0x3251103C, "Smart Array", &SA5_access},
154 {0x3252103C, "Smart Array", &SA5_access},
155 {0x3253103C, "Smart Array", &SA5_access},
156 {0x3254103C, "Smart Array", &SA5_access},
1da177e4
LT		 157};
158
d14c4ab5 159/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 160#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 161#define MAX_IOCTL_CONFIG_WAIT 1000
162
163/*define how many times we will try a command because of bus resets */
164#define MAX_CMD_RETRIES 3
165
1da177e4
LT		 166#define MAX_CTLR 32
167
168/* Originally cciss driver only supports 8 major numbers */
169#define MAX_CTLR_ORIG 8
170
1da177e4
LT		 171static ctlr_info_t *hba[MAX_CTLR];
172
b368c9dd
AP		 173static struct task_struct *cciss_scan_thread;
174static DEFINE_MUTEX(scan_mutex);
175static LIST_HEAD(scan_q);
176
165125e1 177static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 178static irqreturn_t do_cciss_intx(int irq, void *dev_id);
179static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 180static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 181static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 182static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 183static int do_ioctl(struct block_device *bdev, fmode_t mode,
184 unsigned int cmd, unsigned long arg);
ef7822c2 185static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 186 unsigned int cmd, unsigned long arg);
a885c8c4 187static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 188
1da177e4 189static int cciss_revalidate(struct gendisk *disk);
2d11d993 190static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 191static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 192 int clear_all, int via_ioctl);
1da177e4 193
f70dba83 194static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 195 sector_t *total_size, unsigned int *block_size);
f70dba83 196static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 197 sector_t *total_size, unsigned int *block_size);
f70dba83 198static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 199 sector_t total_size,
00988a35 200 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 201 drive_info_struct *drv);
dac5488a 202static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 203static void start_io(ctlr_info_t *h);
f70dba83 204static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 205 __u8 page_code, unsigned char scsi3addr[],
206 int cmd_type);
85cc61ae 207static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
208 int attempt_retry);
209static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 210
d6f4965d 211static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 212static int scan_thread(void *data);
213static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 214static void cciss_hba_release(struct device *dev);
215static void cciss_device_release(struct device *dev);
361e9b07 216static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 217static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 218static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 219static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
220 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
221 u64 *cfg_offset);
222static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
223 unsigned long *memory_bar);
224
33079b21 225
5e216153
MM		 226/* performant mode helper functions */
227static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
228 int *bucket_map);
229static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 230
1da177e4 231#ifdef CONFIG_PROC_FS
f70dba83 232static void cciss_procinit(ctlr_info_t *h);
1da177e4 233#else
f70dba83 234static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 235{
236}
237#endif /* CONFIG_PROC_FS */
1da177e4
LT		 238
239#ifdef CONFIG_COMPAT
ef7822c2
AV		 240static int cciss_compat_ioctl(struct block_device *, fmode_t,
241 unsigned, unsigned long);
1da177e4
LT		 242#endif
243
83d5cde4 244static const struct block_device_operations cciss_fops = {
7c832835 245 .owner = THIS_MODULE,
6e9624b8 246 .open = cciss_unlocked_open,
ef7822c2 247 .release = cciss_release,
8a6cfeb6 248 .ioctl = do_ioctl,
7c832835 249 .getgeo = cciss_getgeo,
1da177e4 250#ifdef CONFIG_COMPAT
ef7822c2 251 .compat_ioctl = cciss_compat_ioctl,
1da177e4 252#endif
7c832835 253 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 254};
255
5e216153
MM		 256/* set_performant_mode: Modify the tag for cciss performant
257 * set bit 0 for pull model, bits 3-1 for block fetch
258 * register number
259 */
260static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
261{
262 if (likely(h->transMethod == CFGTBL_Trans_Performant))
263 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
264}
265
1da177e4
LT		 266/*
267 * Enqueuing and dequeuing functions for cmdlists.
268 */
8a3173de 269static inline void addQ(struct hlist_head *list, CommandList_struct *c)
1da177e4 270{
8a3173de 271 hlist_add_head(&c->list, list);
1da177e4
LT		 272}
273
8a3173de 274static inline void removeQ(CommandList_struct *c)
1da177e4 275{
b59e64d0
HR		 276 /*
277 * After kexec/dump some commands might still
278 * be in flight, which the firmware will try
279 * to complete. Resetting the firmware doesn't work
280 * with old fw revisions, so we have to mark
281 * them off as 'stale' to prevent the driver from
282 * falling over.
283 */
284 if (WARN_ON(hlist_unhashed(&c->list))) {
285 c->cmd_type = CMD_MSG_STALE;
8a3173de 286 return;
b59e64d0 287 }
8a3173de
JA		 288
289 hlist_del_init(&c->list);
1da177e4
LT		 290}
291
664a717d
MM		 292static void enqueue_cmd_and_start_io(ctlr_info_t *h,
293 CommandList_struct *c)
294{
295 unsigned long flags;
5e216153 296 set_performant_mode(h, c);
664a717d
MM		 297 spin_lock_irqsave(&h->lock, flags);
298 addQ(&h->reqQ, c);
299 h->Qdepth++;
300 start_io(h);
301 spin_unlock_irqrestore(&h->lock, flags);
302}
303
dccc9b56 304static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 305 int nr_cmds)
306{
307 int i;
308
309 if (!cmd_sg_list)
310 return;
311 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 312 kfree(cmd_sg_list[i]);
313 cmd_sg_list[i] = NULL;
49fc5601
SC		 314 }
315 kfree(cmd_sg_list);
316}
317
dccc9b56
SC		 318static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
319 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 320{
321 int j;
dccc9b56 322 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 323
324 if (chainsize <= 0)
325 return NULL;
326
327 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
328 if (!cmd_sg_list)
329 return NULL;
330
331 /* Build up chain blocks for each command */
332 for (j = 0; j < nr_cmds; j++) {
49fc5601 333 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 334 cmd_sg_list[j] = kmalloc((chainsize *
335 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
336 if (!cmd_sg_list[j]) {
49fc5601
SC		 337 dev_err(&h->pdev->dev, "Cannot get memory "
338 "for s/g chains.\n");
339 goto clean;
340 }
341 }
342 return cmd_sg_list;
343clean:
344 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
345 return NULL;
346}
347
d45033ef
SC		 348static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
349{
350 SGDescriptor_struct *chain_sg;
351 u64bit temp64;
352
353 if (c->Header.SGTotal <= h->max_cmd_sgentries)
354 return;
355
356 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
357 temp64.val32.lower = chain_sg->Addr.lower;
358 temp64.val32.upper = chain_sg->Addr.upper;
359 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
360}
361
362static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
363 SGDescriptor_struct *chain_block, int len)
364{
365 SGDescriptor_struct *chain_sg;
366 u64bit temp64;
367
368 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
369 chain_sg->Ext = CCISS_SG_CHAIN;
370 chain_sg->Len = len;
371 temp64.val = pci_map_single(h->pdev, chain_block, len,
372 PCI_DMA_TODEVICE);
373 chain_sg->Addr.lower = temp64.val32.lower;
374 chain_sg->Addr.upper = temp64.val32.upper;
375}
376
1da177e4
LT		 377#include "cciss_scsi.c" /* For SCSI tape support */
378
1e6f2dc1
AB		 379static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
380 "UNKNOWN"
381};
0e4a9d03 382#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 383
1da177e4
LT		 384#ifdef CONFIG_PROC_FS
385
386/*
387 * Report information about this controller.
388 */
389#define ENG_GIG 1000000000
390#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 391#define ENGAGE_SCSI "engage scsi"
1da177e4
LT		 392
393static struct proc_dir_entry *proc_cciss;
394
89b6e743 395static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 396{
89b6e743
MM		 397 ctlr_info_t *h = seq->private;
398
399 seq_printf(seq, "%s: HP %s Controller\n"
400 "Board ID: 0x%08lx\n"
401 "Firmware Version: %c%c%c%c\n"
402 "IRQ: %d\n"
403 "Logical drives: %d\n"
404 "Current Q depth: %d\n"
405 "Current # commands on controller: %d\n"
406 "Max Q depth since init: %d\n"
407 "Max # commands on controller since init: %d\n"
408 "Max SG entries since init: %d\n",
409 h->devname,
410 h->product_name,
411 (unsigned long)h->board_id,
412 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 413 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM		 414 h->num_luns,
415 h->Qdepth, h->commands_outstanding,
416 h->maxQsinceinit, h->max_outstanding, h->maxSG);
417
418#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 419 cciss_seq_tape_report(seq, h);
89b6e743
MM		 420#endif /* CONFIG_CISS_SCSI_TAPE */
421}
1da177e4 422
89b6e743
MM		 423static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
424{
425 ctlr_info_t *h = seq->private;
89b6e743 426 unsigned long flags;
1da177e4
LT		 427
428 /* prevent displaying bogus info during configuration
429 * or deconfiguration of a logical volume
430 */
f70dba83 431 spin_lock_irqsave(&h->lock, flags);
1da177e4 432 if (h->busy_configuring) {
f70dba83 433 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 434 return ERR_PTR(-EBUSY);
1da177e4
LT		 435 }
436 h->busy_configuring = 1;
f70dba83 437 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 438
89b6e743
MM		 439 if (*pos == 0)
440 cciss_seq_show_header(seq);
441
442 return pos;
443}
444
445static int cciss_seq_show(struct seq_file *seq, void *v)
446{
447 sector_t vol_sz, vol_sz_frac;
448 ctlr_info_t *h = seq->private;
449 unsigned ctlr = h->ctlr;
450 loff_t *pos = v;
9cef0d2f 451 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 452
453 if (*pos > h->highest_lun)
454 return 0;
455
531c2dc7
SC		 456 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
457 return 0;
458
89b6e743
MM		 459 if (drv->heads == 0)
460 return 0;
461
462 vol_sz = drv->nr_blocks;
463 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
464 vol_sz_frac *= 100;
465 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
466
fa52bec9 467 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 468 drv->raid_level = RAID_UNKNOWN;
469 seq_printf(seq, "cciss/c%dd%d:"
470 "\t%4u.%02uGB\tRAID %s\n",
471 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
472 raid_label[drv->raid_level]);
473 return 0;
474}
475
476static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
477{
478 ctlr_info_t *h = seq->private;
479
480 if (*pos > h->highest_lun)
481 return NULL;
482 *pos += 1;
483
484 return pos;
485}
486
487static void cciss_seq_stop(struct seq_file *seq, void *v)
488{
489 ctlr_info_t *h = seq->private;
490
491 /* Only reset h->busy_configuring if we succeeded in setting
492 * it during cciss_seq_start. */
493 if (v == ERR_PTR(-EBUSY))
494 return;
7c832835 495
1da177e4 496 h->busy_configuring = 0;
1da177e4
LT		 497}
498
88e9d34c 499static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 500 .start = cciss_seq_start,
501 .show = cciss_seq_show,
502 .next = cciss_seq_next,
503 .stop = cciss_seq_stop,
504};
505
506static int cciss_seq_open(struct inode *inode, struct file *file)
507{
508 int ret = seq_open(file, &cciss_seq_ops);
509 struct seq_file *seq = file->private_data;
510
511 if (!ret)
512 seq->private = PDE(inode)->data;
513
514 return ret;
515}
516
517static ssize_t
518cciss_proc_write(struct file *file, const char __user *buf,
519 size_t length, loff_t *ppos)
1da177e4 520{
89b6e743
MM		 521 int err;
522 char *buffer;
523
524#ifndef CONFIG_CISS_SCSI_TAPE
525 return -EINVAL;
1da177e4
LT		 526#endif
527
89b6e743 528 if (!buf || length > PAGE_SIZE - 1)
7c832835 529 return -EINVAL;
89b6e743
MM		 530
531 buffer = (char *)__get_free_page(GFP_KERNEL);
532 if (!buffer)
533 return -ENOMEM;
534
535 err = -EFAULT;
536 if (copy_from_user(buffer, buf, length))
537 goto out;
538 buffer[length] = '\0';
539
540#ifdef CONFIG_CISS_SCSI_TAPE
541 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
542 struct seq_file *seq = file->private_data;
543 ctlr_info_t *h = seq->private;
89b6e743 544
f70dba83 545 err = cciss_engage_scsi(h);
8721c81f 546 if (err == 0)
89b6e743
MM		 547 err = length;
548 } else
549#endif /* CONFIG_CISS_SCSI_TAPE */
550 err = -EINVAL;
7c832835
BH		 551 /* might be nice to have "disengage" too, but it's not
552 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 553
554out:
555 free_page((unsigned long)buffer);
556 return err;
1da177e4
LT		 557}
558
828c0950 559static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 560 .owner = THIS_MODULE,
561 .open = cciss_seq_open,
562 .read = seq_read,
563 .llseek = seq_lseek,
564 .release = seq_release,
565 .write = cciss_proc_write,
566};
567
f70dba83 568static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 569{
570 struct proc_dir_entry *pde;
571
89b6e743 572 if (proc_cciss == NULL)
928b4d8c 573 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 574 if (!proc_cciss)
575 return;
f70dba83 576 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 577 S_IROTH, proc_cciss,
f70dba83 578 &cciss_proc_fops, h);
1da177e4 579}
7c832835 580#endif /* CONFIG_PROC_FS */
1da177e4 581
7fe06326
AP		 582#define MAX_PRODUCT_NAME_LEN 19
583
584#define to_hba(n) container_of(n, struct ctlr_info, dev)
585#define to_drv(n) container_of(n, drive_info_struct, dev)
586
d6f4965d
AP		 587static ssize_t host_store_rescan(struct device *dev,
588 struct device_attribute *attr,
589 const char *buf, size_t count)
590{
591 struct ctlr_info *h = to_hba(dev);
592
593 add_to_scan_list(h);
594 wake_up_process(cciss_scan_thread);
595 wait_for_completion_interruptible(&h->scan_wait);
596
597 return count;
598}
8ba95c69 599static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 600
601static ssize_t dev_show_unique_id(struct device *dev,
602 struct device_attribute *attr,
603 char *buf)
604{
605 drive_info_struct *drv = to_drv(dev);
606 struct ctlr_info *h = to_hba(drv->dev.parent);
607 __u8 sn[16];
608 unsigned long flags;
609 int ret = 0;
610
f70dba83 611 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 612 if (h->busy_configuring)
613 ret = -EBUSY;
614 else
615 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 616 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 617
618 if (ret)
619 return ret;
620 else
621 return snprintf(buf, 16 * 2 + 2,
622 "%02X%02X%02X%02X%02X%02X%02X%02X"
623 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
624 sn[0], sn[1], sn[2], sn[3],
625 sn[4], sn[5], sn[6], sn[7],
626 sn[8], sn[9], sn[10], sn[11],
627 sn[12], sn[13], sn[14], sn[15]);
628}
8ba95c69 629static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 630
631static ssize_t dev_show_vendor(struct device *dev,
632 struct device_attribute *attr,
633 char *buf)
634{
635 drive_info_struct *drv = to_drv(dev);
636 struct ctlr_info *h = to_hba(drv->dev.parent);
637 char vendor[VENDOR_LEN + 1];
638 unsigned long flags;
639 int ret = 0;
640
f70dba83 641 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 642 if (h->busy_configuring)
643 ret = -EBUSY;
644 else
645 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 646 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 647
648 if (ret)
649 return ret;
650 else
651 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
652}
8ba95c69 653static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 654
655static ssize_t dev_show_model(struct device *dev,
656 struct device_attribute *attr,
657 char *buf)
658{
659 drive_info_struct *drv = to_drv(dev);
660 struct ctlr_info *h = to_hba(drv->dev.parent);
661 char model[MODEL_LEN + 1];
662 unsigned long flags;
663 int ret = 0;
664
f70dba83 665 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 666 if (h->busy_configuring)
667 ret = -EBUSY;
668 else
669 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 670 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 671
672 if (ret)
673 return ret;
674 else
675 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
676}
8ba95c69 677static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 678
679static ssize_t dev_show_rev(struct device *dev,
680 struct device_attribute *attr,
681 char *buf)
682{
683 drive_info_struct *drv = to_drv(dev);
684 struct ctlr_info *h = to_hba(drv->dev.parent);
685 char rev[REV_LEN + 1];
686 unsigned long flags;
687 int ret = 0;
688
f70dba83 689 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 690 if (h->busy_configuring)
691 ret = -EBUSY;
692 else
693 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 694 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 695
696 if (ret)
697 return ret;
698 else
699 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
700}
8ba95c69 701static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 702
ce84a8ae
SC		 703static ssize_t cciss_show_lunid(struct device *dev,
704 struct device_attribute *attr, char *buf)
705{
9cef0d2f
SC		 706 drive_info_struct *drv = to_drv(dev);
707 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 708 unsigned long flags;
709 unsigned char lunid[8];
710
f70dba83 711 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 712 if (h->busy_configuring) {
f70dba83 713 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 714 return -EBUSY;
715 }
716 if (!drv->heads) {
f70dba83 717 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 718 return -ENOTTY;
719 }
720 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 721 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 722 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
723 lunid[0], lunid[1], lunid[2], lunid[3],
724 lunid[4], lunid[5], lunid[6], lunid[7]);
725}
8ba95c69 726static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 727
3ff1111d
SC		 728static ssize_t cciss_show_raid_level(struct device *dev,
729 struct device_attribute *attr, char *buf)
730{
9cef0d2f
SC		 731 drive_info_struct *drv = to_drv(dev);
732 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 733 int raid;
734 unsigned long flags;
735
f70dba83 736 spin_lock_irqsave(&h->lock, flags);
3ff1111d 737 if (h->busy_configuring) {
f70dba83 738 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 739 return -EBUSY;
740 }
741 raid = drv->raid_level;
f70dba83 742 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 743 if (raid < 0 || raid > RAID_UNKNOWN)
744 raid = RAID_UNKNOWN;
745
746 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
747 raid_label[raid]);
748}
8ba95c69 749static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 750
e272afec
SC		 751static ssize_t cciss_show_usage_count(struct device *dev,
752 struct device_attribute *attr, char *buf)
753{
9cef0d2f
SC		 754 drive_info_struct *drv = to_drv(dev);
755 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 756 unsigned long flags;
757 int count;
758
f70dba83 759 spin_lock_irqsave(&h->lock, flags);
e272afec 760 if (h->busy_configuring) {
f70dba83 761 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 762 return -EBUSY;
763 }
764 count = drv->usage_count;
f70dba83 765 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 766 return snprintf(buf, 20, "%d\n", count);
767}
8ba95c69 768static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 769
d6f4965d
AP		 770static struct attribute *cciss_host_attrs[] = {
771 &dev_attr_rescan.attr,
772 NULL
773};
774
775static struct attribute_group cciss_host_attr_group = {
776 .attrs = cciss_host_attrs,
777};
778
9f792d9f 779static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 780 &cciss_host_attr_group,
781 NULL
782};
783
784static struct device_type cciss_host_type = {
785 .name = "cciss_host",
786 .groups = cciss_host_attr_groups,
617e1344 787 .release = cciss_hba_release,
d6f4965d
AP		 788};
789
7fe06326
AP		 790static struct attribute *cciss_dev_attrs[] = {
791 &dev_attr_unique_id.attr,
792 &dev_attr_model.attr,
793 &dev_attr_vendor.attr,
794 &dev_attr_rev.attr,
ce84a8ae 795 &dev_attr_lunid.attr,
3ff1111d 796 &dev_attr_raid_level.attr,
e272afec 797 &dev_attr_usage_count.attr,
7fe06326
AP		 798 NULL
799};
800
801static struct attribute_group cciss_dev_attr_group = {
802 .attrs = cciss_dev_attrs,
803};
804
a4dbd674 805static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 806 &cciss_dev_attr_group,
807 NULL
808};
809
810static struct device_type cciss_dev_type = {
811 .name = "cciss_device",
812 .groups = cciss_dev_attr_groups,
617e1344 813 .release = cciss_device_release,
7fe06326
AP		 814};
815
816static struct bus_type cciss_bus_type = {
817 .name = "cciss",
818};
819
617e1344
SC		 820/*
821 * cciss_hba_release is called when the reference count
822 * of h->dev goes to zero.
823 */
824static void cciss_hba_release(struct device *dev)
825{
826 /*
827 * nothing to do, but need this to avoid a warning
828 * about not having a release handler from lib/kref.c.
829 */
830}
7fe06326
AP		 831
832/*
833 * Initialize sysfs entry for each controller. This sets up and registers
834 * the 'cciss#' directory for each individual controller under
835 * /sys/bus/pci/devices/<dev>/.
836 */
837static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
838{
839 device_initialize(&h->dev);
840 h->dev.type = &cciss_host_type;
841 h->dev.bus = &cciss_bus_type;
842 dev_set_name(&h->dev, "%s", h->devname);
843 h->dev.parent = &h->pdev->dev;
844
845 return device_add(&h->dev);
846}
847
848/*
849 * Remove sysfs entries for an hba.
850 */
851static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
852{
853 device_del(&h->dev);
617e1344
SC		 854 put_device(&h->dev); /* final put. */
855}
856
857/* cciss_device_release is called when the reference count
9cef0d2f 858 * of h->drv[x]dev goes to zero.
617e1344
SC		 859 */
860static void cciss_device_release(struct device *dev)
861{
9cef0d2f
SC		 862 drive_info_struct *drv = to_drv(dev);
863 kfree(drv);
7fe06326
AP		 864}
865
866/*
867 * Initialize sysfs for each logical drive. This sets up and registers
868 * the 'c#d#' directory for each individual logical drive under
869 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
870 * /sys/block/cciss!c#d# to this entry.
871 */
617e1344 872static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 873 int drv_index)
874{
617e1344
SC		 875 struct device *dev;
876
9cef0d2f 877 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 878 return 0;
879
9cef0d2f 880 dev = &h->drv[drv_index]->dev;
617e1344
SC		 881 device_initialize(dev);
882 dev->type = &cciss_dev_type;
883 dev->bus = &cciss_bus_type;
884 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
885 dev->parent = &h->dev;
9cef0d2f 886 h->drv[drv_index]->device_initialized = 1;
617e1344 887 return device_add(dev);
7fe06326
AP		 888}
889
890/*
891 * Remove sysfs entries for a logical drive.
892 */
8ce51966
SC		 893static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
894 int ctlr_exiting)
7fe06326 895{
9cef0d2f 896 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 897
898 /* special case for c*d0, we only destroy it on controller exit */
899 if (drv_index == 0 && !ctlr_exiting)
900 return;
901
617e1344
SC		 902 device_del(dev);
903 put_device(dev); /* the "final" put. */
9cef0d2f 904 h->drv[drv_index] = NULL;
7fe06326
AP		 905}
906
7c832835
BH		 907/*
908 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 909 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 910 * which ones are free or in use.
7c832835 911 */
6b4d96b8 912static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 913{
914 CommandList_struct *c;
7c832835 915 int i;
1da177e4
LT		 916 u64bit temp64;
917 dma_addr_t cmd_dma_handle, err_dma_handle;
918
6b4d96b8
SC		 919 do {
920 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
921 if (i == h->nr_cmds)
7c832835 922 return NULL;
6b4d96b8
SC		 923 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
924 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 925 c = h->cmd_pool + i;
926 memset(c, 0, sizeof(CommandList_struct));
927 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
928 c->err_info = h->errinfo_pool + i;
929 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
930 err_dma_handle = h->errinfo_pool_dhandle
931 + i * sizeof(ErrorInfo_struct);
932 h->nr_allocs++;
1da177e4 933
6b4d96b8 934 c->cmdindex = i;
33079b21 935
6b4d96b8
SC		 936 INIT_HLIST_NODE(&c->list);
937 c->busaddr = (__u32) cmd_dma_handle;
938 temp64.val = (__u64) err_dma_handle;
939 c->ErrDesc.Addr.lower = temp64.val32.lower;
940 c->ErrDesc.Addr.upper = temp64.val32.upper;
941 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 942
6b4d96b8
SC		 943 c->ctlr = h->ctlr;
944 return c;
945}
33079b21 946
6b4d96b8
SC		 947/* allocate a command using pci_alloc_consistent, used for ioctls,
948 * etc., not for the main i/o path.
949 */
950static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
951{
952 CommandList_struct *c;
953 u64bit temp64;
954 dma_addr_t cmd_dma_handle, err_dma_handle;
955
956 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
957 sizeof(CommandList_struct), &cmd_dma_handle);
958 if (c == NULL)
959 return NULL;
960 memset(c, 0, sizeof(CommandList_struct));
961
962 c->cmdindex = -1;
963
964 c->err_info = (ErrorInfo_struct *)
965 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
966 &err_dma_handle);
967
968 if (c->err_info == NULL) {
969 pci_free_consistent(h->pdev,
970 sizeof(CommandList_struct), c, cmd_dma_handle);
971 return NULL;
7c832835 972 }
6b4d96b8 973 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 974
8a3173de 975 INIT_HLIST_NODE(&c->list);
1da177e4 976 c->busaddr = (__u32) cmd_dma_handle;
7c832835 977 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 978 c->ErrDesc.Addr.lower = temp64.val32.lower;
979 c->ErrDesc.Addr.upper = temp64.val32.upper;
980 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 981
7c832835
BH		 982 c->ctlr = h->ctlr;
983 return c;
1da177e4
LT		 984}
985
6b4d96b8 986static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 987{
988 int i;
6b4d96b8
SC		 989
990 i = c - h->cmd_pool;
991 clear_bit(i & (BITS_PER_LONG - 1),
992 h->cmd_pool_bits + (i / BITS_PER_LONG));
993 h->nr_frees++;
994}
995
996static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
997{
1da177e4
LT		 998 u64bit temp64;
999
6b4d96b8
SC		 1000 temp64.val32.lower = c->ErrDesc.Addr.lower;
1001 temp64.val32.upper = c->ErrDesc.Addr.upper;
1002 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1003 c->err_info, (dma_addr_t) temp64.val);
1004 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
1005 c, (dma_addr_t) c->busaddr);
1da177e4
LT		 1006}
1007
1008static inline ctlr_info_t *get_host(struct gendisk *disk)
1009{
7c832835 1010 return disk->queue->queuedata;
1da177e4
LT		 1011}
1012
1013static inline drive_info_struct *get_drv(struct gendisk *disk)
1014{
1015 return disk->private_data;
1016}
1017
1018/*
1019 * Open. Make sure the device is really there.
1020 */
ef7822c2 1021static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1022{
f70dba83 1023 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1024 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1025
b2a4a43d 1026 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1027 if (drv->busy_configuring)
ddd47442 1028 return -EBUSY;
1da177e4
LT		 1029 /*
1030 * Root is allowed to open raw volume zero even if it's not configured
1031 * so array config can still work. Root is also allowed to open any
1032 * volume that has a LUN ID, so it can issue IOCTL to reread the
1033 * disk information. I don't think I really like this
1034 * but I'm already using way to many device nodes to claim another one
1035 * for "raw controller".
1036 */
7a06f789 1037 if (drv->heads == 0) {
ef7822c2 1038 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1039 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1040 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1041 return -ENXIO;
1da177e4 1042 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1043 } else if (memcmp(drv->LunID, CTLR_LUNID,
1044 sizeof(drv->LunID))) {
1da177e4
LT		 1045 return -ENXIO;
1046 }
1047 }
1048 if (!capable(CAP_SYS_ADMIN))
1049 return -EPERM;
1050 }
1051 drv->usage_count++;
f70dba83 1052 h->usage_count++;
1da177e4
LT		 1053 return 0;
1054}
7c832835 1055
6e9624b8
AB		 1056static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1057{
1058 int ret;
1059
1060 lock_kernel();
1061 ret = cciss_open(bdev, mode);
1062 unlock_kernel();
1063
1064 return ret;
1065}
1066
1da177e4
LT		 1067/*
1068 * Close. Sync first.
1069 */
ef7822c2 1070static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1071{
f70dba83 1072 ctlr_info_t *h;
6e9624b8 1073 drive_info_struct *drv;
1da177e4 1074
6e9624b8 1075 lock_kernel();
f70dba83 1076 h = get_host(disk);
6e9624b8 1077 drv = get_drv(disk);
b2a4a43d 1078 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1079 drv->usage_count--;
f70dba83 1080 h->usage_count--;
6e9624b8 1081 unlock_kernel();
1da177e4
LT		 1082 return 0;
1083}
1084
ef7822c2
AV		 1085static int do_ioctl(struct block_device *bdev, fmode_t mode,
1086 unsigned cmd, unsigned long arg)
1da177e4
LT		 1087{
1088 int ret;
1089 lock_kernel();
ef7822c2 1090 ret = cciss_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1091 unlock_kernel();
1092 return ret;
1093}
1094
8a6cfeb6
AB		 1095#ifdef CONFIG_COMPAT
1096
ef7822c2
AV		 1097static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1098 unsigned cmd, unsigned long arg);
1099static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1100 unsigned cmd, unsigned long arg);
1da177e4 1101
ef7822c2
AV		 1102static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1103 unsigned cmd, unsigned long arg)
1da177e4
LT		 1104{
1105 switch (cmd) {
1106 case CCISS_GETPCIINFO:
1107 case CCISS_GETINTINFO:
1108 case CCISS_SETINTINFO:
1109 case CCISS_GETNODENAME:
1110 case CCISS_SETNODENAME:
1111 case CCISS_GETHEARTBEAT:
1112 case CCISS_GETBUSTYPES:
1113 case CCISS_GETFIRMVER:
1114 case CCISS_GETDRIVVER:
1115 case CCISS_REVALIDVOLS:
1116 case CCISS_DEREGDISK:
1117 case CCISS_REGNEWDISK:
1118 case CCISS_REGNEWD:
1119 case CCISS_RESCANDISK:
1120 case CCISS_GETLUNINFO:
ef7822c2 1121 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1122
1123 case CCISS_PASSTHRU32:
ef7822c2 1124 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1125 case CCISS_BIG_PASSTHRU32:
ef7822c2 1126 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1127
1128 default:
1129 return -ENOIOCTLCMD;
1130 }
1131}
1132
ef7822c2
AV		 1133static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1134 unsigned cmd, unsigned long arg)
1da177e4
LT		 1135{
1136 IOCTL32_Command_struct __user *arg32 =
7c832835 1137 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1138 IOCTL_Command_struct arg64;
1139 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1140 int err;
1141 u32 cp;
1142
1143 err = 0;
7c832835
BH		 1144 err |=
1145 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1146 sizeof(arg64.LUN_info));
1147 err |=
1148 copy_from_user(&arg64.Request, &arg32->Request,
1149 sizeof(arg64.Request));
1150 err |=
1151 copy_from_user(&arg64.error_info, &arg32->error_info,
1152 sizeof(arg64.error_info));
1da177e4
LT		 1153 err |= get_user(arg64.buf_size, &arg32->buf_size);
1154 err |= get_user(cp, &arg32->buf);
1155 arg64.buf = compat_ptr(cp);
1156 err |= copy_to_user(p, &arg64, sizeof(arg64));
1157
1158 if (err)
1159 return -EFAULT;
1160
ef7822c2 1161 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1162 if (err)
1163 return err;
7c832835
BH		 1164 err |=
1165 copy_in_user(&arg32->error_info, &p->error_info,
1166 sizeof(arg32->error_info));
1da177e4
LT		 1167 if (err)
1168 return -EFAULT;
1169 return err;
1170}
1171
ef7822c2
AV		 1172static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1173 unsigned cmd, unsigned long arg)
1da177e4
LT		 1174{
1175 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1176 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1177 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1178 BIG_IOCTL_Command_struct __user *p =
1179 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1180 int err;
1181 u32 cp;
1182
1183 err = 0;
7c832835
BH		 1184 err |=
1185 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1186 sizeof(arg64.LUN_info));
1187 err |=
1188 copy_from_user(&arg64.Request, &arg32->Request,
1189 sizeof(arg64.Request));
1190 err |=
1191 copy_from_user(&arg64.error_info, &arg32->error_info,
1192 sizeof(arg64.error_info));
1da177e4
LT		 1193 err |= get_user(arg64.buf_size, &arg32->buf_size);
1194 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1195 err |= get_user(cp, &arg32->buf);
1196 arg64.buf = compat_ptr(cp);
1197 err |= copy_to_user(p, &arg64, sizeof(arg64));
1198
1199 if (err)
7c832835 1200 return -EFAULT;
1da177e4 1201
ef7822c2 1202 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1203 if (err)
1204 return err;
7c832835
BH		 1205 err |=
1206 copy_in_user(&arg32->error_info, &p->error_info,
1207 sizeof(arg32->error_info));
1da177e4
LT		 1208 if (err)
1209 return -EFAULT;
1210 return err;
1211}
1212#endif
a885c8c4
CH		 1213
1214static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1215{
1216 drive_info_struct *drv = get_drv(bdev->bd_disk);
1217
1218 if (!drv->cylinders)
1219 return -ENXIO;
1220
1221 geo->heads = drv->heads;
1222 geo->sectors = drv->sectors;
1223 geo->cylinders = drv->cylinders;
1224 return 0;
1225}
1226
f70dba83 1227static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1228{
1229 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1230 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1231 (void)check_for_unit_attention(h, c);
0a9279cc 1232}
0a25a5ae
SC		 1233
1234static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1235{
1236 cciss_pci_info_struct pciinfo;
1237
1238 if (!argp)
1239 return -EINVAL;
1240 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1241 pciinfo.bus = h->pdev->bus->number;
1242 pciinfo.dev_fn = h->pdev->devfn;
1243 pciinfo.board_id = h->board_id;
1244 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1245 return -EFAULT;
1246 return 0;
1247}
1248
ef7822c2 1249static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 1250 unsigned int cmd, unsigned long arg)
1da177e4 1251{
1da177e4 1252 struct gendisk *disk = bdev->bd_disk;
f70dba83 1253 ctlr_info_t *h = get_host(disk);
1da177e4 1254 drive_info_struct *drv = get_drv(disk);
1da177e4
LT		 1255 void __user *argp = (void __user *)arg;
1256
b2a4a43d
SC		 1257 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1258 cmd, arg);
7c832835 1259 switch (cmd) {
1da177e4 1260 case CCISS_GETPCIINFO:
0a25a5ae 1261 return cciss_getpciinfo(h, argp);
1da177e4 1262 case CCISS_GETINTINFO:
7c832835
BH		 1263 {
1264 cciss_coalint_struct intinfo;
1265 if (!arg)
1266 return -EINVAL;
1267 intinfo.delay =
f70dba83 1268 readl(&h->cfgtable->HostWrite.CoalIntDelay);
7c832835 1269 intinfo.count =
f70dba83 1270 readl(&h->cfgtable->HostWrite.CoalIntCount);
7c832835
BH		 1271 if (copy_to_user
1272 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1273 return -EFAULT;
1274 return 0;
1275 }
1da177e4 1276 case CCISS_SETINTINFO:
1da177e4 1277 {
7c832835
BH		 1278 cciss_coalint_struct intinfo;
1279 unsigned long flags;
1280 int i;
1281
1282 if (!arg)
1283 return -EINVAL;
1284 if (!capable(CAP_SYS_ADMIN))
1285 return -EPERM;
1286 if (copy_from_user
1287 (&intinfo, argp, sizeof(cciss_coalint_struct)))
1288 return -EFAULT;
1289 if ((intinfo.delay == 0) && (intinfo.count == 0))
7c832835 1290 return -EINVAL;
f70dba83 1291 spin_lock_irqsave(&h->lock, flags);
7c832835
BH		 1292 /* Update the field, and then ring the doorbell */
1293 writel(intinfo.delay,
f70dba83 1294 &(h->cfgtable->HostWrite.CoalIntDelay));
7c832835 1295 writel(intinfo.count,
f70dba83
SC		 1296 &(h->cfgtable->HostWrite.CoalIntCount));
1297 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7c832835
BH		 1298
1299 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
f70dba83 1300 if (!(readl(h->vaddr + SA5_DOORBELL)
7c832835
BH		 1301 & CFGTBL_ChangeReq))
1302 break;
1303 /* delay and try again */
1304 udelay(1000);
1305 }
f70dba83 1306 spin_unlock_irqrestore(&h->lock, flags);
7c832835
BH		 1307 if (i >= MAX_IOCTL_CONFIG_WAIT)
1308 return -EAGAIN;
1309 return 0;
1da177e4 1310 }
1da177e4 1311 case CCISS_GETNODENAME:
7c832835
BH		 1312 {
1313 NodeName_type NodeName;
1314 int i;
1315
1316 if (!arg)
1317 return -EINVAL;
1318 for (i = 0; i < 16; i++)
1319 NodeName[i] =
f70dba83 1320 readb(&h->cfgtable->ServerName[i]);
7c832835
BH		 1321 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1322 return -EFAULT;
1323 return 0;
1324 }
1da177e4 1325 case CCISS_SETNODENAME:
7c832835
BH		 1326 {
1327 NodeName_type NodeName;
1328 unsigned long flags;
1329 int i;
1330
1331 if (!arg)
1332 return -EINVAL;
1333 if (!capable(CAP_SYS_ADMIN))
1334 return -EPERM;
1335
1336 if (copy_from_user
1337 (NodeName, argp, sizeof(NodeName_type)))
1338 return -EFAULT;
1339
f70dba83 1340 spin_lock_irqsave(&h->lock, flags);
7c832835
BH		 1341
1342 /* Update the field, and then ring the doorbell */
1343 for (i = 0; i < 16; i++)
1344 writeb(NodeName[i],
f70dba83 1345 &h->cfgtable->ServerName[i]);
7c832835 1346
f70dba83 1347 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7c832835
BH		 1348
1349 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
f70dba83 1350 if (!(readl(h->vaddr + SA5_DOORBELL)
7c832835
BH		 1351 & CFGTBL_ChangeReq))
1352 break;
1353 /* delay and try again */
1354 udelay(1000);
1355 }
f70dba83 1356 spin_unlock_irqrestore(&h->lock, flags);
7c832835
BH		 1357 if (i >= MAX_IOCTL_CONFIG_WAIT)
1358 return -EAGAIN;
1359 return 0;
1360 }
1da177e4
LT		 1361
1362 case CCISS_GETHEARTBEAT:
7c832835
BH		 1363 {
1364 Heartbeat_type heartbeat;
1365
1366 if (!arg)
1367 return -EINVAL;
f70dba83 1368 heartbeat = readl(&h->cfgtable->HeartBeat);
7c832835
BH		 1369 if (copy_to_user
1370 (argp, &heartbeat, sizeof(Heartbeat_type)))
1371 return -EFAULT;
1372 return 0;
1373 }
1da177e4 1374 case CCISS_GETBUSTYPES:
7c832835
BH		 1375 {
1376 BusTypes_type BusTypes;
1377
1378 if (!arg)
1379 return -EINVAL;
f70dba83 1380 BusTypes = readl(&h->cfgtable->BusTypes);
7c832835
BH		 1381 if (copy_to_user
1382 (argp, &BusTypes, sizeof(BusTypes_type)))
1383 return -EFAULT;
1384 return 0;
1385 }
1da177e4 1386 case CCISS_GETFIRMVER:
7c832835
BH		 1387 {
1388 FirmwareVer_type firmware;
1da177e4 1389
7c832835
BH		 1390 if (!arg)
1391 return -EINVAL;
f70dba83 1392 memcpy(firmware, h->firm_ver, 4);
1da177e4 1393
7c832835
BH		 1394 if (copy_to_user
1395 (argp, firmware, sizeof(FirmwareVer_type)))
1396 return -EFAULT;
1397 return 0;
1398 }
1399 case CCISS_GETDRIVVER:
1400 {
1401 DriverVer_type DriverVer = DRIVER_VERSION;
1da177e4 1402
7c832835
BH		 1403 if (!arg)
1404 return -EINVAL;
1da177e4 1405
7c832835
BH		 1406 if (copy_to_user
1407 (argp, &DriverVer, sizeof(DriverVer_type)))
1408 return -EFAULT;
1409 return 0;
1410 }
1da177e4 1411
6ae5ce8e
MM		 1412 case CCISS_DEREGDISK:
1413 case CCISS_REGNEWD:
1da177e4 1414 case CCISS_REVALIDVOLS:
f70dba83 1415 return rebuild_lun_table(h, 0, 1);
7c832835
BH		 1416
1417 case CCISS_GETLUNINFO:{
1418 LogvolInfo_struct luninfo;
1419
39ccf9a6
SC		 1420 memcpy(&luninfo.LunID, drv->LunID,
1421 sizeof(luninfo.LunID));
7c832835
BH		 1422 luninfo.num_opens = drv->usage_count;
1423 luninfo.num_parts = 0;
1424 if (copy_to_user(argp, &luninfo,
1425 sizeof(LogvolInfo_struct)))
1426 return -EFAULT;
1427 return 0;
1428 }
1da177e4 1429 case CCISS_PASSTHRU:
1da177e4 1430 {
7c832835
BH		 1431 IOCTL_Command_struct iocommand;
1432 CommandList_struct *c;
1433 char *buff = NULL;
1434 u64bit temp64;
6e9a4738 1435 DECLARE_COMPLETION_ONSTACK(wait);
1da177e4 1436
7c832835
BH		 1437 if (!arg)
1438 return -EINVAL;
1da177e4 1439
7c832835
BH		 1440 if (!capable(CAP_SYS_RAWIO))
1441 return -EPERM;
1da177e4 1442
7c832835
BH		 1443 if (copy_from_user
1444 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1445 return -EFAULT;
1446 if ((iocommand.buf_size < 1) &&
1447 (iocommand.Request.Type.Direction != XFER_NONE)) {
1448 return -EINVAL;
1449 }
1450#if 0 /* 'buf_size' member is 16-bits, and always smaller than kmalloc limit */
1451 /* Check kmalloc limits */
1452 if (iocommand.buf_size > 128000)
1453 return -EINVAL;
1454#endif
1455 if (iocommand.buf_size > 0) {
1456 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1457 if (buff == NULL)
1458 return -EFAULT;
1459 }
1460 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1461 /* Copy the data into the buffer we created */
1462 if (copy_from_user
1463 (buff, iocommand.buf, iocommand.buf_size)) {
1464 kfree(buff);
1465 return -EFAULT;
1466 }
1467 } else {
1468 memset(buff, 0, iocommand.buf_size);
1469 }
6b4d96b8 1470 c = cmd_special_alloc(h);
f70dba83 1471 if (!c) {
7c832835
BH		 1472 kfree(buff);
1473 return -ENOMEM;
1474 }
b028461d 1475 /* Fill in the command type */
7c832835 1476 c->cmd_type = CMD_IOCTL_PEND;
b028461d 1477 /* Fill in Command Header */
1478 c->Header.ReplyQueue = 0; /* unused in simple mode */
1479 if (iocommand.buf_size > 0) /* buffer to fill */
7c832835
BH		 1480 {
1481 c->Header.SGList = 1;
1482 c->Header.SGTotal = 1;
b028461d 1483 } else /* no buffers to fill */
7c832835
BH		 1484 {
1485 c->Header.SGList = 0;
1486 c->Header.SGTotal = 0;
1487 }
1488 c->Header.LUN = iocommand.LUN_info;
b028461d 1489 /* use the kernel address the cmd block for tag */
1490 c->Header.Tag.lower = c->busaddr;
1da177e4 1491
b028461d 1492 /* Fill in Request block */
7c832835 1493 c->Request = iocommand.Request;
1da177e4 1494
b028461d 1495 /* Fill in the scatter gather information */
7c832835 1496 if (iocommand.buf_size > 0) {
f70dba83 1497 temp64.val = pci_map_single(h->pdev, buff,
7c832835
BH		 1498 iocommand.buf_size,
1499 PCI_DMA_BIDIRECTIONAL);
1500 c->SG[0].Addr.lower = temp64.val32.lower;
1501 c->SG[0].Addr.upper = temp64.val32.upper;
1502 c->SG[0].Len = iocommand.buf_size;
b028461d 1503 c->SG[0].Ext = 0; /* we are not chaining */
7c832835
BH		 1504 }
1505 c->waiting = &wait;
1506
f70dba83 1507 enqueue_cmd_and_start_io(h, c);
7c832835
BH		 1508 wait_for_completion(&wait);
1509
1510 /* unlock the buffers from DMA */
1511 temp64.val32.lower = c->SG[0].Addr.lower;
1512 temp64.val32.upper = c->SG[0].Addr.upper;
f70dba83 1513 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val,
7c832835
BH		 1514 iocommand.buf_size,
1515 PCI_DMA_BIDIRECTIONAL);
1516
f70dba83 1517 check_ioctl_unit_attention(h, c);
0a9279cc 1518
7c832835
BH		 1519 /* Copy the error information out */
1520 iocommand.error_info = *(c->err_info);
1521 if (copy_to_user
1522 (argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1523 kfree(buff);
6b4d96b8 1524 cmd_special_free(h, c);
1da177e4
LT		 1525 return -EFAULT;
1526 }
7c832835
BH		 1527
1528 if (iocommand.Request.Type.Direction == XFER_READ) {
1529 /* Copy the data out of the buffer we created */
1530 if (copy_to_user
1531 (iocommand.buf, buff, iocommand.buf_size)) {
1532 kfree(buff);
6b4d96b8 1533 cmd_special_free(h, c);
7c832835
BH		 1534 return -EFAULT;
1535 }
1536 }
1537 kfree(buff);
6b4d96b8 1538 cmd_special_free(h, c);
7c832835 1539 return 0;
1da177e4 1540 }
7c832835
BH		 1541 case CCISS_BIG_PASSTHRU:{
1542 BIG_IOCTL_Command_struct *ioc;
1543 CommandList_struct *c;
1544 unsigned char **buff = NULL;
1545 int *buff_size = NULL;
1546 u64bit temp64;
7c832835
BH		 1547 BYTE sg_used = 0;
1548 int status = 0;
1549 int i;
6e9a4738 1550 DECLARE_COMPLETION_ONSTACK(wait);
7c832835
BH		 1551 __u32 left;
1552 __u32 sz;
1553 BYTE __user *data_ptr;
1554
1555 if (!arg)
1556 return -EINVAL;
1557 if (!capable(CAP_SYS_RAWIO))
1558 return -EPERM;
1559 ioc = (BIG_IOCTL_Command_struct *)
1560 kmalloc(sizeof(*ioc), GFP_KERNEL);
1561 if (!ioc) {
1562 status = -ENOMEM;
1563 goto cleanup1;
1564 }
1565 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1566 status = -EFAULT;
1567 goto cleanup1;
1568 }
1569 if ((ioc->buf_size < 1) &&
1570 (ioc->Request.Type.Direction != XFER_NONE)) {
1da177e4
LT		 1571 status = -EINVAL;
1572 goto cleanup1;
7c832835
BH		 1573 }
1574 /* Check kmalloc limits using all SGs */
1575 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1576 status = -EINVAL;
1577 goto cleanup1;
1578 }
1579 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1580 status = -EINVAL;
1581 goto cleanup1;
1582 }
1583 buff =
1584 kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1585 if (!buff) {
1da177e4
LT		 1586 status = -ENOMEM;
1587 goto cleanup1;
1588 }
5cbded58 1589 buff_size = kmalloc(MAXSGENTRIES * sizeof(int),
7c832835
BH		 1590 GFP_KERNEL);
1591 if (!buff_size) {
1592 status = -ENOMEM;
1593 goto cleanup1;
1594 }
1595 left = ioc->buf_size;
1596 data_ptr = ioc->buf;
1597 while (left) {
1598 sz = (left >
1599 ioc->malloc_size) ? ioc->
1600 malloc_size : left;
1601 buff_size[sg_used] = sz;
1602 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1603 if (buff[sg_used] == NULL) {
1da177e4 1604 status = -ENOMEM;
15534d38
JA		 1605 goto cleanup1;
1606 }
7c832835
BH		 1607 if (ioc->Request.Type.Direction == XFER_WRITE) {
1608 if (copy_from_user
1609 (buff[sg_used], data_ptr, sz)) {
f7108f91 1610 status = -EFAULT;
7c832835
BH		 1611 goto cleanup1;
1612 }
1613 } else {
1614 memset(buff[sg_used], 0, sz);
1615 }
1616 left -= sz;
1617 data_ptr += sz;
1618 sg_used++;
1619 }
6b4d96b8 1620 c = cmd_special_alloc(h);
f70dba83 1621 if (!c) {
7c832835
BH		 1622 status = -ENOMEM;
1623 goto cleanup1;
1624 }
1625 c->cmd_type = CMD_IOCTL_PEND;
1626 c->Header.ReplyQueue = 0;
1627
1628 if (ioc->buf_size > 0) {
1629 c->Header.SGList = sg_used;
1630 c->Header.SGTotal = sg_used;
1da177e4 1631 } else {
7c832835
BH		 1632 c->Header.SGList = 0;
1633 c->Header.SGTotal = 0;
1da177e4 1634 }
7c832835
BH		 1635 c->Header.LUN = ioc->LUN_info;
1636 c->Header.Tag.lower = c->busaddr;
1637
1638 c->Request = ioc->Request;
1639 if (ioc->buf_size > 0) {
7c832835
BH		 1640 for (i = 0; i < sg_used; i++) {
1641 temp64.val =
f70dba83 1642 pci_map_single(h->pdev, buff[i],
7c832835
BH		 1643 buff_size[i],
1644 PCI_DMA_BIDIRECTIONAL);
1645 c->SG[i].Addr.lower =
1646 temp64.val32.lower;
1647 c->SG[i].Addr.upper =
1648 temp64.val32.upper;
1649 c->SG[i].Len = buff_size[i];
1650 c->SG[i].Ext = 0; /* we are not chaining */
1651 }
1652 }
1653 c->waiting = &wait;
f70dba83 1654 enqueue_cmd_and_start_io(h, c);
7c832835
BH		 1655 wait_for_completion(&wait);
1656 /* unlock the buffers from DMA */
1657 for (i = 0; i < sg_used; i++) {
1658 temp64.val32.lower = c->SG[i].Addr.lower;
1659 temp64.val32.upper = c->SG[i].Addr.upper;
f70dba83 1660 pci_unmap_single(h->pdev,
7c832835 1661 (dma_addr_t) temp64.val, buff_size[i],
1da177e4 1662 PCI_DMA_BIDIRECTIONAL);
1da177e4 1663 }
f70dba83 1664 check_ioctl_unit_attention(h, c);
7c832835
BH		 1665 /* Copy the error information out */
1666 ioc->error_info = *(c->err_info);
1667 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
6b4d96b8 1668 cmd_special_free(h, c);
7c832835
BH		 1669 status = -EFAULT;
1670 goto cleanup1;
1671 }
1672 if (ioc->Request.Type.Direction == XFER_READ) {
1673 /* Copy the data out of the buffer we created */
1674 BYTE __user *ptr = ioc->buf;
1675 for (i = 0; i < sg_used; i++) {
1676 if (copy_to_user
1677 (ptr, buff[i], buff_size[i])) {
6b4d96b8 1678 cmd_special_free(h, c);
7c832835
BH		 1679 status = -EFAULT;
1680 goto cleanup1;
1681 }
1682 ptr += buff_size[i];
1da177e4 1683 }
1da177e4 1684 }
6b4d96b8 1685 cmd_special_free(h, c);
7c832835
BH		 1686 status = 0;
1687 cleanup1:
1688 if (buff) {
1689 for (i = 0; i < sg_used; i++)
1690 kfree(buff[i]);
1691 kfree(buff);
1692 }
1693 kfree(buff_size);
1694 kfree(ioc);
1695 return status;
1da177e4 1696 }
03bbfee5
MMOD		 1697
1698 /* scsi_cmd_ioctl handles these, below, though some are not */
1699 /* very meaningful for cciss. SG_IO is the main one people want. */
1700
1701 case SG_GET_VERSION_NUM:
1702 case SG_SET_TIMEOUT:
1703 case SG_GET_TIMEOUT:
1704 case SG_GET_RESERVED_SIZE:
1705 case SG_SET_RESERVED_SIZE:
1706 case SG_EMULATED_HOST:
1707 case SG_IO:
1708 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1709 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1710
1711 /* scsi_cmd_ioctl would normally handle these, below, but */
1712 /* they aren't a good fit for cciss, as CD-ROMs are */
1713 /* not supported, and we don't have any bus/target/lun */
1714 /* which we present to the kernel. */
1715
1716 case CDROM_SEND_PACKET:
1717 case CDROMCLOSETRAY:
1718 case CDROMEJECT:
1719 case SCSI_IOCTL_GET_IDLUN:
1720 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1721 default:
1722 return -ENOTTY;
1723 }
1da177e4
LT		 1724}
1725
7b30f092
JA		 1726static void cciss_check_queues(ctlr_info_t *h)
1727{
1728 int start_queue = h->next_to_run;
1729 int i;
1730
1731 /* check to see if we have maxed out the number of commands that can
1732 * be placed on the queue. If so then exit. We do this check here
1733 * in case the interrupt we serviced was from an ioctl and did not
1734 * free any new commands.
1735 */
f880632f 1736 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1737 return;
1738
1739 /* We have room on the queue for more commands. Now we need to queue
1740 * them up. We will also keep track of the next queue to run so
1741 * that every queue gets a chance to be started first.
1742 */
1743 for (i = 0; i < h->highest_lun + 1; i++) {
1744 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1745 /* make sure the disk has been added and the drive is real
1746 * because this can be called from the middle of init_one.
1747 */
9cef0d2f
SC		 1748 if (!h->drv[curr_queue])
1749 continue;
1750 if (!(h->drv[curr_queue]->queue) ||
1751 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1752 continue;
1753 blk_start_queue(h->gendisk[curr_queue]->queue);
1754
1755 /* check to see if we have maxed out the number of commands
1756 * that can be placed on the queue.
1757 */
f880632f 1758 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1759 if (curr_queue == start_queue) {
1760 h->next_to_run =
1761 (start_queue + 1) % (h->highest_lun + 1);
1762 break;
1763 } else {
1764 h->next_to_run = curr_queue;
1765 break;
1766 }
7b30f092
JA		 1767 }
1768 }
1769}
1770
ca1e0484
MM		 1771static void cciss_softirq_done(struct request *rq)
1772{
f70dba83
SC		 1773 CommandList_struct *c = rq->completion_data;
1774 ctlr_info_t *h = hba[c->ctlr];
1775 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1776 u64bit temp64;
664a717d 1777 unsigned long flags;
ca1e0484 1778 int i, ddir;
5c07a311 1779 int sg_index = 0;
ca1e0484 1780
f70dba83 1781 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1782 ddir = PCI_DMA_FROMDEVICE;
1783 else
1784 ddir = PCI_DMA_TODEVICE;
1785
1786 /* command did not need to be retried */
1787 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1788 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1789 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1790 cciss_unmap_sg_chain_block(h, c);
5c07a311 1791 /* Point to the next block */
f70dba83 1792 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1793 sg_index = 0;
1794 }
1795 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1796 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1797 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1798 ddir);
1799 ++sg_index;
ca1e0484
MM		 1800 }
1801
b2a4a43d 1802 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1803
c3a4d78c 1804 /* set the residual count for pc requests */
33659ebb 1805 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1806 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1807
c3a4d78c 1808 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1809
ca1e0484 1810 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1811 cmd_free(h, c);
7b30f092 1812 cciss_check_queues(h);
ca1e0484
MM		 1813 spin_unlock_irqrestore(&h->lock, flags);
1814}
1815
39ccf9a6
SC		 1816static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1817 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1818{
9cef0d2f
SC		 1819 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1820 sizeof(h->drv[log_unit]->LunID));
b57695fe 1821}
1822
7fe06326
AP		 1823/* This function gets the SCSI vendor, model, and revision of a logical drive
1824 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1825 * they cannot be read.
1826 */
f70dba83 1827static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1828 char *vendor, char *model, char *rev)
1829{
1830 int rc;
1831 InquiryData_struct *inq_buf;
b57695fe 1832 unsigned char scsi3addr[8];
7fe06326
AP		 1833
1834 *vendor = '\0';
1835 *model = '\0';
1836 *rev = '\0';
1837
1838 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1839 if (!inq_buf)
1840 return;
1841
f70dba83
SC		 1842 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1843 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1844 scsi3addr, TYPE_CMD);
7fe06326
AP		 1845 if (rc == IO_OK) {
1846 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1847 vendor[VENDOR_LEN] = '\0';
1848 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1849 model[MODEL_LEN] = '\0';
1850 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1851 rev[REV_LEN] = '\0';
1852 }
1853
1854 kfree(inq_buf);
1855 return;
1856}
1857
a72da29b
MM		 1858/* This function gets the serial number of a logical drive via
1859 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1860 * number cannot be had, for whatever reason, 16 bytes of 0xff
1861 * are returned instead.
1862 */
f70dba83 1863static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1864 unsigned char *serial_no, int buflen)
1865{
1866#define PAGE_83_INQ_BYTES 64
1867 int rc;
1868 unsigned char *buf;
b57695fe 1869 unsigned char scsi3addr[8];
a72da29b
MM		 1870
1871 if (buflen > 16)
1872 buflen = 16;
1873 memset(serial_no, 0xff, buflen);
1874 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1875 if (!buf)
1876 return;
1877 memset(serial_no, 0, buflen);
f70dba83
SC		 1878 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1879 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1880 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1881 if (rc == IO_OK)
1882 memcpy(serial_no, &buf[8], buflen);
1883 kfree(buf);
1884 return;
1885}
1886
617e1344
SC		 1887/*
1888 * cciss_add_disk sets up the block device queue for a logical drive
1889 */
1890static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1891 int drv_index)
1892{
1893 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1894 if (!disk->queue)
1895 goto init_queue_failure;
6ae5ce8e
MM		 1896 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1897 disk->major = h->major;
1898 disk->first_minor = drv_index << NWD_SHIFT;
1899 disk->fops = &cciss_fops;
9cef0d2f
SC		 1900 if (cciss_create_ld_sysfs_entry(h, drv_index))
1901 goto cleanup_queue;
1902 disk->private_data = h->drv[drv_index];
1903 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1904
1905 /* Set up queue information */
1906 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1907
1908 /* This is a hardware imposed limit. */
8a78362c 1909 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1910
086fa5ff 1911 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1912
1913 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1914
1915 disk->queue->queuedata = h;
1916
e1defc4f 1917 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1918 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1919
1920 /* Make sure all queue data is written out before */
9cef0d2f 1921 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1922 /* allows the interrupt handler to start the queue */
1923 wmb();
9cef0d2f 1924 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1925 add_disk(disk);
617e1344
SC		 1926 return 0;
1927
1928cleanup_queue:
1929 blk_cleanup_queue(disk->queue);
1930 disk->queue = NULL;
e8074f79 1931init_queue_failure:
617e1344 1932 return -1;
6ae5ce8e
MM		 1933}
1934
ddd47442 1935/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1936 * If the usage_count is zero and it is a heretofore unknown drive, or,
1937 * the drive's capacity, geometry, or serial number has changed,
1938 * then the drive information will be updated and the disk will be
1939 * re-registered with the kernel. If these conditions don't hold,
1940 * then it will be left alone for the next reboot. The exception to this
1941 * is disk 0 which will always be left registered with the kernel since it
1942 * is also the controller node. Any changes to disk 0 will show up on
1943 * the next reboot.
7c832835 1944 */
f70dba83
SC		 1945static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1946 int first_time, int via_ioctl)
7c832835 1947{
ddd47442 1948 struct gendisk *disk;
ddd47442
MM		 1949 InquiryData_struct *inq_buff = NULL;
1950 unsigned int block_size;
00988a35 1951 sector_t total_size;
ddd47442
MM		 1952 unsigned long flags = 0;
1953 int ret = 0;
a72da29b
MM		 1954 drive_info_struct *drvinfo;
1955
1956 /* Get information about the disk and modify the driver structure */
1957 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1958 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1959 if (inq_buff == NULL || drvinfo == NULL)
1960 goto mem_msg;
1961
1962 /* testing to see if 16-byte CDBs are already being used */
1963 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1964 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1965 &total_size, &block_size);
1966
1967 } else {
f70dba83 1968 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1969 /* if read_capacity returns all F's this volume is >2TB */
1970 /* in size so we switch to 16-byte CDB's for all */
1971 /* read/write ops */
1972 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1973 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1974 &total_size, &block_size);
1975 h->cciss_read = CCISS_READ_16;
1976 h->cciss_write = CCISS_WRITE_16;
1977 } else {
1978 h->cciss_read = CCISS_READ_10;
1979 h->cciss_write = CCISS_WRITE_10;
1980 }
1981 }
1982
f70dba83 1983 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 1984 inq_buff, drvinfo);
1985 drvinfo->block_size = block_size;
1986 drvinfo->nr_blocks = total_size + 1;
1987
f70dba83 1988 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 1989 drvinfo->model, drvinfo->rev);
f70dba83 1990 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 1991 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 1992 /* Save the lunid in case we deregister the disk, below. */
1993 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1994 sizeof(drvinfo->LunID));
a72da29b
MM		 1995
1996 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 1997 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 1998 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 1999 h->drv[drv_index]->serial_no, 16) == 0) &&
2000 drvinfo->block_size == h->drv[drv_index]->block_size &&
2001 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2002 drvinfo->heads == h->drv[drv_index]->heads &&
2003 drvinfo->sectors == h->drv[drv_index]->sectors &&
2004 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 2005 /* The disk is unchanged, nothing to update */
2006 goto freeret;
a72da29b 2007
6ae5ce8e
MM		 2008 /* If we get here it's not the same disk, or something's changed,
2009 * so we need to * deregister it, and re-register it, if it's not
2010 * in use.
2011 * If the disk already exists then deregister it before proceeding
2012 * (unless it's the first disk (for the controller node).
2013 */
9cef0d2f 2014 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2015 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2016 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2017 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2018 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2019
9cef0d2f 2020 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2021 * which keeps the interrupt handler from starting
2022 * the queue.
2023 */
2d11d993 2024 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2025 }
2026
2027 /* If the disk is in use return */
2028 if (ret)
a72da29b
MM		 2029 goto freeret;
2030
6ae5ce8e 2031 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2032 * and serial number inquiry. If the disk was deregistered
2033 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2034 */
9cef0d2f
SC		 2035 if (h->drv[drv_index] == NULL) {
2036 drvinfo->device_initialized = 0;
2037 h->drv[drv_index] = drvinfo;
2038 drvinfo = NULL; /* so it won't be freed below. */
2039 } else {
2040 /* special case for cxd0 */
2041 h->drv[drv_index]->block_size = drvinfo->block_size;
2042 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2043 h->drv[drv_index]->heads = drvinfo->heads;
2044 h->drv[drv_index]->sectors = drvinfo->sectors;
2045 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2046 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2047 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2048 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2049 VENDOR_LEN + 1);
2050 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2051 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2052 }
ddd47442
MM		 2053
2054 ++h->num_luns;
2055 disk = h->gendisk[drv_index];
9cef0d2f 2056 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2057
6ae5ce8e
MM		 2058 /* If it's not disk 0 (drv_index != 0)
2059 * or if it was disk 0, but there was previously
2060 * no actual corresponding configured logical drive
2061 * (raid_leve == -1) then we want to update the
2062 * logical drive's information.
2063 */
361e9b07
SC		 2064 if (drv_index || first_time) {
2065 if (cciss_add_disk(h, disk, drv_index) != 0) {
2066 cciss_free_gendisk(h, drv_index);
9cef0d2f 2067 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2068 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2069 drv_index);
361e9b07
SC		 2070 --h->num_luns;
2071 }
2072 }
ddd47442 2073
6ae5ce8e 2074freeret:
ddd47442 2075 kfree(inq_buff);
a72da29b 2076 kfree(drvinfo);
ddd47442 2077 return;
6ae5ce8e 2078mem_msg:
b2a4a43d 2079 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2080 goto freeret;
2081}
2082
2083/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2084 * that has a null drv pointer and allocate the drive info struct and
2085 * will return that index This is where new drives will be added.
2086 * If the index to be returned is greater than the highest_lun index for
2087 * the controller then highest_lun is set * to this new index.
2088 * If there are no available indexes or if tha allocation fails, then -1
2089 * is returned. * "controller_node" is used to know if this is a real
2090 * logical drive, or just the controller node, which determines if this
2091 * counts towards highest_lun.
7c832835 2092 */
9cef0d2f 2093static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2094{
2095 int i;
9cef0d2f 2096 drive_info_struct *drv;
ddd47442 2097
9cef0d2f 2098 /* Search for an empty slot for our drive info */
7c832835 2099 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2100
2101 /* if not cxd0 case, and it's occupied, skip it. */
2102 if (h->drv[i] && i != 0)
2103 continue;
2104 /*
2105 * If it's cxd0 case, and drv is alloc'ed already, and a
2106 * disk is configured there, skip it.
2107 */
2108 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2109 continue;
2110
2111 /*
2112 * We've found an empty slot. Update highest_lun
2113 * provided this isn't just the fake cxd0 controller node.
2114 */
2115 if (i > h->highest_lun && !controller_node)
2116 h->highest_lun = i;
2117
2118 /* If adding a real disk at cxd0, and it's already alloc'ed */
2119 if (i == 0 && h->drv[i] != NULL)
ddd47442 2120 return i;
9cef0d2f
SC		 2121
2122 /*
2123 * Found an empty slot, not already alloc'ed. Allocate it.
2124 * Mark it with raid_level == -1, so we know it's new later on.
2125 */
2126 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2127 if (!drv)
2128 return -1;
2129 drv->raid_level = -1; /* so we know it's new */
2130 h->drv[i] = drv;
2131 return i;
ddd47442
MM		 2132 }
2133 return -1;
2134}
2135
9cef0d2f
SC		 2136static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2137{
2138 kfree(h->drv[drv_index]);
2139 h->drv[drv_index] = NULL;
2140}
2141
361e9b07
SC		 2142static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2143{
2144 put_disk(h->gendisk[drv_index]);
2145 h->gendisk[drv_index] = NULL;
2146}
2147
6ae5ce8e
MM		 2148/* cciss_add_gendisk finds a free hba[]->drv structure
2149 * and allocates a gendisk if needed, and sets the lunid
2150 * in the drvinfo structure. It returns the index into
2151 * the ->drv[] array, or -1 if none are free.
2152 * is_controller_node indicates whether highest_lun should
2153 * count this disk, or if it's only being added to provide
2154 * a means to talk to the controller in case no logical
2155 * drives have yet been configured.
2156 */
39ccf9a6
SC		 2157static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2158 int controller_node)
6ae5ce8e
MM		 2159{
2160 int drv_index;
2161
9cef0d2f 2162 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2163 if (drv_index == -1)
2164 return -1;
8ce51966 2165
6ae5ce8e
MM		 2166 /*Check if the gendisk needs to be allocated */
2167 if (!h->gendisk[drv_index]) {
2168 h->gendisk[drv_index] =
2169 alloc_disk(1 << NWD_SHIFT);
2170 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2171 dev_err(&h->pdev->dev,
2172 "could not allocate a new disk %d\n",
2173 drv_index);
9cef0d2f 2174 goto err_free_drive_info;
6ae5ce8e
MM		 2175 }
2176 }
9cef0d2f
SC		 2177 memcpy(h->drv[drv_index]->LunID, lunid,
2178 sizeof(h->drv[drv_index]->LunID));
2179 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2180 goto err_free_disk;
6ae5ce8e
MM		 2181 /* Don't need to mark this busy because nobody */
2182 /* else knows about this disk yet to contend */
2183 /* for access to it. */
9cef0d2f 2184 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2185 wmb();
2186 return drv_index;
7fe06326
AP		 2187
2188err_free_disk:
361e9b07 2189 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2190err_free_drive_info:
2191 cciss_free_drive_info(h, drv_index);
7fe06326 2192 return -1;
6ae5ce8e
MM		 2193}
2194
2195/* This is for the special case of a controller which
2196 * has no logical drives. In this case, we still need
2197 * to register a disk so the controller can be accessed
2198 * by the Array Config Utility.
2199 */
2200static void cciss_add_controller_node(ctlr_info_t *h)
2201{
2202 struct gendisk *disk;
2203 int drv_index;
2204
2205 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2206 return;
2207
39ccf9a6 2208 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2209 if (drv_index == -1)
2210 goto error;
9cef0d2f
SC		 2211 h->drv[drv_index]->block_size = 512;
2212 h->drv[drv_index]->nr_blocks = 0;
2213 h->drv[drv_index]->heads = 0;
2214 h->drv[drv_index]->sectors = 0;
2215 h->drv[drv_index]->cylinders = 0;
2216 h->drv[drv_index]->raid_level = -1;
2217 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2218 disk = h->gendisk[drv_index];
361e9b07
SC		 2219 if (cciss_add_disk(h, disk, drv_index) == 0)
2220 return;
2221 cciss_free_gendisk(h, drv_index);
9cef0d2f 2222 cciss_free_drive_info(h, drv_index);
361e9b07 2223error:
b2a4a43d 2224 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2225 return;
6ae5ce8e
MM		 2226}
2227
ddd47442 2228/* This function will add and remove logical drives from the Logical
d14c4ab5 2229 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2230 * so that mount points are preserved until the next reboot. This allows
2231 * for the removal of logical drives in the middle of the drive array
2232 * without a re-ordering of those drives.
2233 * INPUT
2234 * h = The controller to perform the operations on
7c832835 2235 */
2d11d993
SC		 2236static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2237 int via_ioctl)
1da177e4 2238{
ddd47442
MM		 2239 int num_luns;
2240 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2241 int return_code;
2242 int listlength = 0;
2243 int i;
2244 int drv_found;
2245 int drv_index = 0;
39ccf9a6 2246 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2247 unsigned long flags;
ddd47442 2248
6ae5ce8e
MM		 2249 if (!capable(CAP_SYS_RAWIO))
2250 return -EPERM;
2251
ddd47442 2252 /* Set busy_configuring flag for this operation */
f70dba83 2253 spin_lock_irqsave(&h->lock, flags);
7c832835 2254 if (h->busy_configuring) {
f70dba83 2255 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2256 return -EBUSY;
2257 }
2258 h->busy_configuring = 1;
f70dba83 2259 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2260
a72da29b
MM		 2261 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2262 if (ld_buff == NULL)
2263 goto mem_msg;
2264
f70dba83 2265 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2266 sizeof(ReportLunData_struct),
2267 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2268
a72da29b
MM		 2269 if (return_code == IO_OK)
2270 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2271 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2272 dev_warn(&h->pdev->dev,
2273 "report logical volume command failed\n");
a72da29b
MM		 2274 listlength = 0;
2275 goto freeret;
2276 }
2277
2278 num_luns = listlength / 8; /* 8 bytes per entry */
2279 if (num_luns > CISS_MAX_LUN) {
2280 num_luns = CISS_MAX_LUN;
b2a4a43d 2281 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2282 " on controller than can be handled by"
2283 " this driver.\n");
2284 }
2285
6ae5ce8e
MM		 2286 if (num_luns == 0)
2287 cciss_add_controller_node(h);
2288
2289 /* Compare controller drive array to driver's drive array
2290 * to see if any drives are missing on the controller due
2291 * to action of Array Config Utility (user deletes drive)
2292 * and deregister logical drives which have disappeared.
2293 */
a72da29b
MM		 2294 for (i = 0; i <= h->highest_lun; i++) {
2295 int j;
2296 drv_found = 0;
d8a0be6a
SC		 2297
2298 /* skip holes in the array from already deleted drives */
9cef0d2f 2299 if (h->drv[i] == NULL)
d8a0be6a
SC		 2300 continue;
2301
a72da29b 2302 for (j = 0; j < num_luns; j++) {
39ccf9a6 2303 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2304 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2305 sizeof(lunid)) == 0) {
a72da29b
MM		 2306 drv_found = 1;
2307 break;
2308 }
2309 }
2310 if (!drv_found) {
2311 /* Deregister it from the OS, it's gone. */
f70dba83 2312 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2313 h->drv[i]->busy_configuring = 1;
f70dba83 2314 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2315 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2316 if (h->drv[i] != NULL)
2317 h->drv[i]->busy_configuring = 0;
ddd47442 2318 }
a72da29b 2319 }
ddd47442 2320
a72da29b
MM		 2321 /* Compare controller drive array to driver's drive array.
2322 * Check for updates in the drive information and any new drives
2323 * on the controller due to ACU adding logical drives, or changing
2324 * a logical drive's size, etc. Reregister any new/changed drives
2325 */
2326 for (i = 0; i < num_luns; i++) {
2327 int j;
ddd47442 2328
a72da29b 2329 drv_found = 0;
ddd47442 2330
39ccf9a6 2331 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2332 /* Find if the LUN is already in the drive array
2333 * of the driver. If so then update its info
2334 * if not in use. If it does not exist then find
2335 * the first free index and add it.
2336 */
2337 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2338 if (h->drv[j] != NULL &&
2339 memcmp(h->drv[j]->LunID, lunid,
2340 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2341 drv_index = j;
2342 drv_found = 1;
2343 break;
ddd47442 2344 }
a72da29b 2345 }
ddd47442 2346
a72da29b
MM		 2347 /* check if the drive was found already in the array */
2348 if (!drv_found) {
eece695f 2349 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2350 if (drv_index == -1)
2351 goto freeret;
a72da29b 2352 }
f70dba83 2353 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2354 } /* end for */
ddd47442 2355
6ae5ce8e 2356freeret:
ddd47442
MM		 2357 kfree(ld_buff);
2358 h->busy_configuring = 0;
2359 /* We return -1 here to tell the ACU that we have registered/updated
2360 * all of the drives that we can and to keep it from calling us
2361 * additional times.
7c832835 2362 */
ddd47442 2363 return -1;
6ae5ce8e 2364mem_msg:
b2a4a43d 2365 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2366 h->busy_configuring = 0;
ddd47442
MM		 2367 goto freeret;
2368}
2369
9ddb27b4
SC		 2370static void cciss_clear_drive_info(drive_info_struct *drive_info)
2371{
2372 /* zero out the disk size info */
2373 drive_info->nr_blocks = 0;
2374 drive_info->block_size = 0;
2375 drive_info->heads = 0;
2376 drive_info->sectors = 0;
2377 drive_info->cylinders = 0;
2378 drive_info->raid_level = -1;
2379 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2380 memset(drive_info->model, 0, sizeof(drive_info->model));
2381 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2382 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2383 /*
2384 * don't clear the LUNID though, we need to remember which
2385 * one this one is.
2386 */
2387}
2388
ddd47442
MM		 2389/* This function will deregister the disk and it's queue from the
2390 * kernel. It must be called with the controller lock held and the
2391 * drv structures busy_configuring flag set. It's parameters are:
2392 *
2393 * disk = This is the disk to be deregistered
2394 * drv = This is the drive_info_struct associated with the disk to be
2395 * deregistered. It contains information about the disk used
2396 * by the driver.
2397 * clear_all = This flag determines whether or not the disk information
2398 * is going to be completely cleared out and the highest_lun
2399 * reset. Sometimes we want to clear out information about
d14c4ab5 2400 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2401 * the highest_lun should be left unchanged and the LunID
2402 * should not be cleared.
2d11d993
SC		 2403 * via_ioctl
2404 * This indicates whether we've reached this path via ioctl.
2405 * This affects the maximum usage count allowed for c0d0 to be messed with.
2406 * If this path is reached via ioctl(), then the max_usage_count will
2407 * be 1, as the process calling ioctl() has got to have the device open.
2408 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2409*/
a0ea8622 2410static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2411 int clear_all, int via_ioctl)
ddd47442 2412{
799202cb 2413 int i;
a0ea8622
SC		 2414 struct gendisk *disk;
2415 drive_info_struct *drv;
9cef0d2f 2416 int recalculate_highest_lun;
1da177e4
LT		 2417
2418 if (!capable(CAP_SYS_RAWIO))
2419 return -EPERM;
2420
9cef0d2f 2421 drv = h->drv[drv_index];
a0ea8622
SC		 2422 disk = h->gendisk[drv_index];
2423
1da177e4 2424 /* make sure logical volume is NOT is use */
7c832835 2425 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2426 if (drv->usage_count > via_ioctl)
7c832835
BH		 2427 return -EBUSY;
2428 } else if (drv->usage_count > 0)
2429 return -EBUSY;
1da177e4 2430
9cef0d2f
SC		 2431 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2432
ddd47442
MM		 2433 /* invalidate the devices and deregister the disk. If it is disk
2434 * zero do not deregister it but just zero out it's values. This
2435 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2436 */
2437 if (h->gendisk[0] != disk) {
5a9df732 2438 struct request_queue *q = disk->queue;
097d0264 2439 if (disk->flags & GENHD_FL_UP) {
8ce51966 2440 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2441 del_gendisk(disk);
5a9df732 2442 }
9cef0d2f 2443 if (q)
5a9df732 2444 blk_cleanup_queue(q);
5a9df732
AB		 2445 /* If clear_all is set then we are deleting the logical
2446 * drive, not just refreshing its info. For drives
2447 * other than disk 0 we will call put_disk. We do not
2448 * do this for disk 0 as we need it to be able to
2449 * configure the controller.
a72da29b 2450 */
5a9df732
AB		 2451 if (clear_all){
2452 /* This isn't pretty, but we need to find the
2453 * disk in our array and NULL our the pointer.
2454 * This is so that we will call alloc_disk if
2455 * this index is used again later.
a72da29b 2456 */
5a9df732 2457 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2458 if (h->gendisk[i] == disk) {
5a9df732
AB		 2459 h->gendisk[i] = NULL;
2460 break;
799202cb 2461 }
799202cb 2462 }
5a9df732 2463 put_disk(disk);
ddd47442 2464 }
799202cb
MM		 2465 } else {
2466 set_capacity(disk, 0);
9cef0d2f 2467 cciss_clear_drive_info(drv);
ddd47442
MM		 2468 }
2469
2470 --h->num_luns;
ddd47442 2471
9cef0d2f
SC		 2472 /* if it was the last disk, find the new hightest lun */
2473 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2474 int newhighest = -1;
9cef0d2f
SC		 2475 for (i = 0; i <= h->highest_lun; i++) {
2476 /* if the disk has size > 0, it is available */
2477 if (h->drv[i] && h->drv[i]->heads)
2478 newhighest = i;
1da177e4 2479 }
9cef0d2f 2480 h->highest_lun = newhighest;
ddd47442 2481 }
e2019b58 2482 return 0;
1da177e4 2483}
ddd47442 2484
f70dba83 2485static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2486 size_t size, __u8 page_code, unsigned char *scsi3addr,
2487 int cmd_type)
1da177e4 2488{
1da177e4
LT		 2489 u64bit buff_dma_handle;
2490 int status = IO_OK;
2491
2492 c->cmd_type = CMD_IOCTL_PEND;
2493 c->Header.ReplyQueue = 0;
7c832835 2494 if (buff != NULL) {
1da177e4 2495 c->Header.SGList = 1;
7c832835 2496 c->Header.SGTotal = 1;
1da177e4
LT		 2497 } else {
2498 c->Header.SGList = 0;
7c832835 2499 c->Header.SGTotal = 0;
1da177e4
LT		 2500 }
2501 c->Header.Tag.lower = c->busaddr;
b57695fe 2502 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2503
2504 c->Request.Type.Type = cmd_type;
2505 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2506 switch (cmd) {
2507 case CISS_INQUIRY:
1da177e4 2508 /* are we trying to read a vital product page */
7c832835 2509 if (page_code != 0) {
1da177e4
LT		 2510 c->Request.CDB[1] = 0x01;
2511 c->Request.CDB[2] = page_code;
2512 }
2513 c->Request.CDBLen = 6;
7c832835 2514 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2515 c->Request.Type.Direction = XFER_READ;
2516 c->Request.Timeout = 0;
7c832835
BH		 2517 c->Request.CDB[0] = CISS_INQUIRY;
2518 c->Request.CDB[4] = size & 0xFF;
2519 break;
1da177e4
LT		 2520 case CISS_REPORT_LOG:
2521 case CISS_REPORT_PHYS:
7c832835 2522 /* Talking to controller so It's a physical command
1da177e4 2523 mode = 00 target = 0. Nothing to write.
7c832835 2524 */
1da177e4
LT		 2525 c->Request.CDBLen = 12;
2526 c->Request.Type.Attribute = ATTR_SIMPLE;
2527 c->Request.Type.Direction = XFER_READ;
2528 c->Request.Timeout = 0;
2529 c->Request.CDB[0] = cmd;
b028461d 2530 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2531 c->Request.CDB[7] = (size >> 16) & 0xFF;
2532 c->Request.CDB[8] = (size >> 8) & 0xFF;
2533 c->Request.CDB[9] = size & 0xFF;
2534 break;
2535
2536 case CCISS_READ_CAPACITY:
1da177e4
LT		 2537 c->Request.CDBLen = 10;
2538 c->Request.Type.Attribute = ATTR_SIMPLE;
2539 c->Request.Type.Direction = XFER_READ;
2540 c->Request.Timeout = 0;
2541 c->Request.CDB[0] = cmd;
7c832835 2542 break;
00988a35 2543 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2544 c->Request.CDBLen = 16;
2545 c->Request.Type.Attribute = ATTR_SIMPLE;
2546 c->Request.Type.Direction = XFER_READ;
2547 c->Request.Timeout = 0;
2548 c->Request.CDB[0] = cmd;
2549 c->Request.CDB[1] = 0x10;
2550 c->Request.CDB[10] = (size >> 24) & 0xFF;
2551 c->Request.CDB[11] = (size >> 16) & 0xFF;
2552 c->Request.CDB[12] = (size >> 8) & 0xFF;
2553 c->Request.CDB[13] = size & 0xFF;
2554 c->Request.Timeout = 0;
2555 c->Request.CDB[0] = cmd;
2556 break;
1da177e4
LT		 2557 case CCISS_CACHE_FLUSH:
2558 c->Request.CDBLen = 12;
2559 c->Request.Type.Attribute = ATTR_SIMPLE;
2560 c->Request.Type.Direction = XFER_WRITE;
2561 c->Request.Timeout = 0;
2562 c->Request.CDB[0] = BMIC_WRITE;
2563 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2564 break;
88f627ae 2565 case TEST_UNIT_READY:
88f627ae
SC		 2566 c->Request.CDBLen = 6;
2567 c->Request.Type.Attribute = ATTR_SIMPLE;
2568 c->Request.Type.Direction = XFER_NONE;
2569 c->Request.Timeout = 0;
2570 break;
1da177e4 2571 default:
b2a4a43d 2572 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2573 return IO_ERROR;
1da177e4
LT		 2574 }
2575 } else if (cmd_type == TYPE_MSG) {
2576 switch (cmd) {
7c832835 2577 case 0: /* ABORT message */
3da8b713 2578 c->Request.CDBLen = 12;
2579 c->Request.Type.Attribute = ATTR_SIMPLE;
2580 c->Request.Type.Direction = XFER_WRITE;
2581 c->Request.Timeout = 0;
7c832835
BH		 2582 c->Request.CDB[0] = cmd; /* abort */
2583 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2584 /* buff contains the tag of the command to abort */
2585 memcpy(&c->Request.CDB[4], buff, 8);
2586 break;
7c832835 2587 case 1: /* RESET message */
88f627ae 2588 c->Request.CDBLen = 16;
3da8b713 2589 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2590 c->Request.Type.Direction = XFER_NONE;
3da8b713 2591 c->Request.Timeout = 0;
2592 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2593 c->Request.CDB[0] = cmd; /* reset */
88f627ae 2594 c->Request.CDB[1] = 0x03; /* reset a target */
00988a35 2595 break;
1da177e4
LT		 2596 case 3: /* No-Op message */
2597 c->Request.CDBLen = 1;
2598 c->Request.Type.Attribute = ATTR_SIMPLE;
2599 c->Request.Type.Direction = XFER_WRITE;
2600 c->Request.Timeout = 0;
2601 c->Request.CDB[0] = cmd;
2602 break;
2603 default:
b2a4a43d
SC		 2604 dev_warn(&h->pdev->dev,
2605 "unknown message type %d\n", cmd);
1da177e4
LT		 2606 return IO_ERROR;
2607 }
2608 } else {
b2a4a43d 2609 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2610 return IO_ERROR;
2611 }
2612 /* Fill in the scatter gather information */
2613 if (size > 0) {
2614 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2615 buff, size,
2616 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2617 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2618 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2619 c->SG[0].Len = size;
7c832835 2620 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2621 }
2622 return status;
2623}
7c832835 2624
3c2ab402 2625static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2626{
2627 switch (c->err_info->ScsiStatus) {
2628 case SAM_STAT_GOOD:
2629 return IO_OK;
2630 case SAM_STAT_CHECK_CONDITION:
2631 switch (0xf & c->err_info->SenseInfo[2]) {
2632 case 0: return IO_OK; /* no sense */
2633 case 1: return IO_OK; /* recovered error */
2634 default:
c08fac65
SC		 2635 if (check_for_unit_attention(h, c))
2636 return IO_NEEDS_RETRY;
b2a4a43d 2637 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2638 "check condition, sense key = 0x%02x\n",
b2a4a43d 2639 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2640 }
2641 break;
2642 default:
b2a4a43d
SC		 2643 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2644 "scsi status = 0x%02x\n",
3c2ab402 2645 c->Request.CDB[0], c->err_info->ScsiStatus);
2646 break;
2647 }
2648 return IO_ERROR;
2649}
2650
789a424a 2651static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2652{
5390cfc3 2653 int return_status = IO_OK;
7c832835 2654
789a424a 2655 if (c->err_info->CommandStatus == CMD_SUCCESS)
2656 return IO_OK;
5390cfc3 2657
2658 switch (c->err_info->CommandStatus) {
2659 case CMD_TARGET_STATUS:
3c2ab402 2660 return_status = check_target_status(h, c);
5390cfc3 2661 break;
2662 case CMD_DATA_UNDERRUN:
2663 case CMD_DATA_OVERRUN:
2664 /* expected for inquiry and report lun commands */
2665 break;
2666 case CMD_INVALID:
b2a4a43d 2667 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2668 "reported invalid\n", c->Request.CDB[0]);
2669 return_status = IO_ERROR;
2670 break;
2671 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2672 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2673 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2674 return_status = IO_ERROR;
2675 break;
2676 case CMD_HARDWARE_ERR:
b2a4a43d 2677 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2678 " hardware error\n", c->Request.CDB[0]);
2679 return_status = IO_ERROR;
2680 break;
2681 case CMD_CONNECTION_LOST:
b2a4a43d 2682 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2683 "connection lost\n", c->Request.CDB[0]);
2684 return_status = IO_ERROR;
2685 break;
2686 case CMD_ABORTED:
b2a4a43d 2687 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2688 "aborted\n", c->Request.CDB[0]);
2689 return_status = IO_ERROR;
2690 break;
2691 case CMD_ABORT_FAILED:
b2a4a43d 2692 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2693 "abort failed\n", c->Request.CDB[0]);
2694 return_status = IO_ERROR;
2695 break;
2696 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2697 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2698 c->Request.CDB[0]);
789a424a 2699 return_status = IO_NEEDS_RETRY;
5390cfc3 2700 break;
2701 default:
b2a4a43d 2702 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2703 "unknown status %x\n", c->Request.CDB[0],
2704 c->err_info->CommandStatus);
2705 return_status = IO_ERROR;
7c832835 2706 }
789a424a 2707 return return_status;
2708}
2709
2710static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2711 int attempt_retry)
2712{
2713 DECLARE_COMPLETION_ONSTACK(wait);
2714 u64bit buff_dma_handle;
789a424a 2715 int return_status = IO_OK;
2716
2717resend_cmd2:
2718 c->waiting = &wait;
664a717d 2719 enqueue_cmd_and_start_io(h, c);
789a424a 2720
2721 wait_for_completion(&wait);
2722
2723 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2724 goto command_done;
2725
2726 return_status = process_sendcmd_error(h, c);
2727
2728 if (return_status == IO_NEEDS_RETRY &&
2729 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2730 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2731 c->Request.CDB[0]);
2732 c->retry_count++;
2733 /* erase the old error information */
2734 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2735 return_status = IO_OK;
2736 INIT_COMPLETION(wait);
2737 goto resend_cmd2;
2738 }
5390cfc3 2739
2740command_done:
1da177e4 2741 /* unlock the buffers from DMA */
bb2a37bf
MM		 2742 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2743 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2744 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2745 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2746 return return_status;
2747}
2748
f70dba83 2749static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2750 __u8 page_code, unsigned char scsi3addr[],
2751 int cmd_type)
5390cfc3 2752{
5390cfc3 2753 CommandList_struct *c;
2754 int return_status;
2755
6b4d96b8 2756 c = cmd_special_alloc(h);
5390cfc3 2757 if (!c)
2758 return -ENOMEM;
f70dba83 2759 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2760 scsi3addr, cmd_type);
5390cfc3 2761 if (return_status == IO_OK)
789a424a 2762 return_status = sendcmd_withirq_core(h, c, 1);
2763
6b4d96b8 2764 cmd_special_free(h, c);
7c832835 2765 return return_status;
1da177e4 2766}
7c832835 2767
f70dba83 2768static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2769 sector_t total_size,
7c832835
BH		 2770 unsigned int block_size,
2771 InquiryData_struct *inq_buff,
2772 drive_info_struct *drv)
1da177e4
LT		 2773{
2774 int return_code;
00988a35 2775 unsigned long t;
b57695fe 2776 unsigned char scsi3addr[8];
00988a35 2777
1da177e4 2778 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2779 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2780 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2781 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2782 if (return_code == IO_OK) {
7c832835 2783 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2784 dev_warn(&h->pdev->dev,
2785 "reading geometry failed, volume "
7c832835 2786 "does not support reading geometry\n");
1da177e4 2787 drv->heads = 255;
b028461d 2788 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2789 drv->cylinders = total_size + 1;
89f97ad1 2790 drv->raid_level = RAID_UNKNOWN;
1da177e4 2791 } else {
1da177e4
LT		 2792 drv->heads = inq_buff->data_byte[6];
2793 drv->sectors = inq_buff->data_byte[7];
2794 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2795 drv->cylinders += inq_buff->data_byte[5];
2796 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2797 }
2798 drv->block_size = block_size;
97c06978 2799 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2800 t = drv->heads * drv->sectors;
2801 if (t > 1) {
97c06978
MMOD		 2802 sector_t real_size = total_size + 1;
2803 unsigned long rem = sector_div(real_size, t);
3f7705ea 2804 if (rem)
97c06978
MMOD		 2805 real_size++;
2806 drv->cylinders = real_size;
1da177e4 2807 }
7c832835 2808 } else { /* Get geometry failed */
b2a4a43d 2809 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2810 }
1da177e4 2811}
7c832835 2812
1da177e4 2813static void
f70dba83 2814cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2815 unsigned int *block_size)
1da177e4 2816{
00988a35 2817 ReadCapdata_struct *buf;
1da177e4 2818 int return_code;
b57695fe 2819 unsigned char scsi3addr[8];
1aebe187
MK		 2820
2821 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2822 if (!buf) {
b2a4a43d 2823 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2824 return;
2825 }
1aebe187 2826
f70dba83
SC		 2827 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2828 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2829 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2830 if (return_code == IO_OK) {
4c1f2b31
AV		 2831 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2832 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2833 } else { /* read capacity command failed */
b2a4a43d 2834 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2835 *total_size = 0;
2836 *block_size = BLOCK_SIZE;
2837 }
00988a35 2838 kfree(buf);
00988a35
MMOD		 2839}
2840
f70dba83 2841static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2842 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2843{
2844 ReadCapdata_struct_16 *buf;
2845 int return_code;
b57695fe 2846 unsigned char scsi3addr[8];
1aebe187
MK		 2847
2848 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2849 if (!buf) {
b2a4a43d 2850 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2851 return;
2852 }
1aebe187 2853
f70dba83
SC		 2854 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2855 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2856 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2857 0, scsi3addr, TYPE_CMD);
00988a35 2858 if (return_code == IO_OK) {
4c1f2b31
AV		 2859 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2860 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2861 } else { /* read capacity command failed */
b2a4a43d 2862 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2863 *total_size = 0;
2864 *block_size = BLOCK_SIZE;
2865 }
b2a4a43d 2866 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2867 (unsigned long long)*total_size+1, *block_size);
00988a35 2868 kfree(buf);
1da177e4
LT		 2869}
2870
1da177e4
LT		 2871static int cciss_revalidate(struct gendisk *disk)
2872{
2873 ctlr_info_t *h = get_host(disk);
2874 drive_info_struct *drv = get_drv(disk);
2875 int logvol;
7c832835 2876 int FOUND = 0;
1da177e4 2877 unsigned int block_size;
00988a35 2878 sector_t total_size;
1da177e4
LT		 2879 InquiryData_struct *inq_buff = NULL;
2880
7c832835 2881 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
9cef0d2f 2882 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2883 sizeof(drv->LunID)) == 0) {
7c832835 2884 FOUND = 1;
1da177e4
LT		 2885 break;
2886 }
2887 }
2888
7c832835
BH		 2889 if (!FOUND)
2890 return 1;
1da177e4 2891
7c832835
BH		 2892 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2893 if (inq_buff == NULL) {
b2a4a43d 2894 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2895 return 1;
2896 }
00988a35 2897 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2898 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2899 &total_size, &block_size);
2900 } else {
f70dba83 2901 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2902 &total_size, &block_size);
2903 }
f70dba83 2904 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2905 inq_buff, drv);
1da177e4 2906
e1defc4f 2907 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2908 set_capacity(disk, drv->nr_blocks);
2909
1da177e4
LT		 2910 kfree(inq_buff);
2911 return 0;
2912}
2913
1da177e4
LT		 2914/*
2915 * Map (physical) PCI mem into (virtual) kernel space
2916 */
2917static void __iomem *remap_pci_mem(ulong base, ulong size)
2918{
7c832835
BH		 2919 ulong page_base = ((ulong) base) & PAGE_MASK;
2920 ulong page_offs = ((ulong) base) - page_base;
2921 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2922
7c832835 2923 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2924}
2925
7c832835
BH		 2926/*
2927 * Takes jobs of the Q and sends them to the hardware, then puts it on
2928 * the Q to wait for completion.
2929 */
2930static void start_io(ctlr_info_t *h)
1da177e4
LT		 2931{
2932 CommandList_struct *c;
7c832835 2933
8a3173de
JA		 2934 while (!hlist_empty(&h->reqQ)) {
2935 c = hlist_entry(h->reqQ.first, CommandList_struct, list);
1da177e4
LT		 2936 /* can't do anything if fifo is full */
2937 if ((h->access.fifo_full(h))) {
b2a4a43d 2938 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2939 break;
2940 }
2941
7c832835 2942 /* Get the first entry from the Request Q */
8a3173de 2943 removeQ(c);
1da177e4 2944 h->Qdepth--;
7c832835
BH		 2945
2946 /* Tell the controller execute command */
1da177e4 2947 h->access.submit_command(h, c);
7c832835
BH		 2948
2949 /* Put job onto the completed Q */
8a3173de 2950 addQ(&h->cmpQ, c);
1da177e4
LT		 2951 }
2952}
7c832835 2953
f70dba83 2954/* Assumes that h->lock is held. */
1da177e4
LT		 2955/* Zeros out the error record and then resends the command back */
2956/* to the controller */
7c832835 2957static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 2958{
2959 /* erase the old error information */
2960 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2961
2962 /* add it to software queue and then send it to the controller */
8a3173de 2963 addQ(&h->reqQ, c);
1da177e4 2964 h->Qdepth++;
7c832835 2965 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 2966 h->maxQsinceinit = h->Qdepth;
2967
2968 start_io(h);
2969}
a9925a06 2970
1a614f50
SC		 2971static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2972 unsigned int msg_byte, unsigned int host_byte,
2973 unsigned int driver_byte)
2974{
2975 /* inverse of macros in scsi.h */
2976 return (scsi_status_byte & 0xff) |
2977 ((msg_byte & 0xff) << 8) |
2978 ((host_byte & 0xff) << 16) |
2979 ((driver_byte & 0xff) << 24);
2980}
2981
0a9279cc
MM		 2982static inline int evaluate_target_status(ctlr_info_t *h,
2983 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 2984{
2985 unsigned char sense_key;
1a614f50
SC		 2986 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2987 int error_value;
2988
0a9279cc 2989 *retry_cmd = 0;
1a614f50
SC		 2990 /* If we get in here, it means we got "target status", that is, scsi status */
2991 status_byte = cmd->err_info->ScsiStatus;
2992 driver_byte = DRIVER_OK;
2993 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2994
33659ebb 2995 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 2996 host_byte = DID_PASSTHROUGH;
2997 else
2998 host_byte = DID_OK;
2999
3000 error_value = make_status_bytes(status_byte, msg_byte,
3001 host_byte, driver_byte);
03bbfee5 3002
1a614f50 3003 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 3004 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 3005 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3006 "has SCSI Status 0x%x\n",
3007 cmd, cmd->err_info->ScsiStatus);
1a614f50 3008 return error_value;
03bbfee5
MMOD		 3009 }
3010
3011 /* check the sense key */
3012 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3013 /* no status or recovered error */
33659ebb
CH		 3014 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3015 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3016 error_value = 0;
03bbfee5 3017
0a9279cc 3018 if (check_for_unit_attention(h, cmd)) {
33659ebb 3019 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3020 return 0;
3021 }
3022
33659ebb
CH		 3023 /* Not SG_IO or similar? */
3024 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3025 if (error_value != 0)
b2a4a43d 3026 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3027 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3028 return error_value;
03bbfee5
MMOD		 3029 }
3030
3031 /* SG_IO or similar, copy sense data back */
3032 if (cmd->rq->sense) {
3033 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3034 cmd->rq->sense_len = cmd->err_info->SenseLen;
3035 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3036 cmd->rq->sense_len);
3037 } else
3038 cmd->rq->sense_len = 0;
3039
1a614f50 3040 return error_value;
03bbfee5
MMOD		 3041}
3042
7c832835 3043/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3044 * buffers for the completed job. Note that this function does not need
3045 * to hold the hba/queue lock.
7c832835
BH		 3046 */
3047static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3048 int timeout)
1da177e4 3049{
1da177e4 3050 int retry_cmd = 0;
198b7660
MMOD		 3051 struct request *rq = cmd->rq;
3052
3053 rq->errors = 0;
7c832835 3054
1da177e4 3055 if (timeout)
1a614f50 3056 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3057
d38ae168
MMOD		 3058 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3059 goto after_error_processing;
7c832835 3060
d38ae168 3061 switch (cmd->err_info->CommandStatus) {
d38ae168 3062 case CMD_TARGET_STATUS:
0a9279cc 3063 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3064 break;
3065 case CMD_DATA_UNDERRUN:
33659ebb 3066 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3067 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3068 " completed with data underrun "
3069 "reported\n", cmd);
c3a4d78c 3070 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3071 }
d38ae168
MMOD		 3072 break;
3073 case CMD_DATA_OVERRUN:
33659ebb 3074 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3075 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3076 " completed with data overrun "
3077 "reported\n", cmd);
d38ae168
MMOD		 3078 break;
3079 case CMD_INVALID:
b2a4a43d 3080 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3081 "reported invalid\n", cmd);
1a614f50
SC		 3082 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3083 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3084 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3085 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3086 break;
3087 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3088 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3089 "protocol error\n", cmd);
1a614f50
SC		 3090 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3091 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3092 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3093 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3094 break;
3095 case CMD_HARDWARE_ERR:
b2a4a43d 3096 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3097 " hardware error\n", cmd);
1a614f50
SC		 3098 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3099 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3100 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3101 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3102 break;
3103 case CMD_CONNECTION_LOST:
b2a4a43d 3104 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3105 "connection lost\n", cmd);
1a614f50
SC		 3106 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3107 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3108 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3109 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3110 break;
3111 case CMD_ABORTED:
b2a4a43d 3112 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3113 "aborted\n", cmd);
1a614f50
SC		 3114 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3115 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3116 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3117 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3118 break;
3119 case CMD_ABORT_FAILED:
b2a4a43d 3120 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3121 "abort failed\n", cmd);
1a614f50
SC		 3122 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3123 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3124 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3125 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3126 break;
3127 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3128 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3129 "abort %p\n", h->ctlr, cmd);
3130 if (cmd->retry_count < MAX_CMD_RETRIES) {
3131 retry_cmd = 1;
b2a4a43d 3132 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3133 cmd->retry_count++;
3134 } else
b2a4a43d
SC		 3135 dev_warn(&h->pdev->dev,
3136 "%p retried too many times\n", cmd);
1a614f50
SC		 3137 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3138 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3139 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3140 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3141 break;
3142 case CMD_TIMEOUT:
b2a4a43d 3143 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3144 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3145 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3146 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3147 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3148 break;
3149 default:
b2a4a43d 3150 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3151 "unknown status %x\n", cmd,
3152 cmd->err_info->CommandStatus);
1a614f50
SC		 3153 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3154 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3155 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3156 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3157 }
d38ae168
MMOD		 3158
3159after_error_processing:
3160
1da177e4 3161 /* We need to return this command */
7c832835
BH		 3162 if (retry_cmd) {
3163 resend_cciss_cmd(h, cmd);
1da177e4 3164 return;
7c832835 3165 }
03bbfee5 3166 cmd->rq->completion_data = cmd;
a9925a06 3167 blk_complete_request(cmd->rq);
1da177e4
LT		 3168}
3169
0c2b3908
MM		 3170static inline u32 cciss_tag_contains_index(u32 tag)
3171{
5e216153 3172#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3173 return tag & DIRECT_LOOKUP_BIT;
3174}
3175
3176static inline u32 cciss_tag_to_index(u32 tag)
3177{
5e216153 3178#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3179 return tag >> DIRECT_LOOKUP_SHIFT;
3180}
3181
3182static inline u32 cciss_tag_discard_error_bits(u32 tag)
3183{
3184#define CCISS_ERROR_BITS 0x03
3185 return tag & ~CCISS_ERROR_BITS;
3186}
3187
3188static inline void cciss_mark_tag_indexed(u32 *tag)
3189{
3190 *tag |= DIRECT_LOOKUP_BIT;
3191}
3192
3193static inline void cciss_set_tag_index(u32 *tag, u32 index)
3194{
3195 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3196}
3197
7c832835
BH		 3198/*
3199 * Get a request and submit it to the controller.
1da177e4 3200 */
165125e1 3201static void do_cciss_request(struct request_queue *q)
1da177e4 3202{
7c832835 3203 ctlr_info_t *h = q->queuedata;
1da177e4 3204 CommandList_struct *c;
00988a35
MMOD		 3205 sector_t start_blk;
3206 int seg;
1da177e4
LT		 3207 struct request *creq;
3208 u64bit temp64;
5c07a311
DB		 3209 struct scatterlist *tmp_sg;
3210 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3211 drive_info_struct *drv;
3212 int i, dir;
5c07a311
DB		 3213 int sg_index = 0;
3214 int chained = 0;
1da177e4
LT		 3215
3216 /* We call start_io here in case there is a command waiting on the
3217 * queue that has not been sent.
7c832835 3218 */
1da177e4
LT		 3219 if (blk_queue_plugged(q))
3220 goto startio;
3221
7c832835 3222 queue:
9934c8c0 3223 creq = blk_peek_request(q);
1da177e4
LT		 3224 if (!creq)
3225 goto startio;
3226
5c07a311 3227 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3228
6b4d96b8
SC		 3229 c = cmd_alloc(h);
3230 if (!c)
1da177e4
LT		 3231 goto full;
3232
9934c8c0 3233 blk_start_request(creq);
1da177e4 3234
5c07a311 3235 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3236 spin_unlock_irq(q->queue_lock);
3237
3238 c->cmd_type = CMD_RWREQ;
3239 c->rq = creq;
7c832835
BH		 3240
3241 /* fill in the request */
1da177e4 3242 drv = creq->rq_disk->private_data;
b028461d 3243 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3244 /* got command from pool, so use the command block index instead */
3245 /* for direct lookups. */
3246 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3247 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3248 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3249 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3250 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3251 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3252 c->Request.Type.Attribute = ATTR_SIMPLE;
3253 c->Request.Type.Direction =
a52de245 3254 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3255 c->Request.Timeout = 0; /* Don't time out */
7c832835 3256 c->Request.CDB[0] =
00988a35 3257 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3258 start_blk = blk_rq_pos(creq);
b2a4a43d 3259 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3260 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3261 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3262 seg = blk_rq_map_sg(q, creq, tmp_sg);
3263
7c832835 3264 /* get the DMA records for the setup */
1da177e4
LT		 3265 if (c->Request.Type.Direction == XFER_READ)
3266 dir = PCI_DMA_FROMDEVICE;
3267 else
3268 dir = PCI_DMA_TODEVICE;
3269
5c07a311
DB		 3270 curr_sg = c->SG;
3271 sg_index = 0;
3272 chained = 0;
3273
7c832835 3274 for (i = 0; i < seg; i++) {
5c07a311
DB		 3275 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3276 !chained && ((seg - i) > 1)) {
5c07a311 3277 /* Point to next chain block. */
dccc9b56 3278 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3279 sg_index = 0;
3280 chained = 1;
3281 }
3282 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3283 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3284 tmp_sg[i].offset,
3285 tmp_sg[i].length, dir);
3286 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3287 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3288 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3289 ++sg_index;
1da177e4 3290 }
d45033ef
SC		 3291 if (chained)
3292 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3293 (seg - (h->max_cmd_sgentries - 1)) *
3294 sizeof(SGDescriptor_struct));
5c07a311 3295
7c832835
BH		 3296 /* track how many SG entries we are using */
3297 if (seg > h->maxSG)
3298 h->maxSG = seg;
1da177e4 3299
b2a4a43d 3300 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3301 "chained[%d]\n",
3302 blk_rq_sectors(creq), seg, chained);
1da177e4 3303
5e216153
MM		 3304 c->Header.SGTotal = seg + chained;
3305 if (seg <= h->max_cmd_sgentries)
3306 c->Header.SGList = c->Header.SGTotal;
3307 else
5c07a311 3308 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3309 set_performant_mode(h, c);
5c07a311 3310
33659ebb 3311 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3312 if(h->cciss_read == CCISS_READ_10) {
3313 c->Request.CDB[1] = 0;
b028461d 3314 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3315 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3316 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3317 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3318 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3319 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3320 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3321 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3322 } else {
582539e5
RD		 3323 u32 upper32 = upper_32_bits(start_blk);
3324
03bbfee5
MMOD		 3325 c->Request.CDBLen = 16;
3326 c->Request.CDB[1]= 0;
b028461d 3327 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3328 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3329 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3330 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3331 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3332 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3333 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3334 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3335 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3336 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3337 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3338 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3339 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3340 }
33659ebb 3341 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3342 c->Request.CDBLen = creq->cmd_len;
3343 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3344 } else {
b2a4a43d
SC		 3345 dev_warn(&h->pdev->dev, "bad request type %d\n",
3346 creq->cmd_type);
03bbfee5 3347 BUG();
00988a35 3348 }
1da177e4
LT		 3349
3350 spin_lock_irq(q->queue_lock);
3351
8a3173de 3352 addQ(&h->reqQ, c);
1da177e4 3353 h->Qdepth++;
7c832835
BH		 3354 if (h->Qdepth > h->maxQsinceinit)
3355 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3356
3357 goto queue;
00988a35 3358full:
1da177e4 3359 blk_stop_queue(q);
00988a35 3360startio:
1da177e4
LT		 3361 /* We will already have the driver lock here so not need
3362 * to lock it.
7c832835 3363 */
1da177e4
LT		 3364 start_io(h);
3365}
3366
3da8b713 3367static inline unsigned long get_next_completion(ctlr_info_t *h)
3368{
3da8b713 3369 return h->access.command_completed(h);
3da8b713 3370}
3371
3372static inline int interrupt_pending(ctlr_info_t *h)
3373{
3da8b713 3374 return h->access.intr_pending(h);
3da8b713 3375}
3376
3377static inline long interrupt_not_for_us(ctlr_info_t *h)
3378{
81125860 3379 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3380 (h->interrupts_enabled == 0));
3da8b713 3381}
3382
0c2b3908
MM		 3383static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3384 u32 raw_tag)
1da177e4 3385{
0c2b3908
MM		 3386 if (unlikely(tag_index >= h->nr_cmds)) {
3387 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3388 return 1;
3389 }
3390 return 0;
3391}
3392
3393static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3394 u32 raw_tag)
3395{
3396 removeQ(c);
3397 if (likely(c->cmd_type == CMD_RWREQ))
3398 complete_command(h, c, 0);
3399 else if (c->cmd_type == CMD_IOCTL_PEND)
3400 complete(c->waiting);
3401#ifdef CONFIG_CISS_SCSI_TAPE
3402 else if (c->cmd_type == CMD_SCSI)
3403 complete_scsi_command(c, 0, raw_tag);
3404#endif
3405}
3406
29979a71
MM		 3407static inline u32 next_command(ctlr_info_t *h)
3408{
3409 u32 a;
3410
3411 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3412 return h->access.command_completed(h);
3413
3414 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3415 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3416 (h->reply_pool_head)++;
3417 h->commands_outstanding--;
3418 } else {
3419 a = FIFO_EMPTY;
3420 }
3421 /* Check for wraparound */
3422 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3423 h->reply_pool_head = h->reply_pool;
3424 h->reply_pool_wraparound ^= 1;
3425 }
3426 return a;
3427}
3428
0c2b3908
MM		 3429/* process completion of an indexed ("direct lookup") command */
3430static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3431{
3432 u32 tag_index;
1da177e4 3433 CommandList_struct *c;
0c2b3908
MM		 3434
3435 tag_index = cciss_tag_to_index(raw_tag);
3436 if (bad_tag(h, tag_index, raw_tag))
5e216153 3437 return next_command(h);
0c2b3908
MM		 3438 c = h->cmd_pool + tag_index;
3439 finish_cmd(h, c, raw_tag);
5e216153 3440 return next_command(h);
0c2b3908
MM		 3441}
3442
3443/* process completion of a non-indexed command */
3444static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3445{
3446 u32 tag;
3447 CommandList_struct *c = NULL;
3448 struct hlist_node *tmp;
3449 __u32 busaddr_masked, tag_masked;
3450
3451 tag = cciss_tag_discard_error_bits(raw_tag);
3452 hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
3453 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3454 tag_masked = cciss_tag_discard_error_bits(tag);
3455 if (busaddr_masked == tag_masked) {
3456 finish_cmd(h, c, raw_tag);
5e216153 3457 return next_command(h);
0c2b3908
MM		 3458 }
3459 }
3460 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3461 return next_command(h);
0c2b3908
MM		 3462}
3463
3464static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3465{
3466 ctlr_info_t *h = dev_id;
1da177e4 3467 unsigned long flags;
0c2b3908 3468 u32 raw_tag;
1da177e4 3469
3da8b713 3470 if (interrupt_not_for_us(h))
1da177e4 3471 return IRQ_NONE;
f70dba83 3472 spin_lock_irqsave(&h->lock, flags);
3da8b713 3473 while (interrupt_pending(h)) {
0c2b3908
MM		 3474 raw_tag = get_next_completion(h);
3475 while (raw_tag != FIFO_EMPTY) {
3476 if (cciss_tag_contains_index(raw_tag))
3477 raw_tag = process_indexed_cmd(h, raw_tag);
3478 else
3479 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3480 }
3481 }
f70dba83 3482 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3483 return IRQ_HANDLED;
3484}
1da177e4 3485
0c2b3908
MM		 3486/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3487 * check the interrupt pending register because it is not set.
3488 */
3489static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3490{
3491 ctlr_info_t *h = dev_id;
3492 unsigned long flags;
3493 u32 raw_tag;
8a3173de 3494
f70dba83 3495 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3496 raw_tag = get_next_completion(h);
3497 while (raw_tag != FIFO_EMPTY) {
3498 if (cciss_tag_contains_index(raw_tag))
3499 raw_tag = process_indexed_cmd(h, raw_tag);
3500 else
3501 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3502 }
f70dba83 3503 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3504 return IRQ_HANDLED;
3505}
7c832835 3506
b368c9dd
AP		 3507/**
3508 * add_to_scan_list() - add controller to rescan queue
3509 * @h: Pointer to the controller.
3510 *
3511 * Adds the controller to the rescan queue if not already on the queue.
3512 *
3513 * returns 1 if added to the queue, 0 if skipped (could be on the
3514 * queue already, or the controller could be initializing or shutting
3515 * down).
3516 **/
3517static int add_to_scan_list(struct ctlr_info *h)
3518{
3519 struct ctlr_info *test_h;
3520 int found = 0;
3521 int ret = 0;
3522
3523 if (h->busy_initializing)
3524 return 0;
3525
3526 if (!mutex_trylock(&h->busy_shutting_down))
3527 return 0;
3528
3529 mutex_lock(&scan_mutex);
3530 list_for_each_entry(test_h, &scan_q, scan_list) {
3531 if (test_h == h) {
3532 found = 1;
3533 break;
3534 }
3535 }
3536 if (!found && !h->busy_scanning) {
3537 INIT_COMPLETION(h->scan_wait);
3538 list_add_tail(&h->scan_list, &scan_q);
3539 ret = 1;
3540 }
3541 mutex_unlock(&scan_mutex);
3542 mutex_unlock(&h->busy_shutting_down);
3543
3544 return ret;
3545}
3546
3547/**
3548 * remove_from_scan_list() - remove controller from rescan queue
3549 * @h: Pointer to the controller.
3550 *
3551 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3552 * the controller is currently conducting a rescan. The controller
3553 * can be in one of three states:
3554 * 1. Doesn't need a scan
3555 * 2. On the scan list, but not scanning yet (we remove it)
3556 * 3. Busy scanning (and not on the list). In this case we want to wait for
3557 * the scan to complete to make sure the scanning thread for this
3558 * controller is completely idle.
b368c9dd
AP		 3559 **/
3560static void remove_from_scan_list(struct ctlr_info *h)
3561{
3562 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3563
3564 mutex_lock(&scan_mutex);
3565 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3566 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3567 list_del(&h->scan_list);
3568 complete_all(&h->scan_wait);
3569 mutex_unlock(&scan_mutex);
3570 return;
3571 }
3572 }
fd8489cf
SC		 3573 if (h->busy_scanning) { /* state 3. */
3574 mutex_unlock(&scan_mutex);
b368c9dd 3575 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3576 } else { /* state 1, nothing to do. */
3577 mutex_unlock(&scan_mutex);
3578 }
b368c9dd
AP		 3579}
3580
3581/**
3582 * scan_thread() - kernel thread used to rescan controllers
3583 * @data: Ignored.
3584 *
3585 * A kernel thread used scan for drive topology changes on
3586 * controllers. The thread processes only one controller at a time
3587 * using a queue. Controllers are added to the queue using
3588 * add_to_scan_list() and removed from the queue either after done
3589 * processing or using remove_from_scan_list().
3590 *
3591 * returns 0.
3592 **/
0a9279cc
MM		 3593static int scan_thread(void *data)
3594{
b368c9dd 3595 struct ctlr_info *h;
0a9279cc 3596
b368c9dd
AP		 3597 while (1) {
3598 set_current_state(TASK_INTERRUPTIBLE);
3599 schedule();
0a9279cc
MM		 3600 if (kthread_should_stop())
3601 break;
b368c9dd
AP		 3602
3603 while (1) {
3604 mutex_lock(&scan_mutex);
3605 if (list_empty(&scan_q)) {
3606 mutex_unlock(&scan_mutex);
3607 break;
3608 }
3609
3610 h = list_entry(scan_q.next,
3611 struct ctlr_info,
3612 scan_list);
3613 list_del(&h->scan_list);
3614 h->busy_scanning = 1;
3615 mutex_unlock(&scan_mutex);
3616
d06dfbd2
SC		 3617 rebuild_lun_table(h, 0, 0);
3618 complete_all(&h->scan_wait);
3619 mutex_lock(&scan_mutex);
3620 h->busy_scanning = 0;
3621 mutex_unlock(&scan_mutex);
b368c9dd 3622 }
0a9279cc 3623 }
b368c9dd 3624
0a9279cc
MM		 3625 return 0;
3626}
3627
3628static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3629{
3630 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3631 return 0;
3632
3633 switch (c->err_info->SenseInfo[12]) {
3634 case STATE_CHANGED:
b2a4a43d
SC		 3635 dev_warn(&h->pdev->dev, "a state change "
3636 "detected, command retried\n");
0a9279cc
MM		 3637 return 1;
3638 break;
3639 case LUN_FAILED:
b2a4a43d
SC		 3640 dev_warn(&h->pdev->dev, "LUN failure "
3641 "detected, action required\n");
0a9279cc
MM		 3642 return 1;
3643 break;
3644 case REPORT_LUNS_CHANGED:
b2a4a43d 3645 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3646 /*
3647 * Here, we could call add_to_scan_list and wake up the scan thread,
3648 * except that it's quite likely that we will get more than one
3649 * REPORT_LUNS_CHANGED condition in quick succession, which means
3650 * that those which occur after the first one will likely happen
3651 * *during* the scan_thread's rescan. And the rescan code is not
3652 * robust enough to restart in the middle, undoing what it has already
3653 * done, and it's not clear that it's even possible to do this, since
3654 * part of what it does is notify the block layer, which starts
3655 * doing it's own i/o to read partition tables and so on, and the
3656 * driver doesn't have visibility to know what might need undoing.
3657 * In any event, if possible, it is horribly complicated to get right
3658 * so we just don't do it for now.
3659 *
3660 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3661 */
0a9279cc
MM		 3662 return 1;
3663 break;
3664 case POWER_OR_RESET:
b2a4a43d
SC		 3665 dev_warn(&h->pdev->dev,
3666 "a power on or device reset detected\n");
0a9279cc
MM		 3667 return 1;
3668 break;
3669 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3670 dev_warn(&h->pdev->dev,
3671 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3672 return 1;
3673 break;
3674 default:
b2a4a43d
SC		 3675 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3676 return 1;
0a9279cc
MM		 3677 }
3678}
3679
7c832835 3680/*
d14c4ab5 3681 * We cannot read the structure directly, for portability we must use
1da177e4 3682 * the io functions.
7c832835 3683 * This is for debug only.
1da177e4 3684 */
b2a4a43d 3685static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3686{
3687 int i;
3688 char temp_name[17];
b2a4a43d 3689 CfgTable_struct *tb = h->cfgtable;
1da177e4 3690
b2a4a43d
SC		 3691 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3692 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3693 for (i = 0; i < 4; i++)
1da177e4 3694 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3695 temp_name[4] = '\0';
b2a4a43d
SC		 3696 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3697 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3698 readl(&(tb->SpecValence)));
3699 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3700 readl(&(tb->TransportSupport)));
b2a4a43d 3701 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3702 readl(&(tb->TransportActive)));
b2a4a43d 3703 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3704 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3705 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3706 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3707 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3708 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3709 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3710 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3711 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3712 readl(&(tb->BusTypes)));
7c832835 3713 for (i = 0; i < 16; i++)
1da177e4
LT		 3714 temp_name[i] = readb(&(tb->ServerName[i]));
3715 temp_name[16] = '\0';
b2a4a43d
SC		 3716 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3717 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3718 readl(&(tb->HeartBeat)));
1da177e4 3719}
1da177e4 3720
7c832835 3721static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3722{
3723 int i, offset, mem_type, bar_type;
7c832835 3724 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3725 return 0;
3726 offset = 0;
7c832835
BH		 3727 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3728 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3729 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3730 offset += 4;
3731 else {
3732 mem_type = pci_resource_flags(pdev, i) &
7c832835 3733 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3734 switch (mem_type) {
7c832835
BH		 3735 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3736 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3737 offset += 4; /* 32 bit */
3738 break;
3739 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3740 offset += 8;
3741 break;
3742 default: /* reserved in PCI 2.2 */
b2a4a43d 3743 dev_warn(&pdev->dev,
7c832835
BH		 3744 "Base address is invalid\n");
3745 return -1;
1da177e4
LT		 3746 break;
3747 }
3748 }
7c832835
BH		 3749 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3750 return i + 1;
1da177e4
LT		 3751 }
3752 return -1;
3753}
3754
5e216153
MM		 3755/* Fill in bucket_map[], given nsgs (the max number of
3756 * scatter gather elements supported) and bucket[],
3757 * which is an array of 8 integers. The bucket[] array
3758 * contains 8 different DMA transfer sizes (in 16
3759 * byte increments) which the controller uses to fetch
3760 * commands. This function fills in bucket_map[], which
3761 * maps a given number of scatter gather elements to one of
3762 * the 8 DMA transfer sizes. The point of it is to allow the
3763 * controller to only do as much DMA as needed to fetch the
3764 * command, with the DMA transfer size encoded in the lower
3765 * bits of the command address.
3766 */
3767static void calc_bucket_map(int bucket[], int num_buckets,
3768 int nsgs, int *bucket_map)
3769{
3770 int i, j, b, size;
3771
3772 /* even a command with 0 SGs requires 4 blocks */
3773#define MINIMUM_TRANSFER_BLOCKS 4
3774#define NUM_BUCKETS 8
3775 /* Note, bucket_map must have nsgs+1 entries. */
3776 for (i = 0; i <= nsgs; i++) {
3777 /* Compute size of a command with i SG entries */
3778 size = i + MINIMUM_TRANSFER_BLOCKS;
3779 b = num_buckets; /* Assume the biggest bucket */
3780 /* Find the bucket that is just big enough */
3781 for (j = 0; j < 8; j++) {
3782 if (bucket[j] >= size) {
3783 b = j;
3784 break;
3785 }
3786 }
3787 /* for a command with i SG entries, use bucket b. */
3788 bucket_map[i] = b;
3789 }
3790}
3791
0f8a6a1e
SC		 3792static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3793{
3794 int i;
3795
3796 /* under certain very rare conditions, this can take awhile.
3797 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3798 * as we enter this code.) */
3799 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3800 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3801 break;
3802 msleep(10);
3803 }
3804}
3805
b9933135
SC		 3806static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3807{
3808 /* This is a bit complicated. There are 8 registers on
3809 * the controller which we write to to tell it 8 different
3810 * sizes of commands which there may be. It's a way of
3811 * reducing the DMA done to fetch each command. Encoded into
3812 * each command's tag are 3 bits which communicate to the controller
3813 * which of the eight sizes that command fits within. The size of
3814 * each command depends on how many scatter gather entries there are.
3815 * Each SG entry requires 16 bytes. The eight registers are programmed
3816 * with the number of 16-byte blocks a command of that size requires.
3817 * The smallest command possible requires 5 such 16 byte blocks.
3818 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3819 * blocks. Note, this only extends to the SG entries contained
3820 * within the command block, and does not extend to chained blocks
3821 * of SG elements. bft[] contains the eight values we write to
3822 * the registers. They are not evenly distributed, but have more
3823 * sizes for small commands, and fewer sizes for larger commands.
3824 */
5e216153 3825 __u32 trans_offset;
b9933135 3826 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3827 /*
3828 * 5 = 1 s/g entry or 4k
3829 * 6 = 2 s/g entry or 8k
3830 * 8 = 4 s/g entry or 16k
3831 * 10 = 6 s/g entry or 24k
3832 */
5e216153 3833 unsigned long register_value;
5e216153
MM		 3834 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3835
5e216153
MM		 3836 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3837
3838 /* Controller spec: zero out this buffer. */
3839 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3840 h->reply_pool_head = h->reply_pool;
3841
3842 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3843 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3844 h->blockFetchTable);
3845 writel(bft[0], &h->transtable->BlockFetch0);
3846 writel(bft[1], &h->transtable->BlockFetch1);
3847 writel(bft[2], &h->transtable->BlockFetch2);
3848 writel(bft[3], &h->transtable->BlockFetch3);
3849 writel(bft[4], &h->transtable->BlockFetch4);
3850 writel(bft[5], &h->transtable->BlockFetch5);
3851 writel(bft[6], &h->transtable->BlockFetch6);
3852 writel(bft[7], &h->transtable->BlockFetch7);
3853
3854 /* size of controller ring buffer */
3855 writel(h->max_commands, &h->transtable->RepQSize);
3856 writel(1, &h->transtable->RepQCount);
3857 writel(0, &h->transtable->RepQCtrAddrLow32);
3858 writel(0, &h->transtable->RepQCtrAddrHigh32);
3859 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3860 writel(0, &h->transtable->RepQAddr0High32);
3861 writel(CFGTBL_Trans_Performant,
3862 &(h->cfgtable->HostWrite.TransportRequest));
3863
5e216153 3864 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3865 cciss_wait_for_mode_change_ack(h);
5e216153 3866 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3867 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3868 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3869 " performant mode\n");
b9933135
SC		 3870}
3871
3872static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3873{
3874 __u32 trans_support;
3875
3876 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3877 /* Attempt to put controller into performant mode if supported */
3878 /* Does board support performant mode? */
3879 trans_support = readl(&(h->cfgtable->TransportSupport));
3880 if (!(trans_support & PERFORMANT_MODE))
3881 return;
3882
b2a4a43d 3883 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 3884 /* Performant mode demands commands on a 32 byte boundary
3885 * pci_alloc_consistent aligns on page boundarys already.
3886 * Just need to check if divisible by 32
3887 */
3888 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3889 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 3890 "cciss info: command size[",
3891 (int)sizeof(CommandList_struct),
3892 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 3893 return;
3894 }
3895
b9933135
SC		 3896 /* Performant mode ring buffer and supporting data structures */
3897 h->reply_pool = (__u64 *)pci_alloc_consistent(
3898 h->pdev, h->max_commands * sizeof(__u64),
3899 &(h->reply_pool_dhandle));
3900
3901 /* Need a block fetch table for performant mode */
3902 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3903 sizeof(__u32)), GFP_KERNEL);
3904
3905 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3906 goto clean_up;
3907
3908 cciss_enter_performant_mode(h);
3909
5e216153
MM		 3910 /* Change the access methods to the performant access methods */
3911 h->access = SA5_performant_access;
b9933135 3912 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 3913
3914 return;
3915clean_up:
3916 kfree(h->blockFetchTable);
3917 if (h->reply_pool)
3918 pci_free_consistent(h->pdev,
3919 h->max_commands * sizeof(__u64),
3920 h->reply_pool,
3921 h->reply_pool_dhandle);
3922 return;
3923
3924} /* cciss_put_controller_into_performant_mode */
3925
fb86a35b
MM		 3926/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3927 * controllers that are capable. If not, we use IO-APIC mode.
3928 */
3929
f70dba83 3930static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 3931{
3932#ifdef CONFIG_PCI_MSI
7c832835
BH		 3933 int err;
3934 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3935 {0, 2}, {0, 3}
3936 };
fb86a35b
MM		 3937
3938 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 3939 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3940 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 3941 goto default_int_mode;
3942
f70dba83
SC		 3943 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3944 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 3945 if (!err) {
f70dba83
SC		 3946 h->intr[0] = cciss_msix_entries[0].vector;
3947 h->intr[1] = cciss_msix_entries[1].vector;
3948 h->intr[2] = cciss_msix_entries[2].vector;
3949 h->intr[3] = cciss_msix_entries[3].vector;
3950 h->msix_vector = 1;
7c832835
BH		 3951 return;
3952 }
3953 if (err > 0) {
b2a4a43d
SC		 3954 dev_warn(&h->pdev->dev,
3955 "only %d MSI-X vectors available\n", err);
1ecb9c0f 3956 goto default_int_mode;
7c832835 3957 } else {
b2a4a43d
SC		 3958 dev_warn(&h->pdev->dev,
3959 "MSI-X init failed %d\n", err);
1ecb9c0f 3960 goto default_int_mode;
7c832835
BH		 3961 }
3962 }
f70dba83
SC		 3963 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3964 if (!pci_enable_msi(h->pdev))
3965 h->msi_vector = 1;
3966 else
b2a4a43d 3967 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 3968 }
1ecb9c0f 3969default_int_mode:
7c832835 3970#endif /* CONFIG_PCI_MSI */
fb86a35b 3971 /* if we get here we're going to use the default interrupt mode */
f70dba83 3972 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM		 3973 return;
3974}
3975
6539fa9b 3976static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 3977{
6539fa9b
SC		 3978 int i;
3979 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 3980
3981 subsystem_vendor_id = pdev->subsystem_vendor;
3982 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 3983 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3984 subsystem_vendor_id;
2ec24ff1
SC		 3985
3986 for (i = 0; i < ARRAY_SIZE(products); i++) {
3987 /* Stand aside for hpsa driver on request */
3988 if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
3989 return -ENODEV;
6539fa9b
SC		 3990 if (*board_id == products[i].board_id)
3991 return i;
2ec24ff1 3992 }
6539fa9b
SC		 3993 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3994 *board_id);
3995 return -ENODEV;
3996}
1da177e4 3997
dd9c426e
SC		 3998static inline bool cciss_board_disabled(ctlr_info_t *h)
3999{
4000 u16 command;
1da177e4 4001
dd9c426e
SC		 4002 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4003 return ((command & PCI_COMMAND_MEMORY) == 0);
4004}
1da177e4 4005
d474830d
SC		 4006static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4007 unsigned long *memory_bar)
4008{
4009 int i;
4e570309 4010
d474830d
SC		 4011 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4012 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4013 /* addressing mode bits already removed */
4014 *memory_bar = pci_resource_start(pdev, i);
4015 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4016 *memory_bar);
4017 return 0;
4018 }
4019 dev_warn(&pdev->dev, "no memory BAR found\n");
4020 return -ENODEV;
4021}
1da177e4 4022
e99ba136
SC		 4023static int __devinit cciss_wait_for_board_ready(ctlr_info_t *h)
4024{
4025 int i;
4026 u32 scratchpad;
1da177e4 4027
e99ba136
SC		 4028 for (i = 0; i < CCISS_BOARD_READY_ITERATIONS; i++) {
4029 scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4030 if (scratchpad == CCISS_FIRMWARE_READY)
4031 return 0;
4032 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4033 }
e99ba136
SC		 4034 dev_warn(&h->pdev->dev, "board not ready, timed out.\n");
4035 return -ENODEV;
4036}
e1438581 4037
8e93bf6d
SC		 4038static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4039 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4040 u64 *cfg_offset)
4041{
4042 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4043 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4044 *cfg_base_addr &= (u32) 0x0000ffff;
4045 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4046 if (*cfg_base_addr_index == -1) {
4047 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4048 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4049 return -ENODEV;
4050 }
4051 return 0;
4052}
1da177e4 4053
4809d098
SC		 4054static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4055{
4056 u64 cfg_offset;
4057 u32 cfg_base_addr;
4058 u64 cfg_base_addr_index;
4059 u32 trans_offset;
8e93bf6d 4060 int rc;
1da177e4 4061
8e93bf6d
SC		 4062 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4063 &cfg_base_addr_index, &cfg_offset);
4064 if (rc)
4065 return rc;
4809d098 4066 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4067 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4068 if (!h->cfgtable)
4069 return -ENOMEM;
4070 /* Find performant mode table. */
8e93bf6d 4071 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4072 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4073 cfg_base_addr_index)+cfg_offset+trans_offset,
4074 sizeof(*h->transtable));
4075 if (!h->transtable)
4076 return -ENOMEM;
4077 return 0;
4078}
1da177e4 4079
adfbc1ff
SC		 4080static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4081{
4082 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4083 if (h->max_commands < 16) {
4084 dev_warn(&h->pdev->dev, "Controller reports "
4085 "max supported commands of %d, an obvious lie. "
4086 "Using 16. Ensure that firmware is up to date.\n",
4087 h->max_commands);
4088 h->max_commands = 16;
1da177e4 4089 }
adfbc1ff 4090}
1da177e4 4091
afadbf4b
SC		 4092/* Interrogate the hardware for some limits:
4093 * max commands, max SG elements without chaining, and with chaining,
4094 * SG chain block size, etc.
4095 */
4096static void __devinit cciss_find_board_params(ctlr_info_t *h)
4097{
adfbc1ff 4098 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC		 4099 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4100 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4101 /*
afadbf4b 4102 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4103 * Howvever spec says if 0, use 31
4104 */
afadbf4b
SC		 4105 h->max_cmd_sgentries = 31;
4106 if (h->maxsgentries > 512) {
4107 h->max_cmd_sgentries = 32;
4108 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4109 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4110 } else {
afadbf4b
SC		 4111 h->maxsgentries = 31; /* default to traditional values */
4112 h->chainsize = 0;
5c07a311 4113 }
afadbf4b 4114}
5c07a311 4115
501b92cd
SC		 4116static inline bool CISS_signature_present(ctlr_info_t *h)
4117{
4118 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4119 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4120 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4121 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4122 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4123 return false;
1da177e4 4124 }
501b92cd
SC		 4125 return true;
4126}
4127
322e304c
SC		 4128/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4129static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4130{
1da177e4 4131#ifdef CONFIG_X86
322e304c
SC		 4132 u32 prefetch;
4133
4134 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4135 prefetch |= 0x100;
4136 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4137#endif
322e304c 4138}
1da177e4 4139
bfd63ee5
SC		 4140/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4141 * in a prefetch beyond physical memory.
4142 */
4143static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4144{
4145 u32 dma_prefetch;
4146 __u32 dma_refetch;
4147
4148 if (h->board_id != 0x3225103C)
4149 return;
4150 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4151 dma_prefetch |= 0x8000;
4152 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4153 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4154 dma_refetch |= 0x1;
4155 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4156}
4157
f70dba83 4158static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4159{
4809d098 4160 int prod_index, err;
6539fa9b 4161
f70dba83 4162 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4163 if (prod_index < 0)
2ec24ff1 4164 return -ENODEV;
f70dba83
SC		 4165 h->product_name = products[prod_index].product_name;
4166 h->access = *(products[prod_index].access);
1da177e4 4167
f70dba83 4168 if (cciss_board_disabled(h)) {
b2a4a43d 4169 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4170 return -ENODEV;
1da177e4 4171 }
f70dba83 4172 err = pci_enable_device(h->pdev);
7c832835 4173 if (err) {
b2a4a43d 4174 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4175 return err;
f92e2f5f
MM		 4176 }
4177
f70dba83 4178 err = pci_request_regions(h->pdev, "cciss");
4e570309 4179 if (err) {
b2a4a43d
SC		 4180 dev_warn(&h->pdev->dev,
4181 "Cannot obtain PCI resources, aborting\n");
872225ca 4182 return err;
4e570309 4183 }
1da177e4 4184
b2a4a43d
SC		 4185 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4186 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4187
fb86a35b
MM		 4188/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4189 * else we use the IO-APIC interrupt assigned to us by system ROM.
4190 */
f70dba83
SC		 4191 cciss_interrupt_mode(h);
4192 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4193 if (err)
e1438581 4194 goto err_out_free_res;
f70dba83
SC		 4195 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4196 if (!h->vaddr) {
da550321
SC		 4197 err = -ENOMEM;
4198 goto err_out_free_res;
7c832835 4199 }
f70dba83 4200 err = cciss_wait_for_board_ready(h);
e99ba136 4201 if (err)
4e570309 4202 goto err_out_free_res;
f70dba83 4203 err = cciss_find_cfgtables(h);
4809d098 4204 if (err)
4e570309 4205 goto err_out_free_res;
b2a4a43d 4206 print_cfg_table(h);
f70dba83 4207 cciss_find_board_params(h);
1da177e4 4208
f70dba83 4209 if (!CISS_signature_present(h)) {
c33ac89b 4210 err = -ENODEV;
4e570309 4211 goto err_out_free_res;
1da177e4 4212 }
f70dba83
SC		 4213 cciss_enable_scsi_prefetch(h);
4214 cciss_p600_dma_prefetch_quirk(h);
4215 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4216 return 0;
4217
5faad620 4218err_out_free_res:
872225ca
MM		 4219 /*
4220 * Deliberately omit pci_disable_device(): it does something nasty to
4221 * Smart Array controllers that pci_enable_device does not undo
4222 */
f70dba83
SC		 4223 if (h->transtable)
4224 iounmap(h->transtable);
4225 if (h->cfgtable)
4226 iounmap(h->cfgtable);
4227 if (h->vaddr)
4228 iounmap(h->vaddr);
4229 pci_release_regions(h->pdev);
c33ac89b 4230 return err;
1da177e4
LT		 4231}
4232
6ae5ce8e
MM		 4233/* Function to find the first free pointer into our hba[] array
4234 * Returns -1 if no free entries are left.
7c832835 4235 */
b2a4a43d 4236static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4237{
799202cb 4238 int i;
1da177e4 4239
7c832835 4240 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4241 if (!hba[i]) {
f70dba83 4242 ctlr_info_t *h;
f2912a12 4243
f70dba83
SC		 4244 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4245 if (!h)
1da177e4 4246 goto Enomem;
f70dba83 4247 hba[i] = h;
1da177e4
LT		 4248 return i;
4249 }
4250 }
b2a4a43d 4251 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4252 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4253 return -1;
4254Enomem:
b2a4a43d 4255 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4256 return -1;
4257}
4258
f70dba83 4259static void free_hba(ctlr_info_t *h)
1da177e4 4260{
2c935593 4261 int i;
1da177e4 4262
f70dba83 4263 hba[h->ctlr] = NULL;
2c935593
SC		 4264 for (i = 0; i < h->highest_lun + 1; i++)
4265 if (h->gendisk[i] != NULL)
4266 put_disk(h->gendisk[i]);
4267 kfree(h);
1da177e4
LT		 4268}
4269
82eb03cf
CC		 4270/* Send a message CDB to the firmware. */
4271static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4272{
4273 typedef struct {
4274 CommandListHeader_struct CommandHeader;
4275 RequestBlock_struct Request;
4276 ErrDescriptor_struct ErrorDescriptor;
4277 } Command;
4278 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4279 Command *cmd;
4280 dma_addr_t paddr64;
4281 uint32_t paddr32, tag;
4282 void __iomem *vaddr;
4283 int i, err;
4284
4285 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4286 if (vaddr == NULL)
4287 return -ENOMEM;
4288
4289 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4290 CCISS commands, so they must be allocated from the lower 4GiB of
4291 memory. */
e930438c 4292 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4293 if (err) {
4294 iounmap(vaddr);
4295 return -ENOMEM;
4296 }
4297
4298 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4299 if (cmd == NULL) {
4300 iounmap(vaddr);
4301 return -ENOMEM;
4302 }
4303
4304 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4305 although there's no guarantee, we assume that the address is at
4306 least 4-byte aligned (most likely, it's page-aligned). */
4307 paddr32 = paddr64;
4308
4309 cmd->CommandHeader.ReplyQueue = 0;
4310 cmd->CommandHeader.SGList = 0;
4311 cmd->CommandHeader.SGTotal = 0;
4312 cmd->CommandHeader.Tag.lower = paddr32;
4313 cmd->CommandHeader.Tag.upper = 0;
4314 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4315
4316 cmd->Request.CDBLen = 16;
4317 cmd->Request.Type.Type = TYPE_MSG;
4318 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4319 cmd->Request.Type.Direction = XFER_NONE;
4320 cmd->Request.Timeout = 0; /* Don't time out */
4321 cmd->Request.CDB[0] = opcode;
4322 cmd->Request.CDB[1] = type;
4323 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4324
4325 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4326 cmd->ErrorDescriptor.Addr.upper = 0;
4327 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4328
4329 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4330
4331 for (i = 0; i < 10; i++) {
4332 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4333 if ((tag & ~3) == paddr32)
4334 break;
4335 schedule_timeout_uninterruptible(HZ);
4336 }
4337
4338 iounmap(vaddr);
4339
4340 /* we leak the DMA buffer here ... no choice since the controller could
4341 still complete the command. */
4342 if (i == 10) {
b2a4a43d
SC		 4343 dev_err(&pdev->dev,
4344 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4345 opcode, type);
4346 return -ETIMEDOUT;
4347 }
4348
4349 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4350
4351 if (tag & 2) {
b2a4a43d 4352 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4353 opcode, type);
4354 return -EIO;
4355 }
4356
b2a4a43d 4357 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4358 opcode, type);
4359 return 0;
4360}
4361
4362#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4363#define cciss_noop(p) cciss_message(p, 3, 0)
4364
4365static __devinit int cciss_reset_msi(struct pci_dev *pdev)
4366{
4367/* the #defines are stolen from drivers/pci/msi.h. */
4368#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
4369#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
4370
4371 int pos;
4372 u16 control = 0;
4373
4374 pos = pci_find_capability(pdev, PCI_CAP_ID_MSI);
4375 if (pos) {
4376 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4377 if (control & PCI_MSI_FLAGS_ENABLE) {
b2a4a43d 4378 dev_info(&pdev->dev, "resetting MSI\n");
82eb03cf
CC		 4379 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSI_FLAGS_ENABLE);
4380 }
4381 }
4382
4383 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
4384 if (pos) {
4385 pci_read_config_word(pdev, msi_control_reg(pos), &control);
4386 if (control & PCI_MSIX_FLAGS_ENABLE) {
b2a4a43d 4387 dev_info(&pdev->dev, "resetting MSI-X\n");
82eb03cf
CC		 4388 pci_write_config_word(pdev, msi_control_reg(pos), control & ~PCI_MSIX_FLAGS_ENABLE);
4389 }
4390 }
4391
4392 return 0;
4393}
4394
a6528d01
SC		 4395static int cciss_controller_hard_reset(struct pci_dev *pdev,
4396 void * __iomem vaddr, bool use_doorbell)
82eb03cf 4397{
a6528d01
SC		 4398 u16 pmcsr;
4399 int pos;
82eb03cf 4400
a6528d01
SC		 4401 if (use_doorbell) {
4402 /* For everything after the P600, the PCI power state method
4403 * of resetting the controller doesn't work, so we have this
4404 * other way using the doorbell register.
4405 */
4406 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4407 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4408 msleep(1000);
4409 } else { /* Try to do it the PCI power state way */
4410
4411 /* Quoting from the Open CISS Specification: "The Power
4412 * Management Control/Status Register (CSR) controls the power
4413 * state of the device. The normal operating state is D0,
4414 * CSR=00h. The software off state is D3, CSR=03h. To reset
4415 * the controller, place the interface device in D3 then to D0,
4416 * this causes a secondary PCI reset which will reset the
4417 * controller." */
4418
4419 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4420 if (pos == 0) {
4421 dev_err(&pdev->dev,
4422 "cciss_controller_hard_reset: "
4423 "PCI PM not supported\n");
4424 return -ENODEV;
4425 }
4426 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4427 /* enter the D3hot power management state */
4428 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4429 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4430 pmcsr |= PCI_D3hot;
4431 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4432
a6528d01 4433 msleep(500);
82eb03cf 4434
a6528d01
SC		 4435 /* enter the D0 power management state */
4436 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4437 pmcsr |= PCI_D0;
4438 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4439
a6528d01
SC		 4440 msleep(500);
4441 }
4442 return 0;
4443}
82eb03cf 4444
a6528d01
SC		 4445/* This does a hard reset of the controller using PCI power management
4446 * states or using the doorbell register. */
4447static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4448{
4449 u16 saved_config_space[32];
4450 u64 cfg_offset;
4451 u32 cfg_base_addr;
4452 u64 cfg_base_addr_index;
4453 void __iomem *vaddr;
4454 unsigned long paddr;
4455 u32 misc_fw_support, active_transport;
4456 int rc, i;
4457 CfgTable_struct __iomem *cfgtable;
4458 bool use_doorbell;
058a0f9f 4459 u32 board_id;
a6528d01
SC		 4460
4461 /* For controllers as old a the p600, this is very nearly
4462 * the same thing as
4463 *
4464 * pci_save_state(pci_dev);
4465 * pci_set_power_state(pci_dev, PCI_D3hot);
4466 * pci_set_power_state(pci_dev, PCI_D0);
4467 * pci_restore_state(pci_dev);
4468 *
4469 * but we can't use these nice canned kernel routines on
4470 * kexec, because they also check the MSI/MSI-X state in PCI
4471 * configuration space and do the wrong thing when it is
4472 * set/cleared. Also, the pci_save/restore_state functions
4473 * violate the ordering requirements for restoring the
4474 * configuration space from the CCISS document (see the
4475 * comment below). So we roll our own ....
4476 *
4477 * For controllers newer than the P600, the pci power state
4478 * method of resetting doesn't work so we have another way
4479 * using the doorbell register.
4480 */
82eb03cf 4481
058a0f9f
SC		 4482 /* Exclude 640x boards. These are two pci devices in one slot
4483 * which share a battery backed cache module. One controls the
4484 * cache, the other accesses the cache through the one that controls
4485 * it. If we reset the one controlling the cache, the other will
4486 * likely not be happy. Just forbid resetting this conjoined mess.
4487 */
4488 cciss_lookup_board_id(pdev, &board_id);
4489 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4490 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4491 "due to shared cache module.");
82eb03cf
CC		 4492 return -ENODEV;
4493 }
4494
82eb03cf
CC		 4495 for (i = 0; i < 32; i++)
4496 pci_read_config_word(pdev, 2*i, &saved_config_space[i]);
82eb03cf 4497
a6528d01
SC		 4498 /* find the first memory BAR, so we can find the cfg table */
4499 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4500 if (rc)
4501 return rc;
4502 vaddr = remap_pci_mem(paddr, 0x250);
4503 if (!vaddr)
4504 return -ENOMEM;
82eb03cf 4505
a6528d01
SC		 4506 /* find cfgtable in order to check if reset via doorbell is supported */
4507 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4508 &cfg_base_addr_index, &cfg_offset);
4509 if (rc)
4510 goto unmap_vaddr;
4511 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4512 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4513 if (!cfgtable) {
4514 rc = -ENOMEM;
4515 goto unmap_vaddr;
4516 }
82eb03cf 4517
a6528d01
SC		 4518 /* If reset via doorbell register is supported, use that. */
4519 misc_fw_support = readl(&cfgtable->misc_fw_support);
4520 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
82eb03cf 4521
a6528d01
SC		 4522 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4523 if (rc)
4524 goto unmap_cfgtable;
82eb03cf
CC		 4525
4526 /* Restore the PCI configuration space. The Open CISS
4527 * Specification says, "Restore the PCI Configuration
4528 * Registers, offsets 00h through 60h. It is important to
4529 * restore the command register, 16-bits at offset 04h,
4530 * last. Do not restore the configuration status register,
a6528d01
SC		 4531 * 16-bits at offset 06h." Note that the offset is 2*i.
4532 */
82eb03cf
CC		 4533 for (i = 0; i < 32; i++) {
4534 if (i == 2 || i == 3)
4535 continue;
4536 pci_write_config_word(pdev, 2*i, saved_config_space[i]);
4537 }
4538 wmb();
4539 pci_write_config_word(pdev, 4, saved_config_space[2]);
4540
a6528d01
SC		 4541 /* Some devices (notably the HP Smart Array 5i Controller)
4542 need a little pause here */
4543 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4544
4545 /* Controller should be in simple mode at this point. If it's not,
4546 * It means we're on one of those controllers which doesn't support
4547 * the doorbell reset method and on which the PCI power management reset
4548 * method doesn't work (P800, for example.)
4549 * In those cases, don't try to proceed, as it generally doesn't work.
4550 */
4551 active_transport = readl(&cfgtable->TransportActive);
4552 if (active_transport & PERFORMANT_MODE) {
4553 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4554 " Ignoring controller.\n");
4555 rc = -ENODEV;
4556 }
4557
4558unmap_cfgtable:
4559 iounmap(cfgtable);
4560
4561unmap_vaddr:
4562 iounmap(vaddr);
4563 return rc;
82eb03cf
CC		 4564}
4565
83123cb1
SC		 4566static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4567{
a6528d01 4568 int rc, i;
83123cb1
SC		 4569
4570 if (!reset_devices)
4571 return 0;
4572
a6528d01
SC		 4573 /* Reset the controller with a PCI power-cycle or via doorbell */
4574 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4575
a6528d01
SC		 4576 /* -ENOTSUPP here means we cannot reset the controller
4577 * but it's already (and still) up and running in
058a0f9f
SC		 4578 * "performant mode". Or, it might be 640x, which can't reset
4579 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4580 */
4581 if (rc == -ENOTSUPP)
4582 return 0; /* just try to do the kdump anyhow. */
4583 if (rc)
4584 return -ENODEV;
4585 if (cciss_reset_msi(pdev))
4586 return -ENODEV;
83123cb1
SC		 4587
4588 /* Now try to get the controller to respond to a no-op */
4589 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4590 if (cciss_noop(pdev) == 0)
4591 break;
4592 else
4593 dev_warn(&pdev->dev, "no-op failed%s\n",
4594 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4595 "; re-trying" : ""));
4596 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4597 }
82eb03cf
CC		 4598 return 0;
4599}
4600
1da177e4
LT		 4601/*
4602 * This is it. Find all the controllers and register them. I really hate
4603 * stealing all these major device numbers.
4604 * returns the number of block devices registered.
4605 */
4606static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4607 const struct pci_device_id *ent)
1da177e4 4608{
1da177e4 4609 int i;
799202cb 4610 int j = 0;
5c07a311 4611 int k = 0;
1da177e4 4612 int rc;
22bece00 4613 int dac, return_code;
212a5026 4614 InquiryData_struct *inq_buff;
f70dba83 4615 ctlr_info_t *h;
1da177e4 4616
83123cb1
SC		 4617 rc = cciss_init_reset_devices(pdev);
4618 if (rc)
4619 return rc;
b2a4a43d 4620 i = alloc_cciss_hba(pdev);
7c832835 4621 if (i < 0)
e2019b58 4622 return -1;
1f8ef380 4623
f70dba83
SC		 4624 h = hba[i];
4625 h->pdev = pdev;
4626 h->busy_initializing = 1;
4627 INIT_HLIST_HEAD(&h->cmpQ);
4628 INIT_HLIST_HEAD(&h->reqQ);
4629 mutex_init(&h->busy_shutting_down);
1f8ef380 4630
f70dba83 4631 if (cciss_pci_init(h) != 0)
2cfa948c 4632 goto clean_no_release_regions;
1da177e4 4633
f70dba83
SC		 4634 sprintf(h->devname, "cciss%d", i);
4635 h->ctlr = i;
1da177e4 4636
f70dba83 4637 init_completion(&h->scan_wait);
b368c9dd 4638
f70dba83 4639 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4640 goto clean0;
4641
1da177e4 4642 /* configure PCI DMA stuff */
6a35528a 4643 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4644 dac = 1;
284901a9 4645 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4646 dac = 0;
1da177e4 4647 else {
b2a4a43d 4648 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4649 goto clean1;
4650 }
4651
4652 /*
4653 * register with the major number, or get a dynamic major number
4654 * by passing 0 as argument. This is done for greater than
4655 * 8 controller support.
4656 */
4657 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 4658 h->major = COMPAQ_CISS_MAJOR + i;
4659 rc = register_blkdev(h->major, h->devname);
7c832835 4660 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 4661 dev_err(&h->pdev->dev,
4662 "Unable to get major number %d for %s "
f70dba83 4663 "on hba %d\n", h->major, h->devname, i);
1da177e4 4664 goto clean1;
7c832835 4665 } else {
1da177e4 4666 if (i >= MAX_CTLR_ORIG)
f70dba83 4667 h->major = rc;
1da177e4
LT		 4668 }
4669
4670 /* make sure the board interrupts are off */
f70dba83
SC		 4671 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4672 if (h->msi_vector || h->msix_vector) {
4673 if (request_irq(h->intr[PERF_MODE_INT],
0c2b3908 4674 do_cciss_msix_intr,
f70dba83 4675 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4676 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4677 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4678 goto clean2;
4679 }
4680 } else {
f70dba83
SC		 4681 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4682 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4683 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4684 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4685 goto clean2;
4686 }
1da177e4 4687 }
40aabb58 4688
b2a4a43d 4689 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC		 4690 h->devname, pdev->device, pci_name(pdev),
4691 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4692
f70dba83
SC		 4693 h->cmd_pool_bits =
4694 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4695 * sizeof(unsigned long), GFP_KERNEL);
f70dba83
SC		 4696 h->cmd_pool = (CommandList_struct *)
4697 pci_alloc_consistent(h->pdev,
4698 h->nr_cmds * sizeof(CommandList_struct),
4699 &(h->cmd_pool_dhandle));
4700 h->errinfo_pool = (ErrorInfo_struct *)
4701 pci_alloc_consistent(h->pdev,
4702 h->nr_cmds * sizeof(ErrorInfo_struct),
4703 &(h->errinfo_pool_dhandle));
4704 if ((h->cmd_pool_bits == NULL)
4705 || (h->cmd_pool == NULL)
4706 || (h->errinfo_pool == NULL)) {
b2a4a43d 4707 dev_err(&h->pdev->dev, "out of memory");
1da177e4
LT		 4708 goto clean4;
4709 }
5c07a311
DB		 4710
4711 /* Need space for temp scatter list */
f70dba83 4712 h->scatter_list = kmalloc(h->max_commands *
5c07a311
DB		 4713 sizeof(struct scatterlist *),
4714 GFP_KERNEL);
f70dba83
SC		 4715 for (k = 0; k < h->nr_cmds; k++) {
4716 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4717 h->maxsgentries,
5c07a311 4718 GFP_KERNEL);
f70dba83 4719 if (h->scatter_list[k] == NULL) {
b2a4a43d
SC		 4720 dev_err(&h->pdev->dev,
4721 "could not allocate s/g lists\n");
5c07a311
DB		 4722 goto clean4;
4723 }
4724 }
f70dba83
SC		 4725 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4726 h->chainsize, h->nr_cmds);
4727 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 4728 goto clean4;
5c07a311 4729
f70dba83 4730 spin_lock_init(&h->lock);
1da177e4 4731
7c832835 4732 /* Initialize the pdev driver private data.
f70dba83
SC		 4733 have it point to h. */
4734 pci_set_drvdata(pdev, h);
7c832835
BH		 4735 /* command and error info recs zeroed out before
4736 they are used */
f70dba83
SC		 4737 memset(h->cmd_pool_bits, 0,
4738 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4739 * sizeof(unsigned long));
1da177e4 4740
f70dba83
SC		 4741 h->num_luns = 0;
4742 h->highest_lun = -1;
6ae5ce8e 4743 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 4744 h->drv[j] = NULL;
4745 h->gendisk[j] = NULL;
6ae5ce8e 4746 }
1da177e4 4747
f70dba83 4748 cciss_scsi_setup(h);
1da177e4
LT		 4749
4750 /* Turn the interrupts on so we can service requests */
f70dba83 4751 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 4752
22bece00
MM		 4753 /* Get the firmware version */
4754 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4755 if (inq_buff == NULL) {
b2a4a43d 4756 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 4757 goto clean4;
4758 }
4759
f70dba83 4760 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 4761 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 4762 if (return_code == IO_OK) {
f70dba83
SC		 4763 h->firm_ver[0] = inq_buff->data_byte[32];
4764 h->firm_ver[1] = inq_buff->data_byte[33];
4765 h->firm_ver[2] = inq_buff->data_byte[34];
4766 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 4767 } else { /* send command failed */
b2a4a43d 4768 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 4769 " version of controller\n");
4770 }
212a5026 4771 kfree(inq_buff);
22bece00 4772
f70dba83 4773 cciss_procinit(h);
92c4231a 4774
f70dba83 4775 h->cciss_max_sectors = 8192;
92c4231a 4776
f70dba83
SC		 4777 rebuild_lun_table(h, 1, 0);
4778 h->busy_initializing = 0;
e2019b58 4779 return 1;
1da177e4 4780
6ae5ce8e 4781clean4:
f70dba83 4782 kfree(h->cmd_pool_bits);
5c07a311 4783 /* Free up sg elements */
f70dba83
SC		 4784 for (k = 0; k < h->nr_cmds; k++)
4785 kfree(h->scatter_list[k]);
4786 kfree(h->scatter_list);
4787 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4788 if (h->cmd_pool)
4789 pci_free_consistent(h->pdev,
4790 h->nr_cmds * sizeof(CommandList_struct),
4791 h->cmd_pool, h->cmd_pool_dhandle);
4792 if (h->errinfo_pool)
4793 pci_free_consistent(h->pdev,
4794 h->nr_cmds * sizeof(ErrorInfo_struct),
4795 h->errinfo_pool,
4796 h->errinfo_pool_dhandle);
4797 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 4798clean2:
f70dba83 4799 unregister_blkdev(h->major, h->devname);
6ae5ce8e 4800clean1:
f70dba83 4801 cciss_destroy_hba_sysfs_entry(h);
7fe06326 4802clean0:
2cfa948c
SC		 4803 pci_release_regions(pdev);
4804clean_no_release_regions:
f70dba83 4805 h->busy_initializing = 0;
9cef0d2f 4806
872225ca
MM		 4807 /*
4808 * Deliberately omit pci_disable_device(): it does something nasty to
4809 * Smart Array controllers that pci_enable_device does not undo
4810 */
799202cb 4811 pci_set_drvdata(pdev, NULL);
f70dba83 4812 free_hba(h);
e2019b58 4813 return -1;
1da177e4
LT		 4814}
4815
e9ca75b5 4816static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 4817{
29009a03
SC		 4818 ctlr_info_t *h;
4819 char *flush_buf;
7c832835 4820 int return_code;
1da177e4 4821
29009a03
SC		 4822 h = pci_get_drvdata(pdev);
4823 flush_buf = kzalloc(4, GFP_KERNEL);
4824 if (!flush_buf) {
b2a4a43d 4825 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 4826 return;
e9ca75b5 4827 }
29009a03
SC		 4828 /* write all data in the battery backed cache to disk */
4829 memset(flush_buf, 0, 4);
f70dba83 4830 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 4831 4, 0, CTLR_LUNID, TYPE_CMD);
4832 kfree(flush_buf);
4833 if (return_code != IO_OK)
b2a4a43d 4834 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 4835 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 4836 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB		 4837}
4838
4839static void __devexit cciss_remove_one(struct pci_dev *pdev)
4840{
f70dba83 4841 ctlr_info_t *h;
e9ca75b5
GB		 4842 int i, j;
4843
7c832835 4844 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 4845 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 4846 return;
4847 }
0a9279cc 4848
f70dba83
SC		 4849 h = pci_get_drvdata(pdev);
4850 i = h->ctlr;
7c832835 4851 if (hba[i] == NULL) {
b2a4a43d 4852 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 4853 return;
4854 }
b6550777 4855
f70dba83 4856 mutex_lock(&h->busy_shutting_down);
0a9279cc 4857
f70dba83
SC		 4858 remove_from_scan_list(h);
4859 remove_proc_entry(h->devname, proc_cciss);
4860 unregister_blkdev(h->major, h->devname);
b6550777
BH		 4861
4862 /* remove it from the disk list */
4863 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 4864 struct gendisk *disk = h->gendisk[j];
b6550777 4865 if (disk) {
165125e1 4866 struct request_queue *q = disk->queue;
b6550777 4867
097d0264 4868 if (disk->flags & GENHD_FL_UP) {
f70dba83 4869 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 4870 del_gendisk(disk);
097d0264 4871 }
b6550777
BH		 4872 if (q)
4873 blk_cleanup_queue(q);
4874 }
4875 }
4876
ba198efb 4877#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 4878 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 4879#endif
b6550777 4880
e9ca75b5 4881 cciss_shutdown(pdev);
fb86a35b
MM		 4882
4883#ifdef CONFIG_PCI_MSI
f70dba83
SC		 4884 if (h->msix_vector)
4885 pci_disable_msix(h->pdev);
4886 else if (h->msi_vector)
4887 pci_disable_msi(h->pdev);
7c832835 4888#endif /* CONFIG_PCI_MSI */
fb86a35b 4889
f70dba83
SC		 4890 iounmap(h->transtable);
4891 iounmap(h->cfgtable);
4892 iounmap(h->vaddr);
1da177e4 4893
f70dba83
SC		 4894 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4895 h->cmd_pool, h->cmd_pool_dhandle);
4896 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4897 h->errinfo_pool, h->errinfo_pool_dhandle);
4898 kfree(h->cmd_pool_bits);
5c07a311 4899 /* Free up sg elements */
f70dba83
SC		 4900 for (j = 0; j < h->nr_cmds; j++)
4901 kfree(h->scatter_list[j]);
4902 kfree(h->scatter_list);
4903 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
872225ca
MM		 4904 /*
4905 * Deliberately omit pci_disable_device(): it does something nasty to
4906 * Smart Array controllers that pci_enable_device does not undo
4907 */
7c832835 4908 pci_release_regions(pdev);
4e570309 4909 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 4910 cciss_destroy_hba_sysfs_entry(h);
4911 mutex_unlock(&h->busy_shutting_down);
4912 free_hba(h);
7c832835 4913}
1da177e4
LT		 4914
4915static struct pci_driver cciss_pci_driver = {
7c832835
BH		 4916 .name = "cciss",
4917 .probe = cciss_init_one,
4918 .remove = __devexit_p(cciss_remove_one),
4919 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 4920 .shutdown = cciss_shutdown,
1da177e4
LT		 4921};
4922
4923/*
4924 * This is it. Register the PCI driver information for the cards we control
7c832835 4925 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 4926 */
4927static int __init cciss_init(void)
4928{
7fe06326
AP		 4929 int err;
4930
10cbda97
JA		 4931 /*
4932 * The hardware requires that commands are aligned on a 64-bit
4933 * boundary. Given that we use pci_alloc_consistent() to allocate an
4934 * array of them, the size must be a multiple of 8 bytes.
4935 */
1b7d0d28 4936 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 4937 printk(KERN_INFO DRIVER_NAME "\n");
4938
7fe06326
AP		 4939 err = bus_register(&cciss_bus_type);
4940 if (err)
4941 return err;
4942
b368c9dd
AP		 4943 /* Start the scan thread */
4944 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4945 if (IS_ERR(cciss_scan_thread)) {
4946 err = PTR_ERR(cciss_scan_thread);
4947 goto err_bus_unregister;
4948 }
4949
1da177e4 4950 /* Register for our PCI devices */
7fe06326
AP		 4951 err = pci_register_driver(&cciss_pci_driver);
4952 if (err)
b368c9dd 4953 goto err_thread_stop;
7fe06326 4954
617e1344 4955 return err;
7fe06326 4956
b368c9dd
AP		 4957err_thread_stop:
4958 kthread_stop(cciss_scan_thread);
4959err_bus_unregister:
7fe06326 4960 bus_unregister(&cciss_bus_type);
b368c9dd 4961
7fe06326 4962 return err;
1da177e4
LT		 4963}
4964
4965static void __exit cciss_cleanup(void)
4966{
4967 int i;
4968
4969 pci_unregister_driver(&cciss_pci_driver);
4970 /* double check that all controller entrys have been removed */
7c832835
BH		 4971 for (i = 0; i < MAX_CTLR; i++) {
4972 if (hba[i] != NULL) {
b2a4a43d
SC		 4973 dev_warn(&hba[i]->pdev->dev,
4974 "had to remove controller\n");
1da177e4
LT		 4975 cciss_remove_one(hba[i]->pdev);
4976 }
4977 }
b368c9dd 4978 kthread_stop(cciss_scan_thread);
928b4d8c 4979 remove_proc_entry("driver/cciss", NULL);
7fe06326 4980 bus_unregister(&cciss_bus_type);
1da177e4
LT		 4981}
4982
4983module_init(cciss_init);
4984module_exit(cciss_cleanup);
kernel source for telekom puls (alcatel/mediatek)