include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / atm / solos-pci.c
CommitLineData
9c54004e
DW
1/*
2 * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
3 * Traverse Technologies -- http://www.traverse.com.au/
4 * Xrio Limited -- http://www.xrio.com/
5 *
6 *
7 * Copyright © 2008 Traverse Technologies
8 * Copyright © 2008 Intel Corporation
9 *
10 * Authors: Nathan Williams <nathan@traverse.com.au>
11 * David Woodhouse <dwmw2@infradead.org>
7c4015bd 12 * Treker Chen <treker@xrio.com>
9c54004e
DW
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * version 2, as published by the Free Software Foundation.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23
24#define DEBUG
25#define VERBOSE_DEBUG
26
27#include <linux/interrupt.h>
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/errno.h>
31#include <linux/ioport.h>
32#include <linux/types.h>
33#include <linux/pci.h>
34#include <linux/atm.h>
35#include <linux/atmdev.h>
36#include <linux/skbuff.h>
37#include <linux/sysfs.h>
38#include <linux/device.h>
39#include <linux/kobject.h>
7c4015bd 40#include <linux/firmware.h>
01e2ffac
DW
41#include <linux/ctype.h>
42#include <linux/swab.h>
5a0e3ad6 43#include <linux/slab.h>
9c54004e 44
7c4015bd 45#define VERSION "0.07"
9c54004e
DW
46#define PTAG "solos-pci"
47
48#define CONFIG_RAM_SIZE 128
49#define FLAGS_ADDR 0x7C
50#define IRQ_EN_ADDR 0x78
51#define FPGA_VER 0x74
52#define IRQ_CLEAR 0x70
7c4015bd
SF
53#define WRITE_FLASH 0x6C
54#define PORTS 0x68
55#define FLASH_BLOCK 0x64
56#define FLASH_BUSY 0x60
57#define FPGA_MODE 0x5C
58#define FLASH_MODE 0x58
90937231
DW
59#define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
60#define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
9c54004e
DW
61
62#define DATA_RAM_SIZE 32768
4dbedf43
NW
63#define BUF_SIZE 2048
64#define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
7c4015bd
SF
65#define FPGA_PAGE 528 /* FPGA flash page size*/
66#define SOLOS_PAGE 512 /* Solos flash page size*/
67#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
68#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
9c54004e 69
4dbedf43
NW
70#define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
71#define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
72#define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
9c54004e 73
eaf83e39
DW
74#define RX_DMA_SIZE 2048
75
4dbedf43
NW
76#define FPGA_VERSION(a,b) (((a) << 8) + (b))
77#define LEGACY_BUFFERS 2
78#define DMA_SUPPORTED 4
79
cc3657e1 80static int reset = 0;
9c54004e 81static int atmdebug = 0;
7c4015bd
SF
82static int firmware_upgrade = 0;
83static int fpga_upgrade = 0;
4dbedf43
NW
84static int db_firmware_upgrade = 0;
85static int db_fpga_upgrade = 0;
9c54004e
DW
86
87struct pkt_hdr {
88 __le16 size;
89 __le16 vpi;
90 __le16 vci;
91 __le16 type;
92};
93
90937231
DW
94struct solos_skb_cb {
95 struct atm_vcc *vcc;
96 uint32_t dma_addr;
97};
98
99
100#define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb)
101
9c54004e
DW
102#define PKT_DATA 0
103#define PKT_COMMAND 1
104#define PKT_POPEN 3
105#define PKT_PCLOSE 4
87ebb186 106#define PKT_STATUS 5
9c54004e
DW
107
108struct solos_card {
109 void __iomem *config_regs;
110 void __iomem *buffers;
111 int nr_ports;
f69e4170 112 int tx_mask;
9c54004e
DW
113 struct pci_dev *dev;
114 struct atm_dev *atmdev[4];
115 struct tasklet_struct tlet;
116 spinlock_t tx_lock;
117 spinlock_t tx_queue_lock;
118 spinlock_t cli_queue_lock;
01e2ffac
DW
119 spinlock_t param_queue_lock;
120 struct list_head param_queue;
9c54004e
DW
121 struct sk_buff_head tx_queue[4];
122 struct sk_buff_head cli_queue[4];
90937231
DW
123 struct sk_buff *tx_skb[4];
124 struct sk_buff *rx_skb[4];
01e2ffac 125 wait_queue_head_t param_wq;
fa755b9f 126 wait_queue_head_t fw_wq;
90937231 127 int using_dma;
4dbedf43
NW
128 int fpga_version;
129 int buffer_size;
9c54004e
DW
130};
131
01e2ffac
DW
132
133struct solos_param {
134 struct list_head list;
135 pid_t pid;
136 int port;
137 struct sk_buff *response;
9c54004e
DW
138};
139
140#define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
141
142MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
143MODULE_DESCRIPTION("Solos PCI driver");
144MODULE_VERSION(VERSION);
145MODULE_LICENSE("GPL");
9fca79d6
BH
146MODULE_FIRMWARE("solos-FPGA.bin");
147MODULE_FIRMWARE("solos-Firmware.bin");
148MODULE_FIRMWARE("solos-db-FPGA.bin");
cc3657e1 149MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
9c54004e 150MODULE_PARM_DESC(atmdebug, "Print ATM data");
7c4015bd
SF
151MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
152MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
4dbedf43
NW
153MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
154MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
cc3657e1 155module_param(reset, int, 0444);
4306cad6 156module_param(atmdebug, int, 0644);
7c4015bd
SF
157module_param(firmware_upgrade, int, 0444);
158module_param(fpga_upgrade, int, 0444);
4dbedf43
NW
159module_param(db_firmware_upgrade, int, 0444);
160module_param(db_fpga_upgrade, int, 0444);
9c54004e
DW
161
162static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
163 struct atm_vcc *vcc);
35c2221b 164static uint32_t fpga_tx(struct solos_card *);
9c54004e
DW
165static irqreturn_t solos_irq(int irq, void *dev_id);
166static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
167static int list_vccs(int vci);
1e615df6 168static void release_vccs(struct atm_dev *dev);
9c54004e
DW
169static int atm_init(struct solos_card *);
170static void atm_remove(struct solos_card *);
171static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
172static void solos_bh(unsigned long);
173static int print_buffer(struct sk_buff *buf);
174
175static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
176{
177 if (vcc->pop)
178 vcc->pop(vcc, skb);
179 else
180 dev_kfree_skb_any(skb);
181}
182
01e2ffac
DW
183static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
184 char *buf)
185{
186 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
187 struct solos_card *card = atmdev->dev_data;
188 struct solos_param prm;
189 struct sk_buff *skb;
190 struct pkt_hdr *header;
191 int buflen;
192
193 buflen = strlen(attr->attr.name) + 10;
194
3456b221 195 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
01e2ffac
DW
196 if (!skb) {
197 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
198 return -ENOMEM;
199 }
200
201 header = (void *)skb_put(skb, sizeof(*header));
202
203 buflen = snprintf((void *)&header[1], buflen - 1,
204 "L%05d\n%s\n", current->pid, attr->attr.name);
205 skb_put(skb, buflen);
206
207 header->size = cpu_to_le16(buflen);
208 header->vpi = cpu_to_le16(0);
209 header->vci = cpu_to_le16(0);
210 header->type = cpu_to_le16(PKT_COMMAND);
211
212 prm.pid = current->pid;
213 prm.response = NULL;
214 prm.port = SOLOS_CHAN(atmdev);
215
216 spin_lock_irq(&card->param_queue_lock);
217 list_add(&prm.list, &card->param_queue);
218 spin_unlock_irq(&card->param_queue_lock);
219
220 fpga_queue(card, prm.port, skb, NULL);
221
222 wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
223
224 spin_lock_irq(&card->param_queue_lock);
225 list_del(&prm.list);
226 spin_unlock_irq(&card->param_queue_lock);
227
228 if (!prm.response)
229 return -EIO;
230
231 buflen = prm.response->len;
232 memcpy(buf, prm.response->data, buflen);
233 kfree_skb(prm.response);
234
235 return buflen;
236}
237
238static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
239 const char *buf, size_t count)
240{
241 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
242 struct solos_card *card = atmdev->dev_data;
243 struct solos_param prm;
244 struct sk_buff *skb;
245 struct pkt_hdr *header;
246 int buflen;
247 ssize_t ret;
248
249 buflen = strlen(attr->attr.name) + 11 + count;
250
3456b221 251 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
01e2ffac
DW
252 if (!skb) {
253 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
254 return -ENOMEM;
255 }
256
257 header = (void *)skb_put(skb, sizeof(*header));
258
259 buflen = snprintf((void *)&header[1], buflen - 1,
260 "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
261
262 skb_put(skb, buflen);
263 header->size = cpu_to_le16(buflen);
264 header->vpi = cpu_to_le16(0);
265 header->vci = cpu_to_le16(0);
266 header->type = cpu_to_le16(PKT_COMMAND);
267
268 prm.pid = current->pid;
269 prm.response = NULL;
270 prm.port = SOLOS_CHAN(atmdev);
271
272 spin_lock_irq(&card->param_queue_lock);
273 list_add(&prm.list, &card->param_queue);
274 spin_unlock_irq(&card->param_queue_lock);
275
276 fpga_queue(card, prm.port, skb, NULL);
277
278 wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
279
280 spin_lock_irq(&card->param_queue_lock);
281 list_del(&prm.list);
282 spin_unlock_irq(&card->param_queue_lock);
283
284 skb = prm.response;
285
286 if (!skb)
287 return -EIO;
288
289 buflen = skb->len;
290
291 /* Sometimes it has a newline, sometimes it doesn't. */
292 if (skb->data[buflen - 1] == '\n')
293 buflen--;
294
295 if (buflen == 2 && !strncmp(skb->data, "OK", 2))
296 ret = count;
297 else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
298 ret = -EIO;
299 else {
300 /* We know we have enough space allocated for this; we allocated
301 it ourselves */
302 skb->data[buflen] = 0;
303
304 dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
305 skb->data);
306 ret = -EIO;
307 }
308 kfree_skb(skb);
309
310 return ret;
311}
312
87ebb186
DW
313static char *next_string(struct sk_buff *skb)
314{
315 int i = 0;
316 char *this = skb->data;
c6428e52
DW
317
318 for (i = 0; i < skb->len; i++) {
87ebb186
DW
319 if (this[i] == '\n') {
320 this[i] = 0;
c6428e52 321 skb_pull(skb, i + 1);
87ebb186
DW
322 return this;
323 }
c6428e52
DW
324 if (!isprint(this[i]))
325 return NULL;
87ebb186
DW
326 }
327 return NULL;
328}
329
330/*
331 * Status packet has fields separated by \n, starting with a version number
332 * for the information therein. Fields are....
333 *
334 * packet version
87ebb186 335 * RxBitRate (version >= 1)
f87b2ed2 336 * TxBitRate (version >= 1)
87ebb186 337 * State (version >= 1)
f87b2ed2
DW
338 * LocalSNRMargin (version >= 1)
339 * LocalLineAttn (version >= 1)
87ebb186
DW
340 */
341static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
342{
f87b2ed2
DW
343 char *str, *end, *state_str, *snr, *attn;
344 int ver, rate_up, rate_down;
87ebb186
DW
345
346 if (!card->atmdev[port])
347 return -ENODEV;
348
349 str = next_string(skb);
350 if (!str)
351 return -EIO;
352
353 ver = simple_strtol(str, NULL, 10);
354 if (ver < 1) {
355 dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
356 ver);
357 return -EIO;
358 }
359
360 str = next_string(skb);
c6428e52
DW
361 if (!str)
362 return -EIO;
95852f48
DW
363 if (!strcmp(str, "ERROR")) {
364 dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n",
365 port);
366 return 0;
367 }
368
f87b2ed2 369 rate_down = simple_strtol(str, &end, 10);
87ebb186
DW
370 if (*end)
371 return -EIO;
372
373 str = next_string(skb);
c6428e52
DW
374 if (!str)
375 return -EIO;
f87b2ed2 376 rate_up = simple_strtol(str, &end, 10);
87ebb186
DW
377 if (*end)
378 return -EIO;
379
af780656 380 state_str = next_string(skb);
c6428e52
DW
381 if (!state_str)
382 return -EIO;
f87b2ed2
DW
383
384 /* Anything but 'Showtime' is down */
385 if (strcmp(state_str, "Showtime")) {
386 card->atmdev[port]->signal = ATM_PHY_SIG_LOST;
1e615df6 387 release_vccs(card->atmdev[port]);
f87b2ed2
DW
388 dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
389 return 0;
1e615df6 390 }
87ebb186 391
f87b2ed2 392 snr = next_string(skb);
6cf5767c 393 if (!snr)
f87b2ed2
DW
394 return -EIO;
395 attn = next_string(skb);
396 if (!attn)
397 return -EIO;
398
399 dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n",
400 port, state_str, rate_down/1000, rate_up/1000,
401 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
402
c6428e52 403 card->atmdev[port]->link_rate = rate_down / 424;
f87b2ed2 404 card->atmdev[port]->signal = ATM_PHY_SIG_FOUND;
87ebb186 405
87ebb186
DW
406 return 0;
407}
408
01e2ffac
DW
409static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
410{
411 struct solos_param *prm;
412 unsigned long flags;
413 int cmdpid;
414 int found = 0;
415
416 if (skb->len < 7)
417 return 0;
418
419 if (skb->data[0] != 'L' || !isdigit(skb->data[1]) ||
420 !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
421 !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
422 skb->data[6] != '\n')
423 return 0;
424
425 cmdpid = simple_strtol(&skb->data[1], NULL, 10);
426
427 spin_lock_irqsave(&card->param_queue_lock, flags);
428 list_for_each_entry(prm, &card->param_queue, list) {
429 if (prm->port == port && prm->pid == cmdpid) {
430 prm->response = skb;
431 skb_pull(skb, 7);
432 wake_up(&card->param_wq);
433 found = 1;
434 break;
435 }
436 }
437 spin_unlock_irqrestore(&card->param_queue_lock, flags);
438 return found;
439}
440
9c54004e
DW
441static ssize_t console_show(struct device *dev, struct device_attribute *attr,
442 char *buf)
443{
444 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
445 struct solos_card *card = atmdev->dev_data;
446 struct sk_buff *skb;
447
448 spin_lock(&card->cli_queue_lock);
449 skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
450 spin_unlock(&card->cli_queue_lock);
451 if(skb == NULL)
452 return sprintf(buf, "No data.\n");
453
454 memcpy(buf, skb->data, skb->len);
455 dev_dbg(&card->dev->dev, "len: %d\n", skb->len);
456
457 kfree_skb(skb);
458 return skb->len;
459}
460
461static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
462{
463 struct sk_buff *skb;
464 struct pkt_hdr *header;
465
9c54004e
DW
466 if (size > (BUF_SIZE - sizeof(*header))) {
467 dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
468 return 0;
469 }
470 skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
471 if (!skb) {
472 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
473 return 0;
474 }
475
476 header = (void *)skb_put(skb, sizeof(*header));
477
478 header->size = cpu_to_le16(size);
479 header->vpi = cpu_to_le16(0);
480 header->vci = cpu_to_le16(0);
481 header->type = cpu_to_le16(PKT_COMMAND);
482
483 memcpy(skb_put(skb, size), buf, size);
484
485 fpga_queue(card, dev, skb, NULL);
486
487 return 0;
488}
489
490static ssize_t console_store(struct device *dev, struct device_attribute *attr,
491 const char *buf, size_t count)
492{
493 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
494 struct solos_card *card = atmdev->dev_data;
495 int err;
496
497 err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
498
499 return err?:count;
500}
501
502static DEVICE_ATTR(console, 0644, console_show, console_store);
503
d057f0a4
DW
504
505#define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
506#define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
507
508#include "solos-attrlist.c"
509
510#undef SOLOS_ATTR_RO
511#undef SOLOS_ATTR_RW
512
513#define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
514#define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
515
516static struct attribute *solos_attrs[] = {
517#include "solos-attrlist.c"
518 NULL
519};
520
521static struct attribute_group solos_attr_group = {
522 .attrs = solos_attrs,
523 .name = "parameters",
524};
9c54004e 525
fa755b9f
DW
526static int flash_upgrade(struct solos_card *card, int chip)
527{
528 const struct firmware *fw;
529 const char *fw_name;
7c4015bd
SF
530 uint32_t data32 = 0;
531 int blocksize = 0;
532 int numblocks = 0;
fa755b9f
DW
533 int offset;
534
7adcdb4c
AM
535 switch (chip) {
536 case 0:
fa755b9f 537 fw_name = "solos-FPGA.bin";
7c4015bd 538 blocksize = FPGA_BLOCK;
7adcdb4c
AM
539 break;
540 case 1:
fa755b9f 541 fw_name = "solos-Firmware.bin";
7c4015bd 542 blocksize = SOLOS_BLOCK;
7adcdb4c
AM
543 break;
544 case 2:
4dbedf43
NW
545 if (card->fpga_version > LEGACY_BUFFERS){
546 fw_name = "solos-db-FPGA.bin";
547 blocksize = FPGA_BLOCK;
548 } else {
7adcdb4c
AM
549 dev_info(&card->dev->dev, "FPGA version doesn't support"
550 " daughter board upgrades\n");
4dbedf43
NW
551 return -EPERM;
552 }
7adcdb4c
AM
553 break;
554 case 3:
4dbedf43
NW
555 if (card->fpga_version > LEGACY_BUFFERS){
556 fw_name = "solos-Firmware.bin";
557 blocksize = SOLOS_BLOCK;
558 } else {
7adcdb4c
AM
559 dev_info(&card->dev->dev, "FPGA version doesn't support"
560 " daughter board upgrades\n");
561 return -EPERM;
4dbedf43 562 }
7adcdb4c
AM
563 break;
564 default:
565 return -ENODEV;
4dbedf43 566 }
fa755b9f
DW
567
568 if (request_firmware(&fw, fw_name, &card->dev->dev))
569 return -ENOENT;
570
571 dev_info(&card->dev->dev, "Flash upgrade starting\n");
572
573 numblocks = fw->size / blocksize;
574 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
7c4015bd
SF
575 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
576
7c4015bd
SF
577 dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
578 iowrite32(1, card->config_regs + FPGA_MODE);
579 data32 = ioread32(card->config_regs + FPGA_MODE);
7c4015bd 580
fa755b9f 581 /* Set mode to Chip Erase */
4dbedf43
NW
582 if(chip == 0 || chip == 2)
583 dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
584 if(chip == 1 || chip == 3)
585 dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
fa755b9f 586 iowrite32((chip * 2), card->config_regs + FLASH_MODE);
7c4015bd 587
7c4015bd 588
fa755b9f
DW
589 iowrite32(1, card->config_regs + WRITE_FLASH);
590 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
591
592 for (offset = 0; offset < fw->size; offset += blocksize) {
593 int i;
594
595 /* Clear write flag */
7c4015bd 596 iowrite32(0, card->config_regs + WRITE_FLASH);
7c4015bd 597
fa755b9f
DW
598 /* Set mode to Block Write */
599 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
600 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
601
602 /* Copy block to buffer, swapping each 16 bits */
603 for(i = 0; i < blocksize; i += 4) {
604 uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
4dbedf43
NW
605 if(card->fpga_version > LEGACY_BUFFERS)
606 iowrite32(word, FLASH_BUF + i);
607 else
608 iowrite32(word, RX_BUF(card, 3) + i);
7c4015bd 609 }
fa755b9f
DW
610
611 /* Specify block number and then trigger flash write */
612 iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
613 iowrite32(1, card->config_regs + WRITE_FLASH);
614 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
7c4015bd
SF
615 }
616
fa755b9f
DW
617 release_firmware(fw);
618 iowrite32(0, card->config_regs + WRITE_FLASH);
619 iowrite32(0, card->config_regs + FPGA_MODE);
620 iowrite32(0, card->config_regs + FLASH_MODE);
621 dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
622 return 0;
7c4015bd
SF
623}
624
9c54004e
DW
625static irqreturn_t solos_irq(int irq, void *dev_id)
626{
627 struct solos_card *card = dev_id;
628 int handled = 1;
629
9c54004e 630 iowrite32(0, card->config_regs + IRQ_CLEAR);
9c54004e 631
35c2221b 632 /* If we're up and running, just kick the tasklet to process TX/RX */
fa755b9f 633 if (card->atmdev[0])
9c54004e 634 tasklet_schedule(&card->tlet);
fa755b9f
DW
635 else
636 wake_up(&card->fw_wq);
9c54004e 637
9c54004e
DW
638 return IRQ_RETVAL(handled);
639}
640
641void solos_bh(unsigned long card_arg)
642{
643 struct solos_card *card = (void *)card_arg;
9c54004e 644 uint32_t card_flags;
9c54004e 645 uint32_t rx_done = 0;
35c2221b 646 int port;
9c54004e 647
35c2221b
DW
648 /*
649 * Since fpga_tx() is going to need to read the flags under its lock,
650 * it can return them to us so that we don't have to hit PCI MMIO
651 * again for the same information
652 */
653 card_flags = fpga_tx(card);
9c54004e
DW
654
655 for (port = 0; port < card->nr_ports; port++) {
656 if (card_flags & (0x10 << port)) {
90937231 657 struct pkt_hdr _hdr, *header;
9c54004e
DW
658 struct sk_buff *skb;
659 struct atm_vcc *vcc;
660 int size;
661
90937231
DW
662 if (card->using_dma) {
663 skb = card->rx_skb[port];
eaf83e39 664 card->rx_skb[port] = NULL;
9c54004e 665
eaf83e39
DW
666 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
667 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
9c54004e 668
90937231
DW
669 header = (void *)skb->data;
670 size = le16_to_cpu(header->size);
671 skb_put(skb, size + sizeof(*header));
672 skb_pull(skb, sizeof(*header));
673 } else {
674 header = &_hdr;
9c54004e 675
90937231 676 rx_done |= 0x10 << port;
9c54004e 677
90937231 678 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
9c54004e 679
90937231 680 size = le16_to_cpu(header->size);
78f857f2
NW
681 if (size > (card->buffer_size - sizeof(*header))){
682 dev_warn(&card->dev->dev, "Invalid buffer size\n");
683 continue;
684 }
9c54004e 685
90937231
DW
686 skb = alloc_skb(size + 1, GFP_ATOMIC);
687 if (!skb) {
688 if (net_ratelimit())
689 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
690 continue;
691 }
9c54004e 692
90937231
DW
693 memcpy_fromio(skb_put(skb, size),
694 RX_BUF(card, port) + sizeof(*header),
695 size);
696 }
9c54004e
DW
697 if (atmdebug) {
698 dev_info(&card->dev->dev, "Received: device %d\n", port);
699 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
90937231
DW
700 size, le16_to_cpu(header->vpi),
701 le16_to_cpu(header->vci));
9c54004e
DW
702 print_buffer(skb);
703 }
704
90937231 705 switch (le16_to_cpu(header->type)) {
9c54004e 706 case PKT_DATA:
90937231
DW
707 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
708 le16_to_cpu(header->vci));
9c54004e
DW
709 if (!vcc) {
710 if (net_ratelimit())
711 dev_warn(&card->dev->dev, "Received packet for unknown VCI.VPI %d.%d on port %d\n",
90937231 712 le16_to_cpu(header->vci), le16_to_cpu(header->vpi),
9c54004e
DW
713 port);
714 continue;
715 }
716 atm_charge(vcc, skb->truesize);
717 vcc->push(vcc, skb);
718 atomic_inc(&vcc->stats->rx);
719 break;
720
87ebb186 721 case PKT_STATUS:
95852f48
DW
722 if (process_status(card, port, skb) &&
723 net_ratelimit()) {
724 dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port);
725 print_buffer(skb);
726 }
eaf83e39 727 dev_kfree_skb_any(skb);
87ebb186
DW
728 break;
729
9c54004e
DW
730 case PKT_COMMAND:
731 default: /* FIXME: Not really, surely? */
01e2ffac
DW
732 if (process_command(card, port, skb))
733 break;
9c54004e
DW
734 spin_lock(&card->cli_queue_lock);
735 if (skb_queue_len(&card->cli_queue[port]) > 10) {
736 if (net_ratelimit())
737 dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
738 port);
eaf83e39 739 dev_kfree_skb_any(skb);
9c54004e
DW
740 } else
741 skb_queue_tail(&card->cli_queue[port], skb);
742 spin_unlock(&card->cli_queue_lock);
743 break;
744 }
745 }
eaf83e39
DW
746 /* Allocate RX skbs for any ports which need them */
747 if (card->using_dma && card->atmdev[port] &&
748 !card->rx_skb[port]) {
749 struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC);
750 if (skb) {
751 SKB_CB(skb)->dma_addr =
752 pci_map_single(card->dev, skb->data,
753 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
754 iowrite32(SKB_CB(skb)->dma_addr,
755 card->config_regs + RX_DMA_ADDR(port));
756 card->rx_skb[port] = skb;
757 } else {
758 if (net_ratelimit())
759 dev_warn(&card->dev->dev, "Failed to allocate RX skb");
760
761 /* We'll have to try again later */
762 tasklet_schedule(&card->tlet);
763 }
764 }
9c54004e
DW
765 }
766 if (rx_done)
767 iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
768
769 return;
770}
771
772static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
773{
774 struct hlist_head *head;
775 struct atm_vcc *vcc = NULL;
776 struct hlist_node *node;
777 struct sock *s;
778
779 read_lock(&vcc_sklist_lock);
780 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
781 sk_for_each(s, node, head) {
782 vcc = atm_sk(s);
783 if (vcc->dev == dev && vcc->vci == vci &&
784 vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE)
785 goto out;
786 }
787 vcc = NULL;
788 out:
789 read_unlock(&vcc_sklist_lock);
790 return vcc;
791}
792
793static int list_vccs(int vci)
794{
795 struct hlist_head *head;
796 struct atm_vcc *vcc;
797 struct hlist_node *node;
798 struct sock *s;
799 int num_found = 0;
800 int i;
801
802 read_lock(&vcc_sklist_lock);
803 if (vci != 0){
804 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
805 sk_for_each(s, node, head) {
806 num_found ++;
807 vcc = atm_sk(s);
808 printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n",
809 vcc->dev->number,
810 vcc->vpi,
811 vcc->vci);
812 }
813 } else {
1e615df6 814 for(i = 0; i < VCC_HTABLE_SIZE; i++){
9c54004e
DW
815 head = &vcc_hash[i];
816 sk_for_each(s, node, head) {
817 num_found ++;
818 vcc = atm_sk(s);
819 printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n",
820 vcc->dev->number,
821 vcc->vpi,
822 vcc->vci);
823 }
824 }
825 }
826 read_unlock(&vcc_sklist_lock);
827 return num_found;
828}
829
1e615df6
DW
830static void release_vccs(struct atm_dev *dev)
831{
832 int i;
833
834 write_lock_irq(&vcc_sklist_lock);
835 for (i = 0; i < VCC_HTABLE_SIZE; i++) {
836 struct hlist_head *head = &vcc_hash[i];
837 struct hlist_node *node, *tmp;
838 struct sock *s;
839 struct atm_vcc *vcc;
840
841 sk_for_each_safe(s, node, tmp, head) {
842 vcc = atm_sk(s);
843 if (vcc->dev == dev) {
844 vcc_release_async(vcc, -EPIPE);
845 sk_del_node_init(s);
846 }
847 }
848 }
849 write_unlock_irq(&vcc_sklist_lock);
850}
851
9c54004e
DW
852
853static int popen(struct atm_vcc *vcc)
854{
855 struct solos_card *card = vcc->dev->dev_data;
856 struct sk_buff *skb;
857 struct pkt_hdr *header;
858
b28a4b9a
DW
859 if (vcc->qos.aal != ATM_AAL5) {
860 dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
861 vcc->qos.aal);
862 return -EINVAL;
863 }
864
9c54004e
DW
865 skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
866 if (!skb && net_ratelimit()) {
867 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
868 return -ENOMEM;
869 }
870 header = (void *)skb_put(skb, sizeof(*header));
871
b76811af 872 header->size = cpu_to_le16(0);
9c54004e
DW
873 header->vpi = cpu_to_le16(vcc->vpi);
874 header->vci = cpu_to_le16(vcc->vci);
875 header->type = cpu_to_le16(PKT_POPEN);
876
877 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
878
bdc54625 879 set_bit(ATM_VF_ADDR, &vcc->flags);
9c54004e
DW
880 set_bit(ATM_VF_READY, &vcc->flags);
881 list_vccs(0);
882
9c54004e
DW
883
884 return 0;
885}
886
887static void pclose(struct atm_vcc *vcc)
888{
889 struct solos_card *card = vcc->dev->dev_data;
890 struct sk_buff *skb;
891 struct pkt_hdr *header;
892
893 skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
894 if (!skb) {
895 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
896 return;
897 }
898 header = (void *)skb_put(skb, sizeof(*header));
899
b76811af 900 header->size = cpu_to_le16(0);
9c54004e
DW
901 header->vpi = cpu_to_le16(vcc->vpi);
902 header->vci = cpu_to_le16(vcc->vci);
903 header->type = cpu_to_le16(PKT_PCLOSE);
904
905 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
906
9c54004e
DW
907 clear_bit(ATM_VF_ADDR, &vcc->flags);
908 clear_bit(ATM_VF_READY, &vcc->flags);
909
910 return;
911}
912
913static int print_buffer(struct sk_buff *buf)
914{
915 int len,i;
916 char msg[500];
917 char item[10];
918
919 len = buf->len;
920 for (i = 0; i < len; i++){
921 if(i % 8 == 0)
922 sprintf(msg, "%02X: ", i);
923
924 sprintf(item,"%02X ",*(buf->data + i));
925 strcat(msg, item);
926 if(i % 8 == 7) {
927 sprintf(item, "\n");
928 strcat(msg, item);
929 printk(KERN_DEBUG "%s", msg);
930 }
931 }
932 if (i % 8 != 0) {
933 sprintf(item, "\n");
934 strcat(msg, item);
935 printk(KERN_DEBUG "%s", msg);
936 }
937 printk(KERN_DEBUG "\n");
938
939 return 0;
940}
941
942static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
943 struct atm_vcc *vcc)
944{
945 int old_len;
f69e4170 946 unsigned long flags;
9c54004e 947
90937231 948 SKB_CB(skb)->vcc = vcc;
9c54004e 949
f69e4170 950 spin_lock_irqsave(&card->tx_queue_lock, flags);
9c54004e
DW
951 old_len = skb_queue_len(&card->tx_queue[port]);
952 skb_queue_tail(&card->tx_queue[port], skb);
35c2221b 953 if (!old_len)
f69e4170 954 card->tx_mask |= (1 << port);
f69e4170 955 spin_unlock_irqrestore(&card->tx_queue_lock, flags);
9c54004e 956
f69e4170
DW
957 /* Theoretically we could just schedule the tasklet here, but
958 that introduces latency we don't want -- it's noticeable */
9c54004e
DW
959 if (!old_len)
960 fpga_tx(card);
961}
962
35c2221b 963static uint32_t fpga_tx(struct solos_card *card)
9c54004e 964{
35c2221b 965 uint32_t tx_pending, card_flags;
9c54004e
DW
966 uint32_t tx_started = 0;
967 struct sk_buff *skb;
968 struct atm_vcc *vcc;
969 unsigned char port;
970 unsigned long flags;
971
972 spin_lock_irqsave(&card->tx_lock, flags);
35c2221b
DW
973
974 card_flags = ioread32(card->config_regs + FLAGS_ADDR);
975 /*
976 * The queue lock is required for _writing_ to tx_mask, but we're
977 * OK to read it here without locking. The only potential update
978 * that we could race with is in fpga_queue() where it sets a bit
979 * for a new port... but it's going to call this function again if
980 * it's doing that, anyway.
981 */
982 tx_pending = card->tx_mask & ~card_flags;
983
984 for (port = 0; tx_pending; tx_pending >>= 1, port++) {
985 if (tx_pending & 1) {
eaf83e39 986 struct sk_buff *oldskb = card->tx_skb[port];
eaf83e39
DW
987 if (oldskb)
988 pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr,
989 oldskb->len, PCI_DMA_TODEVICE);
9c54004e
DW
990
991 spin_lock(&card->tx_queue_lock);
992 skb = skb_dequeue(&card->tx_queue[port]);
f69e4170
DW
993 if (!skb)
994 card->tx_mask &= ~(1 << port);
9c54004e
DW
995 spin_unlock(&card->tx_queue_lock);
996
eaf83e39
DW
997 if (skb && !card->using_dma) {
998 memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
bdc54625 999 tx_started |= 1 << port;
eaf83e39
DW
1000 oldskb = skb; /* We're done with this skb already */
1001 } else if (skb && card->using_dma) {
1002 SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data,
1003 skb->len, PCI_DMA_TODEVICE);
1004 iowrite32(SKB_CB(skb)->dma_addr,
1005 card->config_regs + TX_DMA_ADDR(port));
1006 }
1007
1008 if (!oldskb)
9c54004e
DW
1009 continue;
1010
eaf83e39 1011 /* Clean up and free oldskb now it's gone */
9c54004e
DW
1012 if (atmdebug) {
1013 dev_info(&card->dev->dev, "Transmitted: port %d\n",
1014 port);
eaf83e39 1015 print_buffer(oldskb);
9c54004e 1016 }
9c54004e 1017
eaf83e39 1018 vcc = SKB_CB(oldskb)->vcc;
9c54004e
DW
1019
1020 if (vcc) {
1021 atomic_inc(&vcc->stats->tx);
eaf83e39 1022 solos_pop(vcc, oldskb);
9c54004e 1023 } else
eaf83e39 1024 dev_kfree_skb_irq(oldskb);
9c54004e 1025
9c54004e
DW
1026 }
1027 }
bdc54625 1028 /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */
9c54004e
DW
1029 if (tx_started)
1030 iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
1031
1032 spin_unlock_irqrestore(&card->tx_lock, flags);
35c2221b 1033 return card_flags;
9c54004e
DW
1034}
1035
1036static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
1037{
1038 struct solos_card *card = vcc->dev->dev_data;
9c54004e 1039 struct pkt_hdr *header;
b76811af 1040 int pktlen;
9c54004e 1041
b76811af
DW
1042 pktlen = skb->len;
1043 if (pktlen > (BUF_SIZE - sizeof(*header))) {
9c54004e
DW
1044 dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
1045 solos_pop(vcc, skb);
1046 return 0;
1047 }
1048
1049 if (!skb_clone_writable(skb, sizeof(*header))) {
1050 int expand_by = 0;
1051 int ret;
1052
1053 if (skb_headroom(skb) < sizeof(*header))
1054 expand_by = sizeof(*header) - skb_headroom(skb);
1055
1056 ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
1057 if (ret) {
4306cad6 1058 dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
9c54004e
DW
1059 solos_pop(vcc, skb);
1060 return ret;
1061 }
1062 }
1063
1064 header = (void *)skb_push(skb, sizeof(*header));
1065
b76811af
DW
1066 /* This does _not_ include the size of the header */
1067 header->size = cpu_to_le16(pktlen);
9c54004e
DW
1068 header->vpi = cpu_to_le16(vcc->vpi);
1069 header->vci = cpu_to_le16(vcc->vci);
1070 header->type = cpu_to_le16(PKT_DATA);
1071
1072 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
1073
1074 return 0;
1075}
1076
1077static struct atmdev_ops fpga_ops = {
1078 .open = popen,
1079 .close = pclose,
1080 .ioctl = NULL,
1081 .getsockopt = NULL,
1082 .setsockopt = NULL,
1083 .send = psend,
1084 .send_oam = NULL,
1085 .phy_put = NULL,
1086 .phy_get = NULL,
1087 .change_qos = NULL,
1088 .proc_read = NULL,
1089 .owner = THIS_MODULE
1090};
1091
1092static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1093{
cd5549e0 1094 int err;
9c54004e
DW
1095 uint16_t fpga_ver;
1096 uint8_t major_ver, minor_ver;
1097 uint32_t data32;
1098 struct solos_card *card;
1099
9c54004e
DW
1100 card = kzalloc(sizeof(*card), GFP_KERNEL);
1101 if (!card)
1102 return -ENOMEM;
1103
1104 card->dev = dev;
fa755b9f 1105 init_waitqueue_head(&card->fw_wq);
01e2ffac 1106 init_waitqueue_head(&card->param_wq);
9c54004e
DW
1107
1108 err = pci_enable_device(dev);
1109 if (err) {
1110 dev_warn(&dev->dev, "Failed to enable PCI device\n");
1111 goto out;
1112 }
1113
e930438c 1114 err = pci_set_dma_mask(dev, DMA_BIT_MASK(32));
90937231
DW
1115 if (err) {
1116 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
1117 goto out;
1118 }
1119
9c54004e
DW
1120 err = pci_request_regions(dev, "solos");
1121 if (err) {
1122 dev_warn(&dev->dev, "Failed to request regions\n");
1123 goto out;
1124 }
1125
1126 card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
1127 if (!card->config_regs) {
1128 dev_warn(&dev->dev, "Failed to ioremap config registers\n");
1129 goto out_release_regions;
1130 }
1131 card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
1132 if (!card->buffers) {
1133 dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
1134 goto out_unmap_config;
1135 }
1136
cc3657e1
DW
1137 if (reset) {
1138 iowrite32(1, card->config_regs + FPGA_MODE);
1139 data32 = ioread32(card->config_regs + FPGA_MODE);
9c54004e 1140
cc3657e1
DW
1141 iowrite32(0, card->config_regs + FPGA_MODE);
1142 data32 = ioread32(card->config_regs + FPGA_MODE);
1143 }
9c54004e
DW
1144
1145 data32 = ioread32(card->config_regs + FPGA_VER);
1146 fpga_ver = (data32 & 0x0000FFFF);
1147 major_ver = ((data32 & 0xFF000000) >> 24);
1148 minor_ver = ((data32 & 0x00FF0000) >> 16);
4dbedf43
NW
1149 card->fpga_version = FPGA_VERSION(major_ver,minor_ver);
1150 if (card->fpga_version > LEGACY_BUFFERS)
1151 card->buffer_size = BUF_SIZE;
1152 else
1153 card->buffer_size = OLD_BUF_SIZE;
9c54004e
DW
1154 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
1155 major_ver, minor_ver, fpga_ver);
1156
4dbedf43 1157 if (card->fpga_version >= DMA_SUPPORTED){
90937231 1158 card->using_dma = 1;
4dbedf43
NW
1159 } else {
1160 card->using_dma = 0;
eab50f73
DW
1161 /* Set RX empty flag for all ports */
1162 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
1163 }
9c54004e 1164
0fc36aa5
NW
1165 data32 = ioread32(card->config_regs + PORTS);
1166 card->nr_ports = (data32 & 0x000000FF);
9c54004e
DW
1167
1168 pci_set_drvdata(dev, card);
fa755b9f 1169
9c54004e
DW
1170 tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
1171 spin_lock_init(&card->tx_lock);
1172 spin_lock_init(&card->tx_queue_lock);
1173 spin_lock_init(&card->cli_queue_lock);
01e2ffac
DW
1174 spin_lock_init(&card->param_queue_lock);
1175 INIT_LIST_HEAD(&card->param_queue);
fa755b9f 1176
fcd82664 1177 err = request_irq(dev->irq, solos_irq, IRQF_SHARED,
9c54004e 1178 "solos-pci", card);
fa755b9f 1179 if (err) {
9c54004e 1180 dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
fa755b9f
DW
1181 goto out_unmap_both;
1182 }
9c54004e 1183
9c54004e
DW
1184 iowrite32(1, card->config_regs + IRQ_EN_ADDR);
1185
fa755b9f
DW
1186 if (fpga_upgrade)
1187 flash_upgrade(card, 0);
1188
1189 if (firmware_upgrade)
1190 flash_upgrade(card, 1);
1191
4dbedf43
NW
1192 if (db_fpga_upgrade)
1193 flash_upgrade(card, 2);
1194
1195 if (db_firmware_upgrade)
1196 flash_upgrade(card, 3);
1197
fa755b9f
DW
1198 err = atm_init(card);
1199 if (err)
1200 goto out_free_irq;
1201
9c54004e
DW
1202 return 0;
1203
fa755b9f
DW
1204 out_free_irq:
1205 iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1206 free_irq(dev->irq, card);
1207 tasklet_kill(&card->tlet);
1208
9c54004e 1209 out_unmap_both:
fa755b9f 1210 pci_set_drvdata(dev, NULL);
9c54004e
DW
1211 pci_iounmap(dev, card->config_regs);
1212 out_unmap_config:
1213 pci_iounmap(dev, card->buffers);
1214 out_release_regions:
1215 pci_release_regions(dev);
1216 out:
bc111d57 1217 kfree(card);
9c54004e
DW
1218 return err;
1219}
1220
1221static int atm_init(struct solos_card *card)
1222{
1223 int i;
1224
9c54004e 1225 for (i = 0; i < card->nr_ports; i++) {
87ebb186
DW
1226 struct sk_buff *skb;
1227 struct pkt_hdr *header;
1228
9c54004e
DW
1229 skb_queue_head_init(&card->tx_queue[i]);
1230 skb_queue_head_init(&card->cli_queue[i]);
1231
1232 card->atmdev[i] = atm_dev_register("solos-pci", &fpga_ops, -1, NULL);
1233 if (!card->atmdev[i]) {
1234 dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
1235 atm_remove(card);
1236 return -ENODEV;
1237 }
1238 if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
1239 dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
d057f0a4
DW
1240 if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
1241 dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
9c54004e
DW
1242
1243 dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
1244
1245 card->atmdev[i]->ci_range.vpi_bits = 8;
1246 card->atmdev[i]->ci_range.vci_bits = 16;
1247 card->atmdev[i]->dev_data = card;
1248 card->atmdev[i]->phy_data = (void *)(unsigned long)i;
87ebb186
DW
1249 card->atmdev[i]->signal = ATM_PHY_SIG_UNKNOWN;
1250
1251 skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
1252 if (!skb) {
1253 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
1254 continue;
1255 }
1256
1257 header = (void *)skb_put(skb, sizeof(*header));
1258
1259 header->size = cpu_to_le16(0);
1260 header->vpi = cpu_to_le16(0);
1261 header->vci = cpu_to_le16(0);
1262 header->type = cpu_to_le16(PKT_STATUS);
1263
1264 fpga_queue(card, i, skb, NULL);
9c54004e
DW
1265 }
1266 return 0;
1267}
1268
1269static void atm_remove(struct solos_card *card)
1270{
1271 int i;
1272
1273 for (i = 0; i < card->nr_ports; i++) {
1274 if (card->atmdev[i]) {
97d759d3
DW
1275 struct sk_buff *skb;
1276
9c54004e 1277 dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
c0fe3026
DW
1278
1279 sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
9c54004e 1280 atm_dev_deregister(card->atmdev[i]);
97d759d3
DW
1281
1282 skb = card->rx_skb[i];
1283 if (skb) {
1284 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
1285 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
1286 dev_kfree_skb(skb);
1287 }
1288 skb = card->tx_skb[i];
1289 if (skb) {
1290 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
1291 skb->len, PCI_DMA_TODEVICE);
1292 dev_kfree_skb(skb);
1293 }
1294 while ((skb = skb_dequeue(&card->tx_queue[i])))
1295 dev_kfree_skb(skb);
1296
9c54004e
DW
1297 }
1298 }
1299}
1300
1301static void fpga_remove(struct pci_dev *dev)
1302{
1303 struct solos_card *card = pci_get_drvdata(dev);
97d759d3
DW
1304
1305 /* Disable IRQs */
1306 iowrite32(0, card->config_regs + IRQ_EN_ADDR);
9c54004e 1307
97d759d3
DW
1308 /* Reset FPGA */
1309 iowrite32(1, card->config_regs + FPGA_MODE);
1310 (void)ioread32(card->config_regs + FPGA_MODE);
9c54004e
DW
1311
1312 atm_remove(card);
1313
9c54004e
DW
1314 free_irq(dev->irq, card);
1315 tasklet_kill(&card->tlet);
1316
97d759d3
DW
1317 /* Release device from reset */
1318 iowrite32(0, card->config_regs + FPGA_MODE);
1319 (void)ioread32(card->config_regs + FPGA_MODE);
1320
9c54004e
DW
1321 pci_iounmap(dev, card->buffers);
1322 pci_iounmap(dev, card->config_regs);
1323
9c54004e
DW
1324 pci_release_regions(dev);
1325 pci_disable_device(dev);
1326
1327 pci_set_drvdata(dev, NULL);
1328 kfree(card);
9c54004e
DW
1329}
1330
1331static struct pci_device_id fpga_pci_tbl[] __devinitdata = {
1332 { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1333 { 0, }
1334};
1335
1336MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
1337
1338static struct pci_driver fpga_driver = {
1339 .name = "solos",
1340 .id_table = fpga_pci_tbl,
1341 .probe = fpga_probe,
1342 .remove = fpga_remove,
1343};
1344
1345
1346static int __init solos_pci_init(void)
1347{
1348 printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
1349 return pci_register_driver(&fpga_driver);
1350}
1351
1352static void __exit solos_pci_exit(void)
1353{
1354 pci_unregister_driver(&fpga_driver);
1355 printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
1356}
1357
1358module_init(solos_pci_init);
1359module_exit(solos_pci_exit);