[GitHub/mt8127/android_kernel_alcatel_ttab.git] / drivers / ata / pata_sc1200.c

/*
 * New ATA layer SC1200 driver		Alan Cox <alan@lxorguk.ukuu.org.uk>
 *
 * TODO: Mode selection filtering
 * TODO: Needs custom DMA cleanup code
 *
 * Based very heavily on
 *
 * linux/drivers/ide/pci/sc1200.c		Version 0.91	28-Jan-2003
 *
 * Copyright (C) 2000-2002		Mark Lord <mlord@pobox.com>
 * May be copied or modified under the terms of the GNU General Public License
 *
 * Development of this chipset driver was funded
 * by the nice folks at National Semiconductor.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME	"pata_sc1200"
#define DRV_VERSION	"0.2.6"

#define SC1200_REV_A	0x00
#define SC1200_REV_B1	0x01
#define SC1200_REV_B3	0x02
#define SC1200_REV_C1	0x03
#define SC1200_REV_D1	0x04

/**
 *	sc1200_clock	-	PCI clock
 *
 *	Return the PCI bus clocking for the SC1200 chipset configuration
 *	in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
 */

static int sc1200_clock(void)
{
	/* Magic registers that give us the chipset data */
	u8 chip_id = inb(0x903C);
	u8 silicon_rev = inb(0x903D);
	u16 pci_clock;

	if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
		return 0;	/* 33 MHz mode */

	/* Clock generator configuration 0x901E its 8/9 are the PCI clocking
	   0/3 is 33Mhz 1 is 48 2 is 66 */

	pci_clock = inw(0x901E);
	pci_clock >>= 8;
	pci_clock &= 0x03;
	if (pci_clock == 3)
		pci_clock = 0;
	return pci_clock;
}

/**
 *	sc1200_set_piomode		-	PIO setup
 *	@ap: ATA interface
 *	@adev: device on the interface
 *
 *	Set our PIO requirements. This is fairly simple on the SC1200
 */

static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	static const u32 pio_timings[4][5] = {
		/* format0, 33Mhz */
		{ 0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010 },
		/* format1, 33Mhz */
		{ 0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010 },
		/* format1, 48Mhz */
		{ 0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021 },
		/* format1, 66Mhz */
		{ 0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131 }
	};

	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u32 format;
	unsigned int reg = 0x40 + 0x10 * ap->port_no;
	int mode = adev->pio_mode - XFER_PIO_0;

	pci_read_config_dword(pdev, reg + 4, &format);
	format >>= 31;
	format += sc1200_clock();
	pci_write_config_dword(pdev, reg + 8 * adev->devno,
				pio_timings[format][mode]);
}

/**
 *	sc1200_set_dmamode		-	DMA timing setup
 *	@ap: ATA interface
 *	@adev: Device being configured
 *
 *	We cannot mix MWDMA and UDMA without reloading timings each switch
 *	master to slave.
 */

static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
	static const u32 udma_timing[3][3] = {
		{ 0x00921250, 0x00911140, 0x00911030 },
		{ 0x00932470, 0x00922260, 0x00922140 },
		{ 0x009436A1, 0x00933481, 0x00923261 }
	};

	static const u32 mwdma_timing[3][3] = {
		{ 0x00077771, 0x00012121, 0x00002020 },
		{ 0x000BBBB2, 0x00024241, 0x00013131 },
		{ 0x000FFFF3, 0x00035352, 0x00015151 }
	};

	int clock = sc1200_clock();
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	unsigned int reg = 0x40 + 0x10 * ap->port_no;
	int mode = adev->dma_mode;
	u32 format;

	if (mode >= XFER_UDMA_0)
		format = udma_timing[clock][mode - XFER_UDMA_0];
	else
		format = mwdma_timing[clock][mode - XFER_MW_DMA_0];

	if (adev->devno == 0) {
		u32 timings;

		pci_read_config_dword(pdev, reg + 4, &timings);
		timings &= 0x80000000UL;
		timings |= format;
		pci_write_config_dword(pdev, reg + 4, timings);
	} else
		pci_write_config_dword(pdev, reg + 12, format);
}

/**
 *	sc1200_qc_issue		-	command issue
 *	@qc: command pending
 *
 *	Called when the libata layer is about to issue a command. We wrap
 *	this interface so that we can load the correct ATA timings if
 *	necessary.  Specifically we have a problem that there is only
 *	one MWDMA/UDMA bit.
 */

static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_device *adev = qc->dev;
	struct ata_device *prev = ap->private_data;

	/* See if the DMA settings could be wrong */
	if (ata_dma_enabled(adev) && adev != prev && prev != NULL) {
		/* Maybe, but do the channels match MWDMA/UDMA ? */
		if ((ata_using_udma(adev) && !ata_using_udma(prev)) ||
		    (ata_using_udma(prev) && !ata_using_udma(adev)))
		    	/* Switch the mode bits */
		    	sc1200_set_dmamode(ap, adev);
	}

	return ata_bmdma_qc_issue(qc);
}

/**
 *	sc1200_qc_defer	-	implement serialization
 *	@qc: command
 *
 *	Serialize command issue on this controller.
 */

static int sc1200_qc_defer(struct ata_queued_cmd *qc)
{
	struct ata_host *host = qc->ap->host;
	struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
	int rc;

	/* First apply the usual rules */
	rc = ata_std_qc_defer(qc);
	if (rc != 0)
		return rc;

	/* Now apply serialization rules. Only allow a command if the
	   other channel state machine is idle */
	if (alt && alt->qc_active)
		return	ATA_DEFER_PORT;
	return 0;
}

static struct scsi_host_template sc1200_sht = {
	ATA_BMDMA_SHT(DRV_NAME),
	.sg_tablesize	= LIBATA_DUMB_MAX_PRD,
};

static struct ata_port_operations sc1200_port_ops = {
	.inherits	= &ata_bmdma_port_ops,
	.qc_prep 	= ata_bmdma_dumb_qc_prep,
	.qc_issue	= sc1200_qc_issue,
	.qc_defer	= sc1200_qc_defer,
	.cable_detect	= ata_cable_40wire,
	.set_piomode	= sc1200_set_piomode,
	.set_dmamode	= sc1200_set_dmamode,
};

/**
 *	sc1200_init_one		-	Initialise an SC1200
 *	@dev: PCI device
 *	@id: Entry in match table
 *
 *	Just throw the needed data at the libata helper and it does all
 *	our work.
 */

static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	static const struct ata_port_info info = {
		.flags = ATA_FLAG_SLAVE_POSS,
		.pio_mask = ATA_PIO4,
		.mwdma_mask = ATA_MWDMA2,
		.udma_mask = ATA_UDMA2,
		.port_ops = &sc1200_port_ops
	};
	const struct ata_port_info *ppi[] = { &info, NULL };

	return ata_pci_bmdma_init_one(dev, ppi, &sc1200_sht, NULL, 0);
}

static const struct pci_device_id sc1200[] = {
	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), },

	{ },
};

static struct pci_driver sc1200_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= sc1200,
	.probe 		= sc1200_init_one,
	.remove		= ata_pci_remove_one,
#ifdef CONFIG_PM
	.suspend	= ata_pci_device_suspend,
	.resume		= ata_pci_device_resume,
#endif
};

module_pci_driver(sc1200_pci_driver);

MODULE_AUTHOR("Alan Cox, Mark Lord");
MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, sc1200);
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
669a5db4	1	/*
ab771630	2	* New ATA layer SC1200 driver Alan Cox <alan@lxorguk.ukuu.org.uk>
669a5db4 JG	3	*
669a5db4 JG	4	* TODO: Mode selection filtering
669a5db4 JG	5	* TODO: Needs custom DMA cleanup code
	6	*
	7	* Based very heavily on
	8	*
	9	* linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
	10	*
	11	* Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
	12	* May be copied or modified under the terms of the GNU General Public License
	13	*
	14	* Development of this chipset driver was funded
	15	* by the nice folks at National Semiconductor.
	16	*
	17	* This program is free software; you can redistribute it and/or modify
	18	* it under the terms of the GNU General Public License version 2 as
	19	* published by the Free Software Foundation.
	20	*
	21	* This program is distributed in the hope that it will be useful,
	22	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	23	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	24	* GNU General Public License for more details.
	25	*
	26	* You should have received a copy of the GNU General Public License
	27	* along with this program; if not, write to the Free Software
	28	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
85cd7251	29	*
669a5db4 JG	30	*/
	31
	32	#include <linux/kernel.h>
	33	#include <linux/module.h>
	34	#include <linux/pci.h>
	35	#include <linux/init.h>
	36	#include <linux/blkdev.h>
	37	#include <linux/delay.h>
	38	#include <scsi/scsi_host.h>
	39	#include <linux/libata.h>
	40
70f301a6	41	#define DRV_NAME "pata_sc1200"
2a3103ce	42	#define DRV_VERSION "0.2.6"
669a5db4 JG	43
	44	#define SC1200_REV_A 0x00
	45	#define SC1200_REV_B1 0x01
	46	#define SC1200_REV_B3 0x02
	47	#define SC1200_REV_C1 0x03
	48	#define SC1200_REV_D1 0x04
	49
	50	/**
	51	* sc1200_clock - PCI clock
	52	*
	53	* Return the PCI bus clocking for the SC1200 chipset configuration
	54	* in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
	55	*/
85cd7251	56
669a5db4 JG	57	static int sc1200_clock(void)
	58	{
	59	/* Magic registers that give us the chipset data */
	60	u8 chip_id = inb(0x903C);
	61	u8 silicon_rev = inb(0x903D);
	62	u16 pci_clock;
85cd7251	63
669a5db4 JG	64	if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
	65	return 0; /* 33 MHz mode */
	66
	67	/* Clock generator configuration 0x901E its 8/9 are the PCI clocking
	68	0/3 is 33Mhz 1 is 48 2 is 66 */
	69
	70	pci_clock = inw(0x901E);
	71	pci_clock >>= 8;
	72	pci_clock &= 0x03;
	73	if (pci_clock == 3)
	74	pci_clock = 0;
	75	return pci_clock;
	76	}
	77
	78	/**
	79	* sc1200_set_piomode - PIO setup
	80	* @ap: ATA interface
	81	* @adev: device on the interface
	82	*
	83	* Set our PIO requirements. This is fairly simple on the SC1200
	84	*/
85cd7251	85
669a5db4 JG	86	static void sc1200_set_piomode(struct ata_port ap, struct ata_device adev)
	87	{
	88	static const u32 pio_timings[4][5] = {
d0dd4a01 BZ	89	/* format0, 33Mhz */
	90	{ 0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010 },
	91	/* format1, 33Mhz */
	92	{ 0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010 },
	93	/* format1, 48Mhz */
	94	{ 0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021 },
	95	/* format1, 66Mhz */
	96	{ 0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131 }
669a5db4 JG	97	};
	98
	99	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	100	u32 format;
	101	unsigned int reg = 0x40 + 0x10 * ap->port_no;
	102	int mode = adev->pio_mode - XFER_PIO_0;
85cd7251	103
669a5db4 JG	104	pci_read_config_dword(pdev, reg + 4, &format);
	105	format >>= 31;
	106	format += sc1200_clock();
85cd7251	107	pci_write_config_dword(pdev, reg + 8 * adev->devno,
669a5db4 JG	108	pio_timings[format][mode]);
	109	}
	110
	111	/**
	112	* sc1200_set_dmamode - DMA timing setup
	113	* @ap: ATA interface
	114	* @adev: Device being configured
	115	*
	116	* We cannot mix MWDMA and UDMA without reloading timings each switch
	117	* master to slave.
	118	*/
85cd7251	119
669a5db4 JG	120	static void sc1200_set_dmamode(struct ata_port ap, struct ata_device adev)
	121	{
	122	static const u32 udma_timing[3][3] = {
	123	{ 0x00921250, 0x00911140, 0x00911030 },
	124	{ 0x00932470, 0x00922260, 0x00922140 },
	125	{ 0x009436A1, 0x00933481, 0x00923261 }
	126	};
85cd7251	127
669a5db4 JG	128	static const u32 mwdma_timing[3][3] = {
	129	{ 0x00077771, 0x00012121, 0x00002020 },
	130	{ 0x000BBBB2, 0x00024241, 0x00013131 },
	131	{ 0x000FFFF3, 0x00035352, 0x00015151 }
	132	};
85cd7251	133
669a5db4 JG	134	int clock = sc1200_clock();
	135	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	136	unsigned int reg = 0x40 + 0x10 * ap->port_no;
	137	int mode = adev->dma_mode;
	138	u32 format;
	139
	140	if (mode >= XFER_UDMA_0)
	141	format = udma_timing[clock][mode - XFER_UDMA_0];
	142	else
	143	format = mwdma_timing[clock][mode - XFER_MW_DMA_0];
85cd7251	144
669a5db4 JG	145	if (adev->devno == 0) {
669a5db4 JG	146	u32 timings;
85cd7251	147
669a5db4 JG	148	pci_read_config_dword(pdev, reg + 4, &timings);
	149	timings &= 0x80000000UL;
	150	timings \|= format;
	151	pci_write_config_dword(pdev, reg + 4, timings);
	152	} else
	153	pci_write_config_dword(pdev, reg + 12, format);
	154	}
	155
	156	/**
9363c382	157	* sc1200_qc_issue - command issue
669a5db4 JG	158	* @qc: command pending
	159	*
	160	* Called when the libata layer is about to issue a command. We wrap
	161	* this interface so that we can load the correct ATA timings if
3a4fa0a2	162	* necessary. Specifically we have a problem that there is only
669a5db4 JG	163	* one MWDMA/UDMA bit.
	164	*/
	165
9363c382	166	static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc)
669a5db4 JG	167	{
	168	struct ata_port *ap = qc->ap;
	169	struct ata_device *adev = qc->dev;
	170	struct ata_device *prev = ap->private_data;
	171
	172	/* See if the DMA settings could be wrong */
b15b3eba	173	if (ata_dma_enabled(adev) && adev != prev && prev != NULL) {
669a5db4	174	/* Maybe, but do the channels match MWDMA/UDMA ? */
b15b3eba AC	175	if ((ata_using_udma(adev) && !ata_using_udma(prev)) \|\|
b15b3eba AC	176	(ata_using_udma(prev) && !ata_using_udma(adev)))
669a5db4 JG	177	/* Switch the mode bits */
	178	sc1200_set_dmamode(ap, adev);
	179	}
	180
360ff783	181	return ata_bmdma_qc_issue(qc);
669a5db4 JG	182	}
669a5db4 JG	183
c0f2ee34 AC	184	/**
	185	* sc1200_qc_defer - implement serialization
	186	* @qc: command
	187	*
	188	* Serialize command issue on this controller.
	189	*/
	190
	191	static int sc1200_qc_defer(struct ata_queued_cmd *qc)
	192	{
	193	struct ata_host *host = qc->ap->host;
	194	struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
	195	int rc;
	196
	197	/* First apply the usual rules */
	198	rc = ata_std_qc_defer(qc);
	199	if (rc != 0)
	200	return rc;
	201
	202	/* Now apply serialization rules. Only allow a command if the
	203	other channel state machine is idle */
	204	if (alt && alt->qc_active)
	205	return ATA_DEFER_PORT;
	206	return 0;
	207	}
	208
669a5db4	209	static struct scsi_host_template sc1200_sht = {
68d1d07b TH	210	ATA_BMDMA_SHT(DRV_NAME),
68d1d07b TH	211	.sg_tablesize = LIBATA_DUMB_MAX_PRD,
669a5db4 JG	212	};
	213
	214	static struct ata_port_operations sc1200_port_ops = {
029cfd6b	215	.inherits = &ata_bmdma_port_ops,
f47451c4	216	.qc_prep = ata_bmdma_dumb_qc_prep,
9363c382	217	.qc_issue = sc1200_qc_issue,
c0f2ee34	218	.qc_defer = sc1200_qc_defer,
029cfd6b TH	219	.cable_detect = ata_cable_40wire,
	220	.set_piomode = sc1200_set_piomode,
	221	.set_dmamode = sc1200_set_dmamode,
85cd7251	222	};
669a5db4 JG	223
	224	/**
	225	* sc1200_init_one - Initialise an SC1200
	226	* @dev: PCI device
	227	* @id: Entry in match table
	228	*
	229	* Just throw the needed data at the libata helper and it does all
	230	* our work.
	231	*/
85cd7251	232
669a5db4 JG	233	static int sc1200_init_one(struct pci_dev dev, const struct pci_device_id id)
669a5db4 JG	234	{
1626aeb8	235	static const struct ata_port_info info = {
1d2808fd	236	.flags = ATA_FLAG_SLAVE_POSS,
14bdef98 EIB	237	.pio_mask = ATA_PIO4,
	238	.mwdma_mask = ATA_MWDMA2,
	239	.udma_mask = ATA_UDMA2,
669a5db4 JG	240	.port_ops = &sc1200_port_ops
669a5db4 JG	241	};
6d4f950e	242	const struct ata_port_info *ppi[] = { &info, NULL };
1626aeb8	243
1c5afdf7	244	return ata_pci_bmdma_init_one(dev, ppi, &sc1200_sht, NULL, 0);
669a5db4 JG	245	}
669a5db4 JG	246
2d2744fc JG	247	static const struct pci_device_id sc1200[] = {
	248	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), },
	249
	250	{ },
669a5db4 JG	251	};
	252
	253	static struct pci_driver sc1200_pci_driver = {
2d2744fc	254	.name = DRV_NAME,
669a5db4 JG	255	.id_table = sc1200,
669a5db4 JG	256	.probe = sc1200_init_one,
30ced0f0	257	.remove = ata_pci_remove_one,
438ac6d5	258	#ifdef CONFIG_PM
30ced0f0 AC	259	.suspend = ata_pci_device_suspend,
30ced0f0 AC	260	.resume = ata_pci_device_resume,
438ac6d5	261	#endif
669a5db4 JG	262	};
669a5db4 JG	263
2fc75da0	264	module_pci_driver(sc1200_pci_driver);
669a5db4	265
669a5db4 JG	266	MODULE_AUTHOR("Alan Cox, Mark Lord");
	267	MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
	268	MODULE_LICENSE("GPL");
	269	MODULE_DEVICE_TABLE(pci, sc1200);
	270	MODULE_VERSION(DRV_VERSION);