Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * processor_idle - idle state submodule to the ACPI processor driver | |
3 | * | |
4 | * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com> | |
5 | * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com> | |
c5ab81ca | 6 | * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de> |
1da177e4 LT |
7 | * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> |
8 | * - Added processor hotplug support | |
02df8b93 VP |
9 | * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> |
10 | * - Added support for C3 on SMP | |
1da177e4 LT |
11 | * |
12 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or (at | |
17 | * your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, but | |
20 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
22 | * General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License along | |
25 | * with this program; if not, write to the Free Software Foundation, Inc., | |
26 | * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
27 | * | |
28 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
29 | */ | |
30 | ||
1da177e4 | 31 | #include <linux/module.h> |
1da177e4 LT |
32 | #include <linux/acpi.h> |
33 | #include <linux/dmi.h> | |
e2668fb5 | 34 | #include <linux/sched.h> /* need_resched() */ |
e9e2cdb4 | 35 | #include <linux/clockchips.h> |
4f86d3a8 | 36 | #include <linux/cpuidle.h> |
0a3b15ac | 37 | #include <linux/syscore_ops.h> |
1da177e4 | 38 | |
3434933b TG |
39 | /* |
40 | * Include the apic definitions for x86 to have the APIC timer related defines | |
41 | * available also for UP (on SMP it gets magically included via linux/smp.h). | |
42 | * asm/acpi.h is not an option, as it would require more include magic. Also | |
43 | * creating an empty asm-ia64/apic.h would just trade pest vs. cholera. | |
44 | */ | |
45 | #ifdef CONFIG_X86 | |
46 | #include <asm/apic.h> | |
47 | #endif | |
48 | ||
1da177e4 LT |
49 | #include <acpi/acpi_bus.h> |
50 | #include <acpi/processor.h> | |
51 | ||
a192a958 LB |
52 | #define PREFIX "ACPI: " |
53 | ||
1da177e4 | 54 | #define ACPI_PROCESSOR_CLASS "processor" |
1da177e4 | 55 | #define _COMPONENT ACPI_PROCESSOR_COMPONENT |
f52fd66d | 56 | ACPI_MODULE_NAME("processor_idle"); |
1da177e4 | 57 | |
4f86d3a8 LB |
58 | static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER; |
59 | module_param(max_cstate, uint, 0000); | |
b6835052 | 60 | static unsigned int nocst __read_mostly; |
1da177e4 | 61 | module_param(nocst, uint, 0000); |
d3e7e99f LB |
62 | static int bm_check_disable __read_mostly; |
63 | module_param(bm_check_disable, uint, 0000); | |
1da177e4 | 64 | |
25de5718 | 65 | static unsigned int latency_factor __read_mostly = 2; |
4963f620 | 66 | module_param(latency_factor, uint, 0644); |
1da177e4 | 67 | |
3d339dcb DL |
68 | static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device); |
69 | ||
6240a10d AS |
70 | static DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], |
71 | acpi_cstate); | |
ac3ebafa | 72 | |
d1896049 TR |
73 | static int disabled_by_idle_boot_param(void) |
74 | { | |
75 | return boot_option_idle_override == IDLE_POLL || | |
d1896049 TR |
76 | boot_option_idle_override == IDLE_HALT; |
77 | } | |
78 | ||
1da177e4 LT |
79 | /* |
80 | * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3. | |
81 | * For now disable this. Probably a bug somewhere else. | |
82 | * | |
83 | * To skip this limit, boot/load with a large max_cstate limit. | |
84 | */ | |
1855256c | 85 | static int set_max_cstate(const struct dmi_system_id *id) |
1da177e4 LT |
86 | { |
87 | if (max_cstate > ACPI_PROCESSOR_MAX_POWER) | |
88 | return 0; | |
89 | ||
3d35600a | 90 | printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate." |
4be44fcd LB |
91 | " Override with \"processor.max_cstate=%d\"\n", id->ident, |
92 | (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1); | |
1da177e4 | 93 | |
3d35600a | 94 | max_cstate = (long)id->driver_data; |
1da177e4 LT |
95 | |
96 | return 0; | |
97 | } | |
98 | ||
7ded5689 AR |
99 | /* Actually this shouldn't be __cpuinitdata, would be better to fix the |
100 | callers to only run once -AK */ | |
101 | static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = { | |
876c184b TR |
102 | { set_max_cstate, "Clevo 5600D", { |
103 | DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"), | |
104 | DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")}, | |
4be44fcd | 105 | (void *)2}, |
370d5cd8 AV |
106 | { set_max_cstate, "Pavilion zv5000", { |
107 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | |
108 | DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")}, | |
109 | (void *)1}, | |
110 | { set_max_cstate, "Asus L8400B", { | |
111 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."), | |
112 | DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")}, | |
113 | (void *)1}, | |
1da177e4 LT |
114 | {}, |
115 | }; | |
116 | ||
4f86d3a8 | 117 | |
2e906655 | 118 | /* |
119 | * Callers should disable interrupts before the call and enable | |
120 | * interrupts after return. | |
121 | */ | |
ddc081a1 VP |
122 | static void acpi_safe_halt(void) |
123 | { | |
e895dad0 | 124 | if (!tif_need_resched()) { |
ddc081a1 | 125 | safe_halt(); |
71e93d15 VP |
126 | local_irq_disable(); |
127 | } | |
ddc081a1 VP |
128 | } |
129 | ||
169a0abb TG |
130 | #ifdef ARCH_APICTIMER_STOPS_ON_C3 |
131 | ||
132 | /* | |
133 | * Some BIOS implementations switch to C3 in the published C2 state. | |
296d93cd LT |
134 | * This seems to be a common problem on AMD boxen, but other vendors |
135 | * are affected too. We pick the most conservative approach: we assume | |
136 | * that the local APIC stops in both C2 and C3. | |
169a0abb | 137 | */ |
7e275cc4 | 138 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb TG |
139 | struct acpi_processor_cx *cx) |
140 | { | |
141 | struct acpi_processor_power *pwr = &pr->power; | |
e585bef8 | 142 | u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2; |
169a0abb | 143 | |
db954b58 VP |
144 | if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT)) |
145 | return; | |
146 | ||
02c68a02 | 147 | if (amd_e400_c1e_detected) |
87ad57ba SL |
148 | type = ACPI_STATE_C1; |
149 | ||
169a0abb TG |
150 | /* |
151 | * Check, if one of the previous states already marked the lapic | |
152 | * unstable | |
153 | */ | |
154 | if (pwr->timer_broadcast_on_state < state) | |
155 | return; | |
156 | ||
e585bef8 | 157 | if (cx->type >= type) |
296d93cd | 158 | pr->power.timer_broadcast_on_state = state; |
169a0abb TG |
159 | } |
160 | ||
918aae42 | 161 | static void __lapic_timer_propagate_broadcast(void *arg) |
169a0abb | 162 | { |
f833bab8 | 163 | struct acpi_processor *pr = (struct acpi_processor *) arg; |
e9e2cdb4 TG |
164 | unsigned long reason; |
165 | ||
166 | reason = pr->power.timer_broadcast_on_state < INT_MAX ? | |
167 | CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF; | |
168 | ||
169 | clockevents_notify(reason, &pr->id); | |
e9e2cdb4 TG |
170 | } |
171 | ||
918aae42 HS |
172 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) |
173 | { | |
174 | smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast, | |
175 | (void *)pr, 1); | |
176 | } | |
177 | ||
e9e2cdb4 | 178 | /* Power(C) State timer broadcast control */ |
7e275cc4 | 179 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, |
e9e2cdb4 TG |
180 | struct acpi_processor_cx *cx, |
181 | int broadcast) | |
182 | { | |
e9e2cdb4 TG |
183 | int state = cx - pr->power.states; |
184 | ||
185 | if (state >= pr->power.timer_broadcast_on_state) { | |
186 | unsigned long reason; | |
187 | ||
188 | reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER : | |
189 | CLOCK_EVT_NOTIFY_BROADCAST_EXIT; | |
190 | clockevents_notify(reason, &pr->id); | |
191 | } | |
169a0abb TG |
192 | } |
193 | ||
194 | #else | |
195 | ||
7e275cc4 | 196 | static void lapic_timer_check_state(int state, struct acpi_processor *pr, |
169a0abb | 197 | struct acpi_processor_cx *cstate) { } |
7e275cc4 LB |
198 | static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { } |
199 | static void lapic_timer_state_broadcast(struct acpi_processor *pr, | |
e9e2cdb4 TG |
200 | struct acpi_processor_cx *cx, |
201 | int broadcast) | |
202 | { | |
203 | } | |
169a0abb TG |
204 | |
205 | #endif | |
206 | ||
0a3b15ac | 207 | #ifdef CONFIG_PM_SLEEP |
815ab0fd LB |
208 | static u32 saved_bm_rld; |
209 | ||
0a3b15ac | 210 | int acpi_processor_suspend(void) |
815ab0fd LB |
211 | { |
212 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld); | |
0a3b15ac | 213 | return 0; |
815ab0fd | 214 | } |
0a3b15ac RW |
215 | |
216 | void acpi_processor_resume(void) | |
815ab0fd LB |
217 | { |
218 | u32 resumed_bm_rld; | |
219 | ||
220 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld); | |
0a3b15ac RW |
221 | if (resumed_bm_rld == saved_bm_rld) |
222 | return; | |
815ab0fd | 223 | |
0a3b15ac | 224 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld); |
815ab0fd | 225 | } |
b04e7bdb | 226 | |
0a3b15ac RW |
227 | static struct syscore_ops acpi_processor_syscore_ops = { |
228 | .suspend = acpi_processor_suspend, | |
229 | .resume = acpi_processor_resume, | |
230 | }; | |
231 | ||
232 | void acpi_processor_syscore_init(void) | |
b04e7bdb | 233 | { |
0a3b15ac | 234 | register_syscore_ops(&acpi_processor_syscore_ops); |
b04e7bdb TG |
235 | } |
236 | ||
0a3b15ac | 237 | void acpi_processor_syscore_exit(void) |
b04e7bdb | 238 | { |
0a3b15ac | 239 | unregister_syscore_ops(&acpi_processor_syscore_ops); |
b04e7bdb | 240 | } |
0a3b15ac | 241 | #endif /* CONFIG_PM_SLEEP */ |
b04e7bdb | 242 | |
592913ec | 243 | #if defined(CONFIG_X86) |
520daf72 | 244 | static void tsc_check_state(int state) |
ddb25f9a AK |
245 | { |
246 | switch (boot_cpu_data.x86_vendor) { | |
247 | case X86_VENDOR_AMD: | |
40fb1715 | 248 | case X86_VENDOR_INTEL: |
ddb25f9a AK |
249 | /* |
250 | * AMD Fam10h TSC will tick in all | |
251 | * C/P/S0/S1 states when this bit is set. | |
252 | */ | |
40fb1715 | 253 | if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) |
520daf72 | 254 | return; |
40fb1715 | 255 | |
ddb25f9a | 256 | /*FALL THROUGH*/ |
ddb25f9a | 257 | default: |
520daf72 LB |
258 | /* TSC could halt in idle, so notify users */ |
259 | if (state > ACPI_STATE_C1) | |
260 | mark_tsc_unstable("TSC halts in idle"); | |
ddb25f9a AK |
261 | } |
262 | } | |
520daf72 LB |
263 | #else |
264 | static void tsc_check_state(int state) { return; } | |
ddb25f9a AK |
265 | #endif |
266 | ||
4be44fcd | 267 | static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr) |
1da177e4 | 268 | { |
1da177e4 LT |
269 | |
270 | if (!pr) | |
d550d98d | 271 | return -EINVAL; |
1da177e4 LT |
272 | |
273 | if (!pr->pblk) | |
d550d98d | 274 | return -ENODEV; |
1da177e4 | 275 | |
1da177e4 | 276 | /* if info is obtained from pblk/fadt, type equals state */ |
1da177e4 LT |
277 | pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2; |
278 | pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3; | |
279 | ||
4c033552 VP |
280 | #ifndef CONFIG_HOTPLUG_CPU |
281 | /* | |
282 | * Check for P_LVL2_UP flag before entering C2 and above on | |
4f86d3a8 | 283 | * an SMP system. |
4c033552 | 284 | */ |
ad71860a | 285 | if ((num_online_cpus() > 1) && |
cee324b1 | 286 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) |
d550d98d | 287 | return -ENODEV; |
4c033552 VP |
288 | #endif |
289 | ||
1da177e4 LT |
290 | /* determine C2 and C3 address from pblk */ |
291 | pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4; | |
292 | pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5; | |
293 | ||
294 | /* determine latencies from FADT */ | |
ba494bee BM |
295 | pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency; |
296 | pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency; | |
1da177e4 | 297 | |
5d76b6f6 LB |
298 | /* |
299 | * FADT specified C2 latency must be less than or equal to | |
300 | * 100 microseconds. | |
301 | */ | |
ba494bee | 302 | if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) { |
5d76b6f6 | 303 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 304 | "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency)); |
5d76b6f6 LB |
305 | /* invalidate C2 */ |
306 | pr->power.states[ACPI_STATE_C2].address = 0; | |
307 | } | |
308 | ||
a6d72c18 LB |
309 | /* |
310 | * FADT supplied C3 latency must be less than or equal to | |
311 | * 1000 microseconds. | |
312 | */ | |
ba494bee | 313 | if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) { |
a6d72c18 | 314 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
ba494bee | 315 | "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency)); |
a6d72c18 LB |
316 | /* invalidate C3 */ |
317 | pr->power.states[ACPI_STATE_C3].address = 0; | |
318 | } | |
319 | ||
1da177e4 LT |
320 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
321 | "lvl2[0x%08x] lvl3[0x%08x]\n", | |
322 | pr->power.states[ACPI_STATE_C2].address, | |
323 | pr->power.states[ACPI_STATE_C3].address)); | |
324 | ||
d550d98d | 325 | return 0; |
1da177e4 LT |
326 | } |
327 | ||
991528d7 | 328 | static int acpi_processor_get_power_info_default(struct acpi_processor *pr) |
acf05f4b | 329 | { |
991528d7 VP |
330 | if (!pr->power.states[ACPI_STATE_C1].valid) { |
331 | /* set the first C-State to C1 */ | |
332 | /* all processors need to support C1 */ | |
333 | pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1; | |
334 | pr->power.states[ACPI_STATE_C1].valid = 1; | |
0fda6b40 | 335 | pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT; |
991528d7 VP |
336 | } |
337 | /* the C0 state only exists as a filler in our array */ | |
acf05f4b | 338 | pr->power.states[ACPI_STATE_C0].valid = 1; |
d550d98d | 339 | return 0; |
acf05f4b VP |
340 | } |
341 | ||
4be44fcd | 342 | static int acpi_processor_get_power_info_cst(struct acpi_processor *pr) |
1da177e4 | 343 | { |
4be44fcd | 344 | acpi_status status = 0; |
439913ff | 345 | u64 count; |
cf824788 | 346 | int current_count; |
4be44fcd LB |
347 | int i; |
348 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | |
349 | union acpi_object *cst; | |
1da177e4 | 350 | |
1da177e4 | 351 | |
1da177e4 | 352 | if (nocst) |
d550d98d | 353 | return -ENODEV; |
1da177e4 | 354 | |
991528d7 | 355 | current_count = 0; |
1da177e4 LT |
356 | |
357 | status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer); | |
358 | if (ACPI_FAILURE(status)) { | |
359 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n")); | |
d550d98d | 360 | return -ENODEV; |
4be44fcd | 361 | } |
1da177e4 | 362 | |
50dd0969 | 363 | cst = buffer.pointer; |
1da177e4 LT |
364 | |
365 | /* There must be at least 2 elements */ | |
366 | if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) { | |
6468463a | 367 | printk(KERN_ERR PREFIX "not enough elements in _CST\n"); |
1da177e4 LT |
368 | status = -EFAULT; |
369 | goto end; | |
370 | } | |
371 | ||
372 | count = cst->package.elements[0].integer.value; | |
373 | ||
374 | /* Validate number of power states. */ | |
375 | if (count < 1 || count != cst->package.count - 1) { | |
6468463a | 376 | printk(KERN_ERR PREFIX "count given by _CST is not valid\n"); |
1da177e4 LT |
377 | status = -EFAULT; |
378 | goto end; | |
379 | } | |
380 | ||
1da177e4 LT |
381 | /* Tell driver that at least _CST is supported. */ |
382 | pr->flags.has_cst = 1; | |
383 | ||
384 | for (i = 1; i <= count; i++) { | |
385 | union acpi_object *element; | |
386 | union acpi_object *obj; | |
387 | struct acpi_power_register *reg; | |
388 | struct acpi_processor_cx cx; | |
389 | ||
390 | memset(&cx, 0, sizeof(cx)); | |
391 | ||
50dd0969 | 392 | element = &(cst->package.elements[i]); |
1da177e4 LT |
393 | if (element->type != ACPI_TYPE_PACKAGE) |
394 | continue; | |
395 | ||
396 | if (element->package.count != 4) | |
397 | continue; | |
398 | ||
50dd0969 | 399 | obj = &(element->package.elements[0]); |
1da177e4 LT |
400 | |
401 | if (obj->type != ACPI_TYPE_BUFFER) | |
402 | continue; | |
403 | ||
4be44fcd | 404 | reg = (struct acpi_power_register *)obj->buffer.pointer; |
1da177e4 LT |
405 | |
406 | if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO && | |
4be44fcd | 407 | (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)) |
1da177e4 LT |
408 | continue; |
409 | ||
1da177e4 | 410 | /* There should be an easy way to extract an integer... */ |
50dd0969 | 411 | obj = &(element->package.elements[1]); |
1da177e4 LT |
412 | if (obj->type != ACPI_TYPE_INTEGER) |
413 | continue; | |
414 | ||
415 | cx.type = obj->integer.value; | |
991528d7 VP |
416 | /* |
417 | * Some buggy BIOSes won't list C1 in _CST - | |
418 | * Let acpi_processor_get_power_info_default() handle them later | |
419 | */ | |
420 | if (i == 1 && cx.type != ACPI_STATE_C1) | |
421 | current_count++; | |
422 | ||
423 | cx.address = reg->address; | |
424 | cx.index = current_count + 1; | |
425 | ||
bc71bec9 | 426 | cx.entry_method = ACPI_CSTATE_SYSTEMIO; |
991528d7 VP |
427 | if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) { |
428 | if (acpi_processor_ffh_cstate_probe | |
429 | (pr->id, &cx, reg) == 0) { | |
bc71bec9 | 430 | cx.entry_method = ACPI_CSTATE_FFH; |
431 | } else if (cx.type == ACPI_STATE_C1) { | |
991528d7 VP |
432 | /* |
433 | * C1 is a special case where FIXED_HARDWARE | |
434 | * can be handled in non-MWAIT way as well. | |
435 | * In that case, save this _CST entry info. | |
991528d7 VP |
436 | * Otherwise, ignore this info and continue. |
437 | */ | |
bc71bec9 | 438 | cx.entry_method = ACPI_CSTATE_HALT; |
4fcb2fcd | 439 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); |
bc71bec9 | 440 | } else { |
991528d7 VP |
441 | continue; |
442 | } | |
da5e09a1 | 443 | if (cx.type == ACPI_STATE_C1 && |
d1896049 | 444 | (boot_option_idle_override == IDLE_NOMWAIT)) { |
c1e3b377 ZY |
445 | /* |
446 | * In most cases the C1 space_id obtained from | |
447 | * _CST object is FIXED_HARDWARE access mode. | |
448 | * But when the option of idle=halt is added, | |
449 | * the entry_method type should be changed from | |
450 | * CSTATE_FFH to CSTATE_HALT. | |
da5e09a1 ZY |
451 | * When the option of idle=nomwait is added, |
452 | * the C1 entry_method type should be | |
453 | * CSTATE_HALT. | |
c1e3b377 ZY |
454 | */ |
455 | cx.entry_method = ACPI_CSTATE_HALT; | |
456 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT"); | |
457 | } | |
4fcb2fcd VP |
458 | } else { |
459 | snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x", | |
460 | cx.address); | |
991528d7 | 461 | } |
1da177e4 | 462 | |
0fda6b40 VP |
463 | if (cx.type == ACPI_STATE_C1) { |
464 | cx.valid = 1; | |
465 | } | |
4fcb2fcd | 466 | |
50dd0969 | 467 | obj = &(element->package.elements[2]); |
1da177e4 LT |
468 | if (obj->type != ACPI_TYPE_INTEGER) |
469 | continue; | |
470 | ||
471 | cx.latency = obj->integer.value; | |
472 | ||
50dd0969 | 473 | obj = &(element->package.elements[3]); |
1da177e4 LT |
474 | if (obj->type != ACPI_TYPE_INTEGER) |
475 | continue; | |
476 | ||
cf824788 JM |
477 | current_count++; |
478 | memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx)); | |
479 | ||
480 | /* | |
481 | * We support total ACPI_PROCESSOR_MAX_POWER - 1 | |
482 | * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1) | |
483 | */ | |
484 | if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) { | |
485 | printk(KERN_WARNING | |
486 | "Limiting number of power states to max (%d)\n", | |
487 | ACPI_PROCESSOR_MAX_POWER); | |
488 | printk(KERN_WARNING | |
489 | "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n"); | |
490 | break; | |
491 | } | |
1da177e4 LT |
492 | } |
493 | ||
4be44fcd | 494 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n", |
cf824788 | 495 | current_count)); |
1da177e4 LT |
496 | |
497 | /* Validate number of power states discovered */ | |
cf824788 | 498 | if (current_count < 2) |
6d93c648 | 499 | status = -EFAULT; |
1da177e4 | 500 | |
4be44fcd | 501 | end: |
02438d87 | 502 | kfree(buffer.pointer); |
1da177e4 | 503 | |
d550d98d | 504 | return status; |
1da177e4 LT |
505 | } |
506 | ||
4be44fcd LB |
507 | static void acpi_processor_power_verify_c3(struct acpi_processor *pr, |
508 | struct acpi_processor_cx *cx) | |
1da177e4 | 509 | { |
ee1ca48f PV |
510 | static int bm_check_flag = -1; |
511 | static int bm_control_flag = -1; | |
02df8b93 | 512 | |
1da177e4 LT |
513 | |
514 | if (!cx->address) | |
d550d98d | 515 | return; |
1da177e4 | 516 | |
1da177e4 LT |
517 | /* |
518 | * PIIX4 Erratum #18: We don't support C3 when Type-F (fast) | |
519 | * DMA transfers are used by any ISA device to avoid livelock. | |
520 | * Note that we could disable Type-F DMA (as recommended by | |
521 | * the erratum), but this is known to disrupt certain ISA | |
522 | * devices thus we take the conservative approach. | |
523 | */ | |
524 | else if (errata.piix4.fdma) { | |
525 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
4be44fcd | 526 | "C3 not supported on PIIX4 with Type-F DMA\n")); |
d550d98d | 527 | return; |
1da177e4 LT |
528 | } |
529 | ||
02df8b93 | 530 | /* All the logic here assumes flags.bm_check is same across all CPUs */ |
ee1ca48f | 531 | if (bm_check_flag == -1) { |
02df8b93 VP |
532 | /* Determine whether bm_check is needed based on CPU */ |
533 | acpi_processor_power_init_bm_check(&(pr->flags), pr->id); | |
534 | bm_check_flag = pr->flags.bm_check; | |
ee1ca48f | 535 | bm_control_flag = pr->flags.bm_control; |
02df8b93 VP |
536 | } else { |
537 | pr->flags.bm_check = bm_check_flag; | |
ee1ca48f | 538 | pr->flags.bm_control = bm_control_flag; |
02df8b93 VP |
539 | } |
540 | ||
541 | if (pr->flags.bm_check) { | |
02df8b93 | 542 | if (!pr->flags.bm_control) { |
ed3110ef VP |
543 | if (pr->flags.has_cst != 1) { |
544 | /* bus mastering control is necessary */ | |
545 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
546 | "C3 support requires BM control\n")); | |
547 | return; | |
548 | } else { | |
549 | /* Here we enter C3 without bus mastering */ | |
550 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | |
551 | "C3 support without BM control\n")); | |
552 | } | |
02df8b93 VP |
553 | } |
554 | } else { | |
02df8b93 VP |
555 | /* |
556 | * WBINVD should be set in fadt, for C3 state to be | |
557 | * supported on when bm_check is not required. | |
558 | */ | |
cee324b1 | 559 | if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) { |
02df8b93 | 560 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
4be44fcd LB |
561 | "Cache invalidation should work properly" |
562 | " for C3 to be enabled on SMP systems\n")); | |
d550d98d | 563 | return; |
02df8b93 | 564 | } |
02df8b93 VP |
565 | } |
566 | ||
1da177e4 LT |
567 | /* |
568 | * Otherwise we've met all of our C3 requirements. | |
569 | * Normalize the C3 latency to expidite policy. Enable | |
570 | * checking of bus mastering status (bm_check) so we can | |
571 | * use this in our C3 policy | |
572 | */ | |
573 | cx->valid = 1; | |
4f86d3a8 | 574 | |
31878dd8 LB |
575 | /* |
576 | * On older chipsets, BM_RLD needs to be set | |
577 | * in order for Bus Master activity to wake the | |
578 | * system from C3. Newer chipsets handle DMA | |
579 | * during C3 automatically and BM_RLD is a NOP. | |
580 | * In either case, the proper way to | |
581 | * handle BM_RLD is to set it and leave it set. | |
582 | */ | |
50ffba1b | 583 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1); |
1da177e4 | 584 | |
d550d98d | 585 | return; |
1da177e4 LT |
586 | } |
587 | ||
1da177e4 LT |
588 | static int acpi_processor_power_verify(struct acpi_processor *pr) |
589 | { | |
590 | unsigned int i; | |
591 | unsigned int working = 0; | |
6eb0a0fd | 592 | |
169a0abb | 593 | pr->power.timer_broadcast_on_state = INT_MAX; |
6eb0a0fd | 594 | |
a0bf284b | 595 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
1da177e4 LT |
596 | struct acpi_processor_cx *cx = &pr->power.states[i]; |
597 | ||
598 | switch (cx->type) { | |
599 | case ACPI_STATE_C1: | |
600 | cx->valid = 1; | |
601 | break; | |
602 | ||
603 | case ACPI_STATE_C2: | |
d22edd29 LB |
604 | if (!cx->address) |
605 | break; | |
606 | cx->valid = 1; | |
1da177e4 LT |
607 | break; |
608 | ||
609 | case ACPI_STATE_C3: | |
610 | acpi_processor_power_verify_c3(pr, cx); | |
611 | break; | |
612 | } | |
7e275cc4 LB |
613 | if (!cx->valid) |
614 | continue; | |
1da177e4 | 615 | |
7e275cc4 LB |
616 | lapic_timer_check_state(i, pr, cx); |
617 | tsc_check_state(cx->type); | |
618 | working++; | |
1da177e4 | 619 | } |
bd663347 | 620 | |
918aae42 | 621 | lapic_timer_propagate_broadcast(pr); |
1da177e4 LT |
622 | |
623 | return (working); | |
624 | } | |
625 | ||
4be44fcd | 626 | static int acpi_processor_get_power_info(struct acpi_processor *pr) |
1da177e4 LT |
627 | { |
628 | unsigned int i; | |
629 | int result; | |
630 | ||
1da177e4 LT |
631 | |
632 | /* NOTE: the idle thread may not be running while calling | |
633 | * this function */ | |
634 | ||
991528d7 VP |
635 | /* Zero initialize all the C-states info. */ |
636 | memset(pr->power.states, 0, sizeof(pr->power.states)); | |
637 | ||
1da177e4 | 638 | result = acpi_processor_get_power_info_cst(pr); |
6d93c648 | 639 | if (result == -ENODEV) |
c5a114f1 | 640 | result = acpi_processor_get_power_info_fadt(pr); |
6d93c648 | 641 | |
991528d7 VP |
642 | if (result) |
643 | return result; | |
644 | ||
645 | acpi_processor_get_power_info_default(pr); | |
646 | ||
cf824788 | 647 | pr->power.count = acpi_processor_power_verify(pr); |
1da177e4 | 648 | |
1da177e4 LT |
649 | /* |
650 | * if one state of type C2 or C3 is available, mark this | |
651 | * CPU as being "idle manageable" | |
652 | */ | |
653 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) { | |
acf05f4b | 654 | if (pr->power.states[i].valid) { |
1da177e4 | 655 | pr->power.count = i; |
2203d6ed LT |
656 | if (pr->power.states[i].type >= ACPI_STATE_C2) |
657 | pr->flags.power = 1; | |
acf05f4b | 658 | } |
1da177e4 LT |
659 | } |
660 | ||
d550d98d | 661 | return 0; |
1da177e4 LT |
662 | } |
663 | ||
4f86d3a8 LB |
664 | /** |
665 | * acpi_idle_bm_check - checks if bus master activity was detected | |
666 | */ | |
667 | static int acpi_idle_bm_check(void) | |
668 | { | |
669 | u32 bm_status = 0; | |
670 | ||
d3e7e99f LB |
671 | if (bm_check_disable) |
672 | return 0; | |
673 | ||
50ffba1b | 674 | acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status); |
4f86d3a8 | 675 | if (bm_status) |
50ffba1b | 676 | acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1); |
4f86d3a8 LB |
677 | /* |
678 | * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect | |
679 | * the true state of bus mastering activity; forcing us to | |
680 | * manually check the BMIDEA bit of each IDE channel. | |
681 | */ | |
682 | else if (errata.piix4.bmisx) { | |
683 | if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01) | |
684 | || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01)) | |
685 | bm_status = 1; | |
686 | } | |
687 | return bm_status; | |
688 | } | |
689 | ||
4f86d3a8 LB |
690 | /** |
691 | * acpi_idle_do_entry - a helper function that does C2 and C3 type entry | |
692 | * @cx: cstate data | |
bc71bec9 | 693 | * |
694 | * Caller disables interrupt before call and enables interrupt after return. | |
4f86d3a8 LB |
695 | */ |
696 | static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx) | |
697 | { | |
dcf30997 SR |
698 | /* Don't trace irqs off for idle */ |
699 | stop_critical_timings(); | |
bc71bec9 | 700 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
4f86d3a8 LB |
701 | /* Call into architectural FFH based C-state */ |
702 | acpi_processor_ffh_cstate_enter(cx); | |
bc71bec9 | 703 | } else if (cx->entry_method == ACPI_CSTATE_HALT) { |
704 | acpi_safe_halt(); | |
4f86d3a8 | 705 | } else { |
4f86d3a8 LB |
706 | /* IO port based C-state */ |
707 | inb(cx->address); | |
708 | /* Dummy wait op - must do something useless after P_LVL2 read | |
709 | because chipsets cannot guarantee that STPCLK# signal | |
710 | gets asserted in time to freeze execution properly. */ | |
cfa806f0 | 711 | inl(acpi_gbl_FADT.xpm_timer_block.address); |
4f86d3a8 | 712 | } |
dcf30997 | 713 | start_critical_timings(); |
4f86d3a8 LB |
714 | } |
715 | ||
716 | /** | |
717 | * acpi_idle_enter_c1 - enters an ACPI C1 state-type | |
718 | * @dev: the target CPU | |
46bcfad7 | 719 | * @drv: cpuidle driver containing cpuidle state info |
e978aa7d | 720 | * @index: index of target state |
4f86d3a8 LB |
721 | * |
722 | * This is equivalent to the HALT instruction. | |
723 | */ | |
724 | static int acpi_idle_enter_c1(struct cpuidle_device *dev, | |
46bcfad7 | 725 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
726 | { |
727 | struct acpi_processor *pr; | |
6240a10d | 728 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
9b12e18c | 729 | |
4a6f4fe8 | 730 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
731 | |
732 | if (unlikely(!pr)) | |
e978aa7d | 733 | return -EINVAL; |
4f86d3a8 | 734 | |
e895dad0 PZ |
735 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
736 | if (current_set_polling_and_test()) | |
737 | return -EINVAL; | |
738 | } | |
739 | ||
7e275cc4 | 740 | lapic_timer_state_broadcast(pr, cx, 1); |
bc71bec9 | 741 | acpi_idle_do_entry(cx); |
e978aa7d | 742 | |
7e275cc4 | 743 | lapic_timer_state_broadcast(pr, cx, 0); |
4f86d3a8 | 744 | |
e978aa7d | 745 | return index; |
4f86d3a8 LB |
746 | } |
747 | ||
1a022e3f BO |
748 | |
749 | /** | |
750 | * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining) | |
751 | * @dev: the target CPU | |
752 | * @index: the index of suggested state | |
753 | */ | |
754 | static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) | |
755 | { | |
6240a10d | 756 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
1a022e3f BO |
757 | |
758 | ACPI_FLUSH_CPU_CACHE(); | |
759 | ||
760 | while (1) { | |
761 | ||
762 | if (cx->entry_method == ACPI_CSTATE_HALT) | |
54f70077 | 763 | safe_halt(); |
1a022e3f BO |
764 | else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) { |
765 | inb(cx->address); | |
766 | /* See comment in acpi_idle_do_entry() */ | |
767 | inl(acpi_gbl_FADT.xpm_timer_block.address); | |
768 | } else | |
769 | return -ENODEV; | |
770 | } | |
771 | ||
772 | /* Never reached */ | |
773 | return 0; | |
774 | } | |
775 | ||
4f86d3a8 LB |
776 | /** |
777 | * acpi_idle_enter_simple - enters an ACPI state without BM handling | |
778 | * @dev: the target CPU | |
46bcfad7 | 779 | * @drv: cpuidle driver with cpuidle state information |
e978aa7d | 780 | * @index: the index of suggested state |
4f86d3a8 LB |
781 | */ |
782 | static int acpi_idle_enter_simple(struct cpuidle_device *dev, | |
46bcfad7 | 783 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
784 | { |
785 | struct acpi_processor *pr; | |
6240a10d | 786 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
50629118 | 787 | |
4a6f4fe8 | 788 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
789 | |
790 | if (unlikely(!pr)) | |
e978aa7d | 791 | return -EINVAL; |
e196441b | 792 | |
e895dad0 PZ |
793 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
794 | if (current_set_polling_and_test()) | |
e978aa7d | 795 | return -EINVAL; |
4f86d3a8 LB |
796 | } |
797 | ||
e17bcb43 TG |
798 | /* |
799 | * Must be done before busmaster disable as we might need to | |
800 | * access HPET ! | |
801 | */ | |
7e275cc4 | 802 | lapic_timer_state_broadcast(pr, cx, 1); |
e17bcb43 | 803 | |
4f86d3a8 LB |
804 | if (cx->type == ACPI_STATE_C3) |
805 | ACPI_FLUSH_CPU_CACHE(); | |
806 | ||
50629118 VP |
807 | /* Tell the scheduler that we are going deep-idle: */ |
808 | sched_clock_idle_sleep_event(); | |
4f86d3a8 | 809 | acpi_idle_do_entry(cx); |
4f86d3a8 | 810 | |
a474a515 | 811 | sched_clock_idle_wakeup_event(0); |
e978aa7d | 812 | |
7e275cc4 | 813 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 814 | return index; |
4f86d3a8 LB |
815 | } |
816 | ||
817 | static int c3_cpu_count; | |
e12f65f7 | 818 | static DEFINE_RAW_SPINLOCK(c3_lock); |
4f86d3a8 LB |
819 | |
820 | /** | |
821 | * acpi_idle_enter_bm - enters C3 with proper BM handling | |
822 | * @dev: the target CPU | |
46bcfad7 | 823 | * @drv: cpuidle driver containing state data |
e978aa7d | 824 | * @index: the index of suggested state |
4f86d3a8 LB |
825 | * |
826 | * If BM is detected, the deepest non-C3 idle state is entered instead. | |
827 | */ | |
828 | static int acpi_idle_enter_bm(struct cpuidle_device *dev, | |
46bcfad7 | 829 | struct cpuidle_driver *drv, int index) |
4f86d3a8 LB |
830 | { |
831 | struct acpi_processor *pr; | |
6240a10d | 832 | struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); |
50629118 | 833 | |
4a6f4fe8 | 834 | pr = __this_cpu_read(processors); |
4f86d3a8 LB |
835 | |
836 | if (unlikely(!pr)) | |
e978aa7d | 837 | return -EINVAL; |
4f86d3a8 | 838 | |
718be4aa | 839 | if (!cx->bm_sts_skip && acpi_idle_bm_check()) { |
46bcfad7 DD |
840 | if (drv->safe_state_index >= 0) { |
841 | return drv->states[drv->safe_state_index].enter(dev, | |
842 | drv, drv->safe_state_index); | |
ddc081a1 | 843 | } else { |
8651f97b | 844 | acpi_safe_halt(); |
75cc5235 | 845 | return -EBUSY; |
ddc081a1 VP |
846 | } |
847 | } | |
848 | ||
e895dad0 PZ |
849 | if (cx->entry_method == ACPI_CSTATE_FFH) { |
850 | if (current_set_polling_and_test()) | |
e978aa7d | 851 | return -EINVAL; |
4f86d3a8 LB |
852 | } |
853 | ||
996520c1 VP |
854 | acpi_unlazy_tlb(smp_processor_id()); |
855 | ||
50629118 VP |
856 | /* Tell the scheduler that we are going deep-idle: */ |
857 | sched_clock_idle_sleep_event(); | |
4f86d3a8 LB |
858 | /* |
859 | * Must be done before busmaster disable as we might need to | |
860 | * access HPET ! | |
861 | */ | |
7e275cc4 | 862 | lapic_timer_state_broadcast(pr, cx, 1); |
4f86d3a8 | 863 | |
ddc081a1 VP |
864 | /* |
865 | * disable bus master | |
866 | * bm_check implies we need ARB_DIS | |
867 | * !bm_check implies we need cache flush | |
868 | * bm_control implies whether we can do ARB_DIS | |
869 | * | |
870 | * That leaves a case where bm_check is set and bm_control is | |
871 | * not set. In that case we cannot do much, we enter C3 | |
872 | * without doing anything. | |
873 | */ | |
874 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 875 | raw_spin_lock(&c3_lock); |
4f86d3a8 LB |
876 | c3_cpu_count++; |
877 | /* Disable bus master arbitration when all CPUs are in C3 */ | |
878 | if (c3_cpu_count == num_online_cpus()) | |
50ffba1b | 879 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1); |
e12f65f7 | 880 | raw_spin_unlock(&c3_lock); |
ddc081a1 VP |
881 | } else if (!pr->flags.bm_check) { |
882 | ACPI_FLUSH_CPU_CACHE(); | |
883 | } | |
4f86d3a8 | 884 | |
ddc081a1 | 885 | acpi_idle_do_entry(cx); |
4f86d3a8 | 886 | |
ddc081a1 VP |
887 | /* Re-enable bus master arbitration */ |
888 | if (pr->flags.bm_check && pr->flags.bm_control) { | |
e12f65f7 | 889 | raw_spin_lock(&c3_lock); |
50ffba1b | 890 | acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0); |
4f86d3a8 | 891 | c3_cpu_count--; |
e12f65f7 | 892 | raw_spin_unlock(&c3_lock); |
4f86d3a8 | 893 | } |
e978aa7d | 894 | |
a474a515 | 895 | sched_clock_idle_wakeup_event(0); |
4f86d3a8 | 896 | |
7e275cc4 | 897 | lapic_timer_state_broadcast(pr, cx, 0); |
e978aa7d | 898 | return index; |
4f86d3a8 LB |
899 | } |
900 | ||
901 | struct cpuidle_driver acpi_idle_driver = { | |
902 | .name = "acpi_idle", | |
903 | .owner = THIS_MODULE, | |
904 | }; | |
905 | ||
906 | /** | |
46bcfad7 DD |
907 | * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE |
908 | * device i.e. per-cpu data | |
909 | * | |
4f86d3a8 | 910 | * @pr: the ACPI processor |
6ef0f086 | 911 | * @dev : the cpuidle device |
4f86d3a8 | 912 | */ |
6ef0f086 DL |
913 | static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr, |
914 | struct cpuidle_device *dev) | |
4f86d3a8 | 915 | { |
9a0b8415 | 916 | int i, count = CPUIDLE_DRIVER_STATE_START; |
4f86d3a8 | 917 | struct acpi_processor_cx *cx; |
4f86d3a8 LB |
918 | |
919 | if (!pr->flags.power_setup_done) | |
920 | return -EINVAL; | |
921 | ||
922 | if (pr->flags.power == 0) { | |
923 | return -EINVAL; | |
924 | } | |
925 | ||
b88a634a KRW |
926 | if (!dev) |
927 | return -EINVAL; | |
928 | ||
dcb84f33 | 929 | dev->cpu = pr->id; |
4fcb2fcd | 930 | |
615dfd93 LB |
931 | if (max_cstate == 0) |
932 | max_cstate = 1; | |
933 | ||
4f86d3a8 LB |
934 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
935 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
936 | |
937 | if (!cx->valid) | |
938 | continue; | |
939 | ||
940 | #ifdef CONFIG_HOTPLUG_CPU | |
941 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
942 | !pr->flags.has_cst && | |
943 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
944 | continue; | |
1fec74a9 | 945 | #endif |
6240a10d | 946 | per_cpu(acpi_cstate[count], dev->cpu) = cx; |
4f86d3a8 | 947 | |
46bcfad7 DD |
948 | count++; |
949 | if (count == CPUIDLE_STATE_MAX) | |
950 | break; | |
951 | } | |
952 | ||
953 | dev->state_count = count; | |
954 | ||
955 | if (!count) | |
956 | return -EINVAL; | |
957 | ||
958 | return 0; | |
959 | } | |
960 | ||
961 | /** | |
962 | * acpi_processor_setup_cpuidle states- prepares and configures cpuidle | |
963 | * global state data i.e. idle routines | |
964 | * | |
965 | * @pr: the ACPI processor | |
966 | */ | |
967 | static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) | |
968 | { | |
969 | int i, count = CPUIDLE_DRIVER_STATE_START; | |
970 | struct acpi_processor_cx *cx; | |
971 | struct cpuidle_state *state; | |
972 | struct cpuidle_driver *drv = &acpi_idle_driver; | |
973 | ||
974 | if (!pr->flags.power_setup_done) | |
975 | return -EINVAL; | |
976 | ||
977 | if (pr->flags.power == 0) | |
978 | return -EINVAL; | |
979 | ||
980 | drv->safe_state_index = -1; | |
4fcb2fcd | 981 | for (i = 0; i < CPUIDLE_STATE_MAX; i++) { |
46bcfad7 DD |
982 | drv->states[i].name[0] = '\0'; |
983 | drv->states[i].desc[0] = '\0'; | |
4fcb2fcd VP |
984 | } |
985 | ||
615dfd93 LB |
986 | if (max_cstate == 0) |
987 | max_cstate = 1; | |
988 | ||
4f86d3a8 LB |
989 | for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) { |
990 | cx = &pr->power.states[i]; | |
4f86d3a8 LB |
991 | |
992 | if (!cx->valid) | |
993 | continue; | |
994 | ||
995 | #ifdef CONFIG_HOTPLUG_CPU | |
996 | if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) && | |
997 | !pr->flags.has_cst && | |
998 | !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) | |
999 | continue; | |
1fec74a9 | 1000 | #endif |
4f86d3a8 | 1001 | |
46bcfad7 | 1002 | state = &drv->states[count]; |
4f86d3a8 | 1003 | snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i); |
4fcb2fcd | 1004 | strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN); |
4f86d3a8 | 1005 | state->exit_latency = cx->latency; |
4963f620 | 1006 | state->target_residency = cx->latency * latency_factor; |
4f86d3a8 LB |
1007 | |
1008 | state->flags = 0; | |
1009 | switch (cx->type) { | |
1010 | case ACPI_STATE_C1: | |
8e92b660 VP |
1011 | if (cx->entry_method == ACPI_CSTATE_FFH) |
1012 | state->flags |= CPUIDLE_FLAG_TIME_VALID; | |
1013 | ||
4f86d3a8 | 1014 | state->enter = acpi_idle_enter_c1; |
1a022e3f | 1015 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1016 | drv->safe_state_index = count; |
4f86d3a8 LB |
1017 | break; |
1018 | ||
1019 | case ACPI_STATE_C2: | |
4f86d3a8 LB |
1020 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
1021 | state->enter = acpi_idle_enter_simple; | |
1a022e3f | 1022 | state->enter_dead = acpi_idle_play_dead; |
46bcfad7 | 1023 | drv->safe_state_index = count; |
4f86d3a8 LB |
1024 | break; |
1025 | ||
1026 | case ACPI_STATE_C3: | |
4f86d3a8 | 1027 | state->flags |= CPUIDLE_FLAG_TIME_VALID; |
4f86d3a8 LB |
1028 | state->enter = pr->flags.bm_check ? |
1029 | acpi_idle_enter_bm : | |
1030 | acpi_idle_enter_simple; | |
1031 | break; | |
1032 | } | |
1033 | ||
1034 | count++; | |
9a0b8415 | 1035 | if (count == CPUIDLE_STATE_MAX) |
1036 | break; | |
4f86d3a8 LB |
1037 | } |
1038 | ||
46bcfad7 | 1039 | drv->state_count = count; |
4f86d3a8 LB |
1040 | |
1041 | if (!count) | |
1042 | return -EINVAL; | |
1043 | ||
4f86d3a8 LB |
1044 | return 0; |
1045 | } | |
1046 | ||
46bcfad7 | 1047 | int acpi_processor_hotplug(struct acpi_processor *pr) |
4f86d3a8 | 1048 | { |
dcb84f33 | 1049 | int ret = 0; |
e8b1b59d | 1050 | struct cpuidle_device *dev; |
4f86d3a8 | 1051 | |
d1896049 | 1052 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1053 | return 0; |
1054 | ||
4f86d3a8 LB |
1055 | if (!pr) |
1056 | return -EINVAL; | |
1057 | ||
1058 | if (nocst) { | |
1059 | return -ENODEV; | |
1060 | } | |
1061 | ||
1062 | if (!pr->flags.power_setup_done) | |
1063 | return -ENODEV; | |
1064 | ||
e8b1b59d | 1065 | dev = per_cpu(acpi_cpuidle_device, pr->id); |
4f86d3a8 | 1066 | cpuidle_pause_and_lock(); |
3d339dcb | 1067 | cpuidle_disable_device(dev); |
4f86d3a8 | 1068 | acpi_processor_get_power_info(pr); |
dcb84f33 | 1069 | if (pr->flags.power) { |
6ef0f086 | 1070 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1071 | ret = cpuidle_enable_device(dev); |
dcb84f33 | 1072 | } |
4f86d3a8 LB |
1073 | cpuidle_resume_and_unlock(); |
1074 | ||
1075 | return ret; | |
1076 | } | |
1077 | ||
46bcfad7 DD |
1078 | int acpi_processor_cst_has_changed(struct acpi_processor *pr) |
1079 | { | |
1080 | int cpu; | |
1081 | struct acpi_processor *_pr; | |
3d339dcb | 1082 | struct cpuidle_device *dev; |
46bcfad7 DD |
1083 | |
1084 | if (disabled_by_idle_boot_param()) | |
1085 | return 0; | |
1086 | ||
1087 | if (!pr) | |
1088 | return -EINVAL; | |
1089 | ||
1090 | if (nocst) | |
1091 | return -ENODEV; | |
1092 | ||
1093 | if (!pr->flags.power_setup_done) | |
1094 | return -ENODEV; | |
1095 | ||
1096 | /* | |
1097 | * FIXME: Design the ACPI notification to make it once per | |
1098 | * system instead of once per-cpu. This condition is a hack | |
1099 | * to make the code that updates C-States be called once. | |
1100 | */ | |
1101 | ||
9505626d | 1102 | if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) { |
46bcfad7 DD |
1103 | |
1104 | cpuidle_pause_and_lock(); | |
1105 | /* Protect against cpu-hotplug */ | |
1106 | get_online_cpus(); | |
1107 | ||
1108 | /* Disable all cpuidle devices */ | |
1109 | for_each_online_cpu(cpu) { | |
1110 | _pr = per_cpu(processors, cpu); | |
1111 | if (!_pr || !_pr->flags.power_setup_done) | |
1112 | continue; | |
3d339dcb DL |
1113 | dev = per_cpu(acpi_cpuidle_device, cpu); |
1114 | cpuidle_disable_device(dev); | |
46bcfad7 DD |
1115 | } |
1116 | ||
1117 | /* Populate Updated C-state information */ | |
f427e5f1 | 1118 | acpi_processor_get_power_info(pr); |
46bcfad7 DD |
1119 | acpi_processor_setup_cpuidle_states(pr); |
1120 | ||
1121 | /* Enable all cpuidle devices */ | |
1122 | for_each_online_cpu(cpu) { | |
1123 | _pr = per_cpu(processors, cpu); | |
1124 | if (!_pr || !_pr->flags.power_setup_done) | |
1125 | continue; | |
1126 | acpi_processor_get_power_info(_pr); | |
1127 | if (_pr->flags.power) { | |
3d339dcb | 1128 | dev = per_cpu(acpi_cpuidle_device, cpu); |
6ef0f086 | 1129 | acpi_processor_setup_cpuidle_cx(_pr, dev); |
3d339dcb | 1130 | cpuidle_enable_device(dev); |
46bcfad7 DD |
1131 | } |
1132 | } | |
1133 | put_online_cpus(); | |
1134 | cpuidle_resume_and_unlock(); | |
1135 | } | |
1136 | ||
1137 | return 0; | |
1138 | } | |
1139 | ||
1140 | static int acpi_processor_registered; | |
1141 | ||
38a991b6 | 1142 | int __cpuinit acpi_processor_power_init(struct acpi_processor *pr) |
1da177e4 | 1143 | { |
4be44fcd | 1144 | acpi_status status = 0; |
46bcfad7 | 1145 | int retval; |
3d339dcb | 1146 | struct cpuidle_device *dev; |
b6835052 | 1147 | static int first_run; |
1da177e4 | 1148 | |
d1896049 | 1149 | if (disabled_by_idle_boot_param()) |
36a91358 | 1150 | return 0; |
1da177e4 LT |
1151 | |
1152 | if (!first_run) { | |
1153 | dmi_check_system(processor_power_dmi_table); | |
c1c30634 | 1154 | max_cstate = acpi_processor_cstate_check(max_cstate); |
1da177e4 | 1155 | if (max_cstate < ACPI_C_STATES_MAX) |
4be44fcd LB |
1156 | printk(KERN_NOTICE |
1157 | "ACPI: processor limited to max C-state %d\n", | |
1158 | max_cstate); | |
1da177e4 LT |
1159 | first_run++; |
1160 | } | |
1161 | ||
02df8b93 | 1162 | if (!pr) |
d550d98d | 1163 | return -EINVAL; |
02df8b93 | 1164 | |
cee324b1 | 1165 | if (acpi_gbl_FADT.cst_control && !nocst) { |
4be44fcd | 1166 | status = |
cee324b1 | 1167 | acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8); |
1da177e4 | 1168 | if (ACPI_FAILURE(status)) { |
a6fc6720 TR |
1169 | ACPI_EXCEPTION((AE_INFO, status, |
1170 | "Notifying BIOS of _CST ability failed")); | |
1da177e4 LT |
1171 | } |
1172 | } | |
1173 | ||
1174 | acpi_processor_get_power_info(pr); | |
4f86d3a8 | 1175 | pr->flags.power_setup_done = 1; |
1da177e4 LT |
1176 | |
1177 | /* | |
1178 | * Install the idle handler if processor power management is supported. | |
1179 | * Note that we use previously set idle handler will be used on | |
1180 | * platforms that only support C1. | |
1181 | */ | |
36a91358 | 1182 | if (pr->flags.power) { |
46bcfad7 DD |
1183 | /* Register acpi_idle_driver if not already registered */ |
1184 | if (!acpi_processor_registered) { | |
1185 | acpi_processor_setup_cpuidle_states(pr); | |
1186 | retval = cpuidle_register_driver(&acpi_idle_driver); | |
1187 | if (retval) | |
1188 | return retval; | |
1189 | printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n", | |
1190 | acpi_idle_driver.name); | |
1191 | } | |
3d339dcb DL |
1192 | |
1193 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1194 | if (!dev) | |
1195 | return -ENOMEM; | |
1196 | per_cpu(acpi_cpuidle_device, pr->id) = dev; | |
1197 | ||
6ef0f086 | 1198 | acpi_processor_setup_cpuidle_cx(pr, dev); |
3d339dcb | 1199 | |
46bcfad7 DD |
1200 | /* Register per-cpu cpuidle_device. Cpuidle driver |
1201 | * must already be registered before registering device | |
1202 | */ | |
3d339dcb | 1203 | retval = cpuidle_register_device(dev); |
46bcfad7 DD |
1204 | if (retval) { |
1205 | if (acpi_processor_registered == 0) | |
1206 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1207 | return retval; | |
1208 | } | |
1209 | acpi_processor_registered++; | |
1da177e4 | 1210 | } |
d550d98d | 1211 | return 0; |
1da177e4 LT |
1212 | } |
1213 | ||
38a991b6 | 1214 | int acpi_processor_power_exit(struct acpi_processor *pr) |
1da177e4 | 1215 | { |
3d339dcb DL |
1216 | struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id); |
1217 | ||
d1896049 | 1218 | if (disabled_by_idle_boot_param()) |
36a91358 VP |
1219 | return 0; |
1220 | ||
46bcfad7 | 1221 | if (pr->flags.power) { |
3d339dcb | 1222 | cpuidle_unregister_device(dev); |
46bcfad7 DD |
1223 | acpi_processor_registered--; |
1224 | if (acpi_processor_registered == 0) | |
1225 | cpuidle_unregister_driver(&acpi_idle_driver); | |
1226 | } | |
1da177e4 | 1227 | |
46bcfad7 | 1228 | pr->flags.power_setup_done = 0; |
d550d98d | 1229 | return 0; |
1da177e4 | 1230 | } |