[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / pci / xen.c

/*
 * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
 * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
 * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
 * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
 * 0xcf8 PCI configuration read/write.
 *
 *   Author: Ryan Wilson <hap9@epoch.ncsc.mil>
 *           Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
 *           Stefano Stabellini <stefano.stabellini@eu.citrix.com>
 */
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/acpi.h>

#include <linux/io.h>
#include <asm/io_apic.h>
#include <asm/pci_x86.h>

#include <asm/xen/hypervisor.h>

#include <xen/features.h>
#include <xen/events.h>
#include <asm/xen/pci.h>

static int xen_pcifront_enable_irq(struct pci_dev *dev)
{
	int rc;
	int share = 1;
	int pirq;
	u8 gsi;

	rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
	if (rc < 0) {
		dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
			 rc);
		return rc;
	}
	/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
	pirq = gsi;

	if (gsi < NR_IRQS_LEGACY)
		share = 0;

	rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
	if (rc < 0) {
		dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
			 gsi, pirq, rc);
		return rc;
	}

	dev->irq = rc;
	dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
	return 0;
}

#ifdef CONFIG_ACPI
static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
			     bool set_pirq)
{
	int rc, pirq = -1, irq = -1;
	struct physdev_map_pirq map_irq;
	int shareable = 0;
	char *name;

	if (set_pirq)
		pirq = gsi;

	map_irq.domid = DOMID_SELF;
	map_irq.type = MAP_PIRQ_TYPE_GSI;
	map_irq.index = gsi;
	map_irq.pirq = pirq;

	rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
	if (rc) {
		printk(KERN_WARNING "xen map irq failed %d\n", rc);
		return -1;
	}

	if (triggering == ACPI_EDGE_SENSITIVE) {
		shareable = 0;
		name = "ioapic-edge";
	} else {
		shareable = 1;
		name = "ioapic-level";
	}

	if (gsi_override >= 0)
		gsi = gsi_override;

	irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
	if (irq < 0)
		goto out;

	printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
out:
	return irq;
}

static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
				     int trigger, int polarity)
{
	if (!xen_hvm_domain())
		return -1;

	return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
				 false /* no mapping of GSI to PIRQ */);
}

#ifdef CONFIG_XEN_DOM0
static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
{
	int rc, irq;
	struct physdev_setup_gsi setup_gsi;

	if (!xen_pv_domain())
		return -1;

	printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
			gsi, triggering, polarity);

	irq = xen_register_pirq(gsi, gsi_override, triggering, true);

	setup_gsi.gsi = gsi;
	setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
	setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);

	rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
	if (rc == -EEXIST)
		printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
	else if (rc) {
		printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
				gsi, rc);
	}

	return irq;
}

static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
				 int trigger, int polarity)
{
	return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
}
#endif
#endif

#if defined(CONFIG_PCI_MSI)
#include <linux/msi.h>
#include <asm/msidef.h>

struct xen_pci_frontend_ops *xen_pci_frontend;
EXPORT_SYMBOL_GPL(xen_pci_frontend);

static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
	int irq, ret, i;
	struct msi_desc *msidesc;
	int *v;

	v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
	if (!v)
		return -ENOMEM;

	if (type == PCI_CAP_ID_MSIX)
		ret = xen_pci_frontend_enable_msix(dev, v, nvec);
	else
		ret = xen_pci_frontend_enable_msi(dev, v);
	if (ret)
		goto error;
	i = 0;
	list_for_each_entry(msidesc, &dev->msi_list, list) {
		irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0,
					       (type == PCI_CAP_ID_MSIX) ?
					       "pcifront-msi-x" :
					       "pcifront-msi",
						DOMID_SELF);
		if (irq < 0) {
			ret = irq;
			goto free;
		}
		i++;
	}
	kfree(v);
	return 0;

error:
	dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
free:
	kfree(v);
	return ret;
}

#define XEN_PIRQ_MSI_DATA  (MSI_DATA_TRIGGER_EDGE | \
		MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))

static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
		struct msi_msg *msg)
{
	/* We set vector == 0 to tell the hypervisor we don't care about it,
	 * but we want a pirq setup instead.
	 * We use the dest_id field to pass the pirq that we want. */
	msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
	msg->address_lo =
		MSI_ADDR_BASE_LO |
		MSI_ADDR_DEST_MODE_PHYSICAL |
		MSI_ADDR_REDIRECTION_CPU |
		MSI_ADDR_DEST_ID(pirq);

	msg->data = XEN_PIRQ_MSI_DATA;
}

static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
	int irq, pirq;
	struct msi_desc *msidesc;
	struct msi_msg msg;

	list_for_each_entry(msidesc, &dev->msi_list, list) {
		__read_msi_msg(msidesc, &msg);
		pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
			((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
		if (msg.data != XEN_PIRQ_MSI_DATA ||
		    xen_irq_from_pirq(pirq) < 0) {
			pirq = xen_allocate_pirq_msi(dev, msidesc);
			if (pirq < 0) {
				irq = -ENODEV;
				goto error;
			}
			xen_msi_compose_msg(dev, pirq, &msg);
			__write_msi_msg(msidesc, &msg);
			dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
		} else {
			dev_dbg(&dev->dev,
				"xen: msi already bound to pirq=%d\n", pirq);
		}
		irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0,
					       (type == PCI_CAP_ID_MSIX) ?
					       "msi-x" : "msi",
					       DOMID_SELF);
		if (irq < 0)
			goto error;
		dev_dbg(&dev->dev,
			"xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
	}
	return 0;

error:
	dev_err(&dev->dev,
		"Xen PCI frontend has not registered MSI/MSI-X support!\n");
	return irq;
}

#ifdef CONFIG_XEN_DOM0
static bool __read_mostly pci_seg_supported = true;

static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
	int ret = 0;
	struct msi_desc *msidesc;

	list_for_each_entry(msidesc, &dev->msi_list, list) {
		struct physdev_map_pirq map_irq;
		domid_t domid;

		domid = ret = xen_find_device_domain_owner(dev);
		/* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
		 * hence check ret value for < 0. */
		if (ret < 0)
			domid = DOMID_SELF;

		memset(&map_irq, 0, sizeof(map_irq));
		map_irq.domid = domid;
		map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
		map_irq.index = -1;
		map_irq.pirq = -1;
		map_irq.bus = dev->bus->number |
			      (pci_domain_nr(dev->bus) << 16);
		map_irq.devfn = dev->devfn;

		if (type == PCI_CAP_ID_MSIX) {
			int pos;
			u32 table_offset, bir;

			pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);

			pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
					      &table_offset);
			bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);

			map_irq.table_base = pci_resource_start(dev, bir);
			map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
		}

		ret = -EINVAL;
		if (pci_seg_supported)
			ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
						    &map_irq);
		if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
			map_irq.type = MAP_PIRQ_TYPE_MSI;
			map_irq.index = -1;
			map_irq.pirq = -1;
			map_irq.bus = dev->bus->number;
			ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
						    &map_irq);
			if (ret != -EINVAL)
				pci_seg_supported = false;
		}
		if (ret) {
			dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
				 ret, domid);
			goto out;
		}

		ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
					       map_irq.pirq, map_irq.index,
					       (type == PCI_CAP_ID_MSIX) ?
					       "msi-x" : "msi",
						domid);
		if (ret < 0)
			goto out;
	}
	ret = 0;
out:
	return ret;
}
#endif

static void xen_teardown_msi_irqs(struct pci_dev *dev)
{
	struct msi_desc *msidesc;

	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
	if (msidesc->msi_attrib.is_msix)
		xen_pci_frontend_disable_msix(dev);
	else
		xen_pci_frontend_disable_msi(dev);

	/* Free the IRQ's and the msidesc using the generic code. */
	default_teardown_msi_irqs(dev);
}

static void xen_teardown_msi_irq(unsigned int irq)
{
	xen_destroy_irq(irq);
}

#endif

int __init pci_xen_init(void)
{
	if (!xen_pv_domain() || xen_initial_domain())
		return -ENODEV;

	printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");

	pcibios_set_cache_line_size();

	pcibios_enable_irq = xen_pcifront_enable_irq;
	pcibios_disable_irq = NULL;

#ifdef CONFIG_ACPI
	/* Keep ACPI out of the picture */
	acpi_noirq = 1;
#endif

#ifdef CONFIG_PCI_MSI
	x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
	x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
#endif
	return 0;
}

int __init pci_xen_hvm_init(void)
{
	if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
		return 0;

#ifdef CONFIG_ACPI
	/*
	 * We don't want to change the actual ACPI delivery model,
	 * just how GSIs get registered.
	 */
	__acpi_register_gsi = acpi_register_gsi_xen_hvm;
#endif

#ifdef CONFIG_PCI_MSI
	x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
#endif
	return 0;
}

#ifdef CONFIG_XEN_DOM0
static __init void xen_setup_acpi_sci(void)
{
	int rc;
	int trigger, polarity;
	int gsi = acpi_sci_override_gsi;
	int irq = -1;
	int gsi_override = -1;

	if (!gsi)
		return;

	rc = acpi_get_override_irq(gsi, &trigger, &polarity);
	if (rc) {
		printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
				" sci, rc=%d\n", rc);
		return;
	}
	trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
	polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;

	printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
			"polarity=%d\n", gsi, trigger, polarity);

	/* Before we bind the GSI to a Linux IRQ, check whether
	 * we need to override it with bus_irq (IRQ) value. Usually for
	 * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
	 *  ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
	 * but there are oddballs where the IRQ != GSI:
	 *  ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
	 * which ends up being: gsi_to_irq[9] == 20
	 * (which is what acpi_gsi_to_irq ends up calling when starting the
	 * the ACPI interpreter and keels over since IRQ 9 has not been
	 * setup as we had setup IRQ 20 for it).
	 */
	if (acpi_gsi_to_irq(gsi, &irq) == 0) {
		/* Use the provided value if it's valid. */
		if (irq >= 0)
			gsi_override = irq;
	}

	gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
	printk(KERN_INFO "xen: acpi sci %d\n", gsi);

	return;
}

int __init pci_xen_initial_domain(void)
{
	int irq;

#ifdef CONFIG_PCI_MSI
	x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
#endif
	xen_setup_acpi_sci();
	__acpi_register_gsi = acpi_register_gsi_xen;
	/* Pre-allocate legacy irqs */
	for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
		int trigger, polarity;

		if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
			continue;

		xen_register_pirq(irq, -1 /* no GSI override */,
			trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
			true /* Map GSI to PIRQ */);
	}
	if (0 == nr_ioapics) {
		for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
			xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
	}
	return 0;
}

struct xen_device_domain_owner {
	domid_t domain;
	struct pci_dev *dev;
	struct list_head list;
};

static DEFINE_SPINLOCK(dev_domain_list_spinlock);
static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);

static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
{
	struct xen_device_domain_owner *owner;

	list_for_each_entry(owner, &dev_domain_list, list) {
		if (owner->dev == dev)
			return owner;
	}
	return NULL;
}

int xen_find_device_domain_owner(struct pci_dev *dev)
{
	struct xen_device_domain_owner *owner;
	int domain = -ENODEV;

	spin_lock(&dev_domain_list_spinlock);
	owner = find_device(dev);
	if (owner)
		domain = owner->domain;
	spin_unlock(&dev_domain_list_spinlock);
	return domain;
}
EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);

int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
{
	struct xen_device_domain_owner *owner;

	owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
	if (!owner)
		return -ENODEV;

	spin_lock(&dev_domain_list_spinlock);
	if (find_device(dev)) {
		spin_unlock(&dev_domain_list_spinlock);
		kfree(owner);
		return -EEXIST;
	}
	owner->domain = domain;
	owner->dev = dev;
	list_add_tail(&owner->list, &dev_domain_list);
	spin_unlock(&dev_domain_list_spinlock);
	return 0;
}
EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);

int xen_unregister_device_domain_owner(struct pci_dev *dev)
{
	struct xen_device_domain_owner *owner;

	spin_lock(&dev_domain_list_spinlock);
	owner = find_device(dev);
	if (!owner) {
		spin_unlock(&dev_domain_list_spinlock);
		return -ENODEV;
	}
	list_del(&owner->list);
	spin_unlock(&dev_domain_list_spinlock);
	kfree(owner);
	return 0;
}
EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
#endif
Commit	Line	Data
b5401a96	1	/*
996c34ae KRW	2	* Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
	3	* initial domain support. We also handle the DSDT _PRT callbacks for GSI's
	4	* used in HVM and initial domain mode (PV does not parse ACPI, so it has no
	5	* concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
	6	* 0xcf8 PCI configuration read/write.
b5401a96 AN	7	*
b5401a96 AN	8	* Author: Ryan Wilson <hap9@epoch.ncsc.mil>
996c34ae KRW	9	* Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
996c34ae KRW	10	* Stefano Stabellini <stefano.stabellini@eu.citrix.com>
b5401a96 AN	11	*/
	12	#include <linux/module.h>
	13	#include <linux/init.h>
	14	#include <linux/pci.h>
	15	#include <linux/acpi.h>
	16
	17	#include <linux/io.h>
0e058e52	18	#include <asm/io_apic.h>
b5401a96 AN	19	#include <asm/pci_x86.h>
	20
	21	#include <asm/xen/hypervisor.h>
	22
3942b740	23	#include <xen/features.h>
b5401a96 AN	24	#include <xen/events.h>
	25	#include <asm/xen/pci.h>
	26
fef6e262 KRW	27	static int xen_pcifront_enable_irq(struct pci_dev *dev)
	28	{
	29	int rc;
	30	int share = 1;
	31	int pirq;
	32	u8 gsi;
	33
	34	rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
	35	if (rc < 0) {
	36	dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
	37	rc);
	38	return rc;
	39	}
78316ada KRW	40	/* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
78316ada KRW	41	pirq = gsi;
fef6e262 KRW	42
	43	if (gsi < NR_IRQS_LEGACY)
	44	share = 0;
	45
	46	rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
	47	if (rc < 0) {
	48	dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
	49	gsi, pirq, rc);
	50	return rc;
	51	}
	52
	53	dev->irq = rc;
	54	dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
	55	return 0;
	56	}
	57
42a1de56	58	#ifdef CONFIG_ACPI
ed89eb63	59	static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
78316ada	60	bool set_pirq)
42a1de56	61	{
ed89eb63	62	int rc, pirq = -1, irq = -1;
42a1de56 SS	63	struct physdev_map_pirq map_irq;
	64	int shareable = 0;
	65	char *name;
	66
78316ada KRW	67	if (set_pirq)
	68	pirq = gsi;
	69
fef6e262 KRW	70	map_irq.domid = DOMID_SELF;
	71	map_irq.type = MAP_PIRQ_TYPE_GSI;
	72	map_irq.index = gsi;
	73	map_irq.pirq = pirq;
	74
	75	rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
	76	if (rc) {
	77	printk(KERN_WARNING "xen map irq failed %d\n", rc);
	78	return -1;
	79	}
	80
30bd35ed KRW	81	if (triggering == ACPI_EDGE_SENSITIVE) {
	82	shareable = 0;
	83	name = "ioapic-edge";
	84	} else {
	85	shareable = 1;
	86	name = "ioapic-level";
	87	}
	88
	89	if (gsi_override >= 0)
	90	gsi = gsi_override;
	91
ed89eb63	92	irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
30bd35ed KRW	93	if (irq < 0)
	94	goto out;
	95
ed89eb63	96	printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
fef6e262 KRW	97	out:
	98	return irq;
	99	}
	100
ed89eb63 KRW	101	static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
	102	int trigger, int polarity)
	103	{
	104	if (!xen_hvm_domain())
	105	return -1;
	106
78316ada KRW	107	return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
78316ada KRW	108	false /* no mapping of GSI to PIRQ */);
ed89eb63 KRW	109	}
	110
	111	#ifdef CONFIG_XEN_DOM0
fef6e262 KRW	112	static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
	113	{
	114	int rc, irq;
	115	struct physdev_setup_gsi setup_gsi;
	116
	117	if (!xen_pv_domain())
	118	return -1;
	119
	120	printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
	121	gsi, triggering, polarity);
	122
ed89eb63	123	irq = xen_register_pirq(gsi, gsi_override, triggering, true);
fef6e262 KRW	124
	125	setup_gsi.gsi = gsi;
	126	setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
	127	setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
	128
	129	rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
	130	if (rc == -EEXIST)
	131	printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
	132	else if (rc) {
	133	printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
	134	gsi, rc);
	135	}
	136
	137	return irq;
	138	}
	139
	140	static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
	141	int trigger, int polarity)
	142	{
	143	return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
	144	}
	145	#endif
d92edd81	146	#endif
fef6e262	147
b5401a96 AN	148	#if defined(CONFIG_PCI_MSI)
b5401a96 AN	149	#include <linux/msi.h>
809f9267	150	#include <asm/msidef.h>
b5401a96 AN	151
	152	struct xen_pci_frontend_ops *xen_pci_frontend;
	153	EXPORT_SYMBOL_GPL(xen_pci_frontend);
	154
fef6e262 KRW	155	static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
	156	{
	157	int irq, ret, i;
	158	struct msi_desc *msidesc;
	159	int *v;
	160
	161	v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
	162	if (!v)
	163	return -ENOMEM;
	164
	165	if (type == PCI_CAP_ID_MSIX)
	166	ret = xen_pci_frontend_enable_msix(dev, v, nvec);
	167	else
	168	ret = xen_pci_frontend_enable_msi(dev, v);
	169	if (ret)
	170	goto error;
	171	i = 0;
	172	list_for_each_entry(msidesc, &dev->msi_list, list) {
	173	irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i], 0,
	174	(type == PCI_CAP_ID_MSIX) ?
	175	"pcifront-msi-x" :
	176	"pcifront-msi",
	177	DOMID_SELF);
e6599225 KRW	178	if (irq < 0) {
e6599225 KRW	179	ret = irq;
fef6e262	180	goto free;
e6599225	181	}
fef6e262 KRW	182	i++;
	183	}
	184	kfree(v);
	185	return 0;
	186
	187	error:
	188	dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
	189	free:
	190	kfree(v);
	191	return ret;
	192	}
	193
af42b8d1 SS	194	#define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE \| \
	195	MSI_DATA_LEVEL_ASSERT \| (3 << 8) \| MSI_DATA_VECTOR(0))
	196
809f9267 SS	197	static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
	198	struct msi_msg *msg)
	199	{
	200	/* We set vector == 0 to tell the hypervisor we don't care about it,
	201	* but we want a pirq setup instead.
	202	* We use the dest_id field to pass the pirq that we want. */
	203	msg->address_hi = MSI_ADDR_BASE_HI \| MSI_ADDR_EXT_DEST_ID(pirq);
	204	msg->address_lo =
	205	MSI_ADDR_BASE_LO \|
	206	MSI_ADDR_DEST_MODE_PHYSICAL \|
	207	MSI_ADDR_REDIRECTION_CPU \|
	208	MSI_ADDR_DEST_ID(pirq);
	209
af42b8d1	210	msg->data = XEN_PIRQ_MSI_DATA;
809f9267 SS	211	}
	212
	213	static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
	214	{
bf480d95	215	int irq, pirq;
809f9267 SS	216	struct msi_desc *msidesc;
	217	struct msi_msg msg;
	218
	219	list_for_each_entry(msidesc, &dev->msi_list, list) {
af42b8d1 SS	220	__read_msi_msg(msidesc, &msg);
	221	pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) \|
	222	((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
bf480d95 IC	223	if (msg.data != XEN_PIRQ_MSI_DATA \|\|
	224	xen_irq_from_pirq(pirq) < 0) {
	225	pirq = xen_allocate_pirq_msi(dev, msidesc);
e6599225 KRW	226	if (pirq < 0) {
e6599225 KRW	227	irq = -ENODEV;
af42b8d1	228	goto error;
e6599225	229	}
bf480d95 IC	230	xen_msi_compose_msg(dev, pirq, &msg);
	231	__write_msi_msg(msidesc, &msg);
	232	dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
	233	} else {
	234	dev_dbg(&dev->dev,
	235	"xen: msi already bound to pirq=%d\n", pirq);
af42b8d1	236	}
ca1d8fe9	237	irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq, 0,
bf480d95	238	(type == PCI_CAP_ID_MSIX) ?
beafbdc1 KRW	239	"msi-x" : "msi",
beafbdc1 KRW	240	DOMID_SELF);
bf480d95	241	if (irq < 0)
809f9267	242	goto error;
bf480d95 IC	243	dev_dbg(&dev->dev,
bf480d95 IC	244	"xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
809f9267 SS	245	}
	246	return 0;
	247
809f9267	248	error:
bf480d95 IC	249	dev_err(&dev->dev,
bf480d95 IC	250	"Xen PCI frontend has not registered MSI/MSI-X support!\n");
e6599225	251	return irq;
809f9267 SS	252	}
809f9267 SS	253
260a7d4c	254	#ifdef CONFIG_XEN_DOM0
55e901fc JB	255	static bool __read_mostly pci_seg_supported = true;
55e901fc JB	256
f731e3ef QH	257	static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
f731e3ef QH	258	{
71eef7d1	259	int ret = 0;
f731e3ef QH	260	struct msi_desc *msidesc;
	261
	262	list_for_each_entry(msidesc, &dev->msi_list, list) {
71eef7d1	263	struct physdev_map_pirq map_irq;
beafbdc1 KRW	264	domid_t domid;
	265
	266	domid = ret = xen_find_device_domain_owner(dev);
	267	/* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
	268	* hence check ret value for < 0. */
	269	if (ret < 0)
	270	domid = DOMID_SELF;
71eef7d1 IC	271
71eef7d1 IC	272	memset(&map_irq, 0, sizeof(map_irq));
beafbdc1	273	map_irq.domid = domid;
55e901fc	274	map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
71eef7d1 IC	275	map_irq.index = -1;
71eef7d1 IC	276	map_irq.pirq = -1;
55e901fc JB	277	map_irq.bus = dev->bus->number \|
55e901fc JB	278	(pci_domain_nr(dev->bus) << 16);
71eef7d1 IC	279	map_irq.devfn = dev->devfn;
	280
	281	if (type == PCI_CAP_ID_MSIX) {
	282	int pos;
	283	u32 table_offset, bir;
	284
	285	pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
	286
	287	pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
	288	&table_offset);
	289	bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
	290
	291	map_irq.table_base = pci_resource_start(dev, bir);
	292	map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
	293	}
	294
55e901fc JB	295	ret = -EINVAL;
	296	if (pci_seg_supported)
	297	ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
	298	&map_irq);
	299	if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
	300	map_irq.type = MAP_PIRQ_TYPE_MSI;
	301	map_irq.index = -1;
	302	map_irq.pirq = -1;
	303	map_irq.bus = dev->bus->number;
	304	ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
	305	&map_irq);
	306	if (ret != -EINVAL)
	307	pci_seg_supported = false;
	308	}
71eef7d1	309	if (ret) {
beafbdc1 KRW	310	dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
beafbdc1 KRW	311	ret, domid);
71eef7d1 IC	312	goto out;
	313	}
	314
	315	ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
	316	map_irq.pirq, map_irq.index,
	317	(type == PCI_CAP_ID_MSIX) ?
beafbdc1 KRW	318	"msi-x" : "msi",
beafbdc1 KRW	319	domid);
71eef7d1 IC	320	if (ret < 0)
71eef7d1 IC	321	goto out;
f731e3ef	322	}
71eef7d1 IC	323	ret = 0;
	324	out:
	325	return ret;
f731e3ef	326	}
b5401a96 AN	327	#endif
b5401a96 AN	328
fef6e262	329	static void xen_teardown_msi_irqs(struct pci_dev *dev)
b5401a96	330	{
fef6e262	331	struct msi_desc *msidesc;
b5401a96	332
fef6e262 KRW	333	msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
	334	if (msidesc->msi_attrib.is_msix)
	335	xen_pci_frontend_disable_msix(dev);
	336	else
	337	xen_pci_frontend_disable_msi(dev);
b5401a96	338
fef6e262 KRW	339	/* Free the IRQ's and the msidesc using the generic code. */
	340	default_teardown_msi_irqs(dev);
	341	}
f4d0635b	342
fef6e262 KRW	343	static void xen_teardown_msi_irq(unsigned int irq)
	344	{
	345	xen_destroy_irq(irq);
	346	}
b5401a96	347
fef6e262	348	#endif
3f2a230c	349
b5401a96 AN	350	int __init pci_xen_init(void)
	351	{
	352	if (!xen_pv_domain() \|\| xen_initial_domain())
	353	return -ENODEV;
	354
	355	printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
	356
	357	pcibios_set_cache_line_size();
	358
	359	pcibios_enable_irq = xen_pcifront_enable_irq;
	360	pcibios_disable_irq = NULL;
	361
	362	#ifdef CONFIG_ACPI
	363	/* Keep ACPI out of the picture */
	364	acpi_noirq = 1;
	365	#endif
	366
b5401a96 AN	367	#ifdef CONFIG_PCI_MSI
	368	x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
	369	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
	370	x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
	371	#endif
	372	return 0;
	373	}
3942b740 SS	374
	375	int __init pci_xen_hvm_init(void)
	376	{
207d543f	377	if (!xen_have_vector_callback \|\| !xen_feature(XENFEAT_hvm_pirqs))
3942b740 SS	378	return 0;
	379
	380	#ifdef CONFIG_ACPI
	381	/*
	382	* We don't want to change the actual ACPI delivery model,
	383	* just how GSIs get registered.
	384	*/
	385	__acpi_register_gsi = acpi_register_gsi_xen_hvm;
	386	#endif
809f9267 SS	387
	388	#ifdef CONFIG_PCI_MSI
	389	x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
	390	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
	391	#endif
3942b740 SS	392	return 0;
3942b740 SS	393	}
38aa66fc JF	394
38aa66fc JF	395	#ifdef CONFIG_XEN_DOM0
38aa66fc JF	396	static __init void xen_setup_acpi_sci(void)
	397	{
	398	int rc;
	399	int trigger, polarity;
	400	int gsi = acpi_sci_override_gsi;
ee339fe6 KRW	401	int irq = -1;
ee339fe6 KRW	402	int gsi_override = -1;
38aa66fc JF	403
	404	if (!gsi)
	405	return;
	406
	407	rc = acpi_get_override_irq(gsi, &trigger, &polarity);
	408	if (rc) {
	409	printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
	410	" sci, rc=%d\n", rc);
	411	return;
	412	}
	413	trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
	414	polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
996c34ae	415
38aa66fc JF	416	printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
	417	"polarity=%d\n", gsi, trigger, polarity);
	418
ee339fe6 KRW	419	/* Before we bind the GSI to a Linux IRQ, check whether
	420	* we need to override it with bus_irq (IRQ) value. Usually for
	421	* IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
	422	* ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
	423	* but there are oddballs where the IRQ != GSI:
	424	* ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
	425	* which ends up being: gsi_to_irq[9] == 20
	426	* (which is what acpi_gsi_to_irq ends up calling when starting the
	427	* the ACPI interpreter and keels over since IRQ 9 has not been
	428	* setup as we had setup IRQ 20 for it).
	429	*/
ee339fe6	430	if (acpi_gsi_to_irq(gsi, &irq) == 0) {
97ffab1f KRW	431	/* Use the provided value if it's valid. */
97ffab1f KRW	432	if (irq >= 0)
ee339fe6 KRW	433	gsi_override = irq;
	434	}
	435
	436	gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
38aa66fc JF	437	printk(KERN_INFO "xen: acpi sci %d\n", gsi);
	438
	439	return;
	440	}
a0ee0567 KRW	441
a0ee0567 KRW	442	int __init pci_xen_initial_domain(void)
38aa66fc	443	{
78316ada	444	int irq;
a0ee0567	445
f731e3ef QH	446	#ifdef CONFIG_PCI_MSI
	447	x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
	448	x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
	449	#endif
38aa66fc JF	450	xen_setup_acpi_sci();
38aa66fc JF	451	__acpi_register_gsi = acpi_register_gsi_xen;
38aa66fc JF	452	/* Pre-allocate legacy irqs */
	453	for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
	454	int trigger, polarity;
	455
	456	if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
	457	continue;
	458
ee339fe6	459	xen_register_pirq(irq, -1 /* no GSI override */,
ed89eb63	460	trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
78316ada	461	true /* Map GSI to PIRQ */);
38aa66fc	462	}
9b6519db	463	if (0 == nr_ioapics) {
78316ada KRW	464	for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
78316ada KRW	465	xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
9b6519db	466	}
a0ee0567	467	return 0;
38aa66fc	468	}
c55fa78b KRW	469
	470	struct xen_device_domain_owner {
	471	domid_t domain;
	472	struct pci_dev *dev;
	473	struct list_head list;
	474	};
	475
	476	static DEFINE_SPINLOCK(dev_domain_list_spinlock);
	477	static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
	478
	479	static struct xen_device_domain_owner find_device(struct pci_dev dev)
	480	{
	481	struct xen_device_domain_owner *owner;
	482
	483	list_for_each_entry(owner, &dev_domain_list, list) {
	484	if (owner->dev == dev)
	485	return owner;
	486	}
	487	return NULL;
	488	}
	489
	490	int xen_find_device_domain_owner(struct pci_dev *dev)
	491	{
	492	struct xen_device_domain_owner *owner;
	493	int domain = -ENODEV;
	494
	495	spin_lock(&dev_domain_list_spinlock);
	496	owner = find_device(dev);
	497	if (owner)
	498	domain = owner->domain;
	499	spin_unlock(&dev_domain_list_spinlock);
	500	return domain;
	501	}
	502	EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
	503
	504	int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
	505	{
	506	struct xen_device_domain_owner *owner;
	507
	508	owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
	509	if (!owner)
	510	return -ENODEV;
	511
	512	spin_lock(&dev_domain_list_spinlock);
	513	if (find_device(dev)) {
	514	spin_unlock(&dev_domain_list_spinlock);
	515	kfree(owner);
	516	return -EEXIST;
	517	}
	518	owner->domain = domain;
	519	owner->dev = dev;
	520	list_add_tail(&owner->list, &dev_domain_list);
	521	spin_unlock(&dev_domain_list_spinlock);
	522	return 0;
	523	}
	524	EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
	525
	526	int xen_unregister_device_domain_owner(struct pci_dev *dev)
	527	{
	528	struct xen_device_domain_owner *owner;
	529
	530	spin_lock(&dev_domain_list_spinlock);
	531	owner = find_device(dev);
	532	if (!owner) {
533	spin_unlock(&dev_domain_list_spinlock);
534	return -ENODEV;
535	}
536	list_del(&owner->list);
537	spin_unlock(&dev_domain_list_spinlock);
538	kfree(owner);
539	return 0;
540	}
541	EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
7c1bfd68	542	#endif