Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 | 2 | * Copyright (C) 1991, 1992 Linus Torvalds |
a8c1be9d | 3 | * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs |
1da177e4 LT |
4 | * |
5 | * Pentium III FXSR, SSE support | |
6 | * Gareth Hughes <gareth@valinux.com>, May 2000 | |
7 | */ | |
8 | ||
9 | /* | |
c1d518c8 | 10 | * Handle hardware traps and faults. |
1da177e4 | 11 | */ |
c767a54b JP |
12 | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
14 | ||
56dd9470 | 15 | #include <linux/context_tracking.h> |
b5964405 IM |
16 | #include <linux/interrupt.h> |
17 | #include <linux/kallsyms.h> | |
18 | #include <linux/spinlock.h> | |
b5964405 IM |
19 | #include <linux/kprobes.h> |
20 | #include <linux/uaccess.h> | |
b5964405 | 21 | #include <linux/kdebug.h> |
f503b5ae | 22 | #include <linux/kgdb.h> |
1da177e4 | 23 | #include <linux/kernel.h> |
b5964405 IM |
24 | #include <linux/module.h> |
25 | #include <linux/ptrace.h> | |
1da177e4 | 26 | #include <linux/string.h> |
b5964405 | 27 | #include <linux/delay.h> |
1da177e4 | 28 | #include <linux/errno.h> |
b5964405 IM |
29 | #include <linux/kexec.h> |
30 | #include <linux/sched.h> | |
1da177e4 | 31 | #include <linux/timer.h> |
1da177e4 | 32 | #include <linux/init.h> |
91768d6c | 33 | #include <linux/bug.h> |
b5964405 IM |
34 | #include <linux/nmi.h> |
35 | #include <linux/mm.h> | |
c1d518c8 AH |
36 | #include <linux/smp.h> |
37 | #include <linux/io.h> | |
1da177e4 LT |
38 | |
39 | #ifdef CONFIG_EISA | |
40 | #include <linux/ioport.h> | |
41 | #include <linux/eisa.h> | |
42 | #endif | |
43 | ||
c0d12172 DJ |
44 | #if defined(CONFIG_EDAC) |
45 | #include <linux/edac.h> | |
46 | #endif | |
47 | ||
f8561296 | 48 | #include <asm/kmemcheck.h> |
b5964405 | 49 | #include <asm/stacktrace.h> |
1da177e4 | 50 | #include <asm/processor.h> |
1da177e4 | 51 | #include <asm/debugreg.h> |
60063497 | 52 | #include <linux/atomic.h> |
08d636b6 | 53 | #include <asm/ftrace.h> |
c1d518c8 | 54 | #include <asm/traps.h> |
1da177e4 LT |
55 | #include <asm/desc.h> |
56 | #include <asm/i387.h> | |
1361b83a | 57 | #include <asm/fpu-internal.h> |
9e55e44e | 58 | #include <asm/mce.h> |
4eefbe79 | 59 | #include <asm/fixmap.h> |
1164dd00 | 60 | #include <asm/mach_traps.h> |
c1d518c8 | 61 | |
081f75bb | 62 | #ifdef CONFIG_X86_64 |
428cf902 | 63 | #include <asm/x86_init.h> |
081f75bb AH |
64 | #include <asm/pgalloc.h> |
65 | #include <asm/proto.h> | |
081f75bb | 66 | #else |
c1d518c8 | 67 | #include <asm/processor-flags.h> |
8e6dafd6 | 68 | #include <asm/setup.h> |
1da177e4 | 69 | |
1da177e4 LT |
70 | asmlinkage int system_call(void); |
71 | ||
1da177e4 LT |
72 | /* |
73 | * The IDT has to be page-aligned to simplify the Pentium | |
07e81d61 | 74 | * F0 0F bug workaround. |
1da177e4 | 75 | */ |
07e81d61 | 76 | gate_desc idt_table[NR_VECTORS] __page_aligned_data = { { { { 0, 0 } } }, }; |
081f75bb | 77 | #endif |
1da177e4 | 78 | |
b77b881f YL |
79 | DECLARE_BITMAP(used_vectors, NR_VECTORS); |
80 | EXPORT_SYMBOL_GPL(used_vectors); | |
81 | ||
762db434 AH |
82 | static inline void conditional_sti(struct pt_regs *regs) |
83 | { | |
84 | if (regs->flags & X86_EFLAGS_IF) | |
85 | local_irq_enable(); | |
86 | } | |
87 | ||
3d2a71a5 AH |
88 | static inline void preempt_conditional_sti(struct pt_regs *regs) |
89 | { | |
90 | inc_preempt_count(); | |
91 | if (regs->flags & X86_EFLAGS_IF) | |
92 | local_irq_enable(); | |
93 | } | |
94 | ||
be716615 TG |
95 | static inline void conditional_cli(struct pt_regs *regs) |
96 | { | |
97 | if (regs->flags & X86_EFLAGS_IF) | |
98 | local_irq_disable(); | |
99 | } | |
100 | ||
3d2a71a5 AH |
101 | static inline void preempt_conditional_cli(struct pt_regs *regs) |
102 | { | |
103 | if (regs->flags & X86_EFLAGS_IF) | |
104 | local_irq_disable(); | |
105 | dec_preempt_count(); | |
106 | } | |
107 | ||
c416ddf5 FW |
108 | static int __kprobes |
109 | do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str, | |
110 | struct pt_regs *regs, long error_code) | |
1da177e4 | 111 | { |
081f75bb | 112 | #ifdef CONFIG_X86_32 |
6b6891f9 | 113 | if (regs->flags & X86_VM_MASK) { |
3c1326f8 | 114 | /* |
c416ddf5 | 115 | * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86. |
3c1326f8 AH |
116 | * On nmi (interrupt 2), do_trap should not be called. |
117 | */ | |
c416ddf5 FW |
118 | if (trapnr < X86_TRAP_UD) { |
119 | if (!handle_vm86_trap((struct kernel_vm86_regs *) regs, | |
120 | error_code, trapnr)) | |
121 | return 0; | |
122 | } | |
123 | return -1; | |
1da177e4 | 124 | } |
081f75bb | 125 | #endif |
c416ddf5 FW |
126 | if (!user_mode(regs)) { |
127 | if (!fixup_exception(regs)) { | |
128 | tsk->thread.error_code = error_code; | |
129 | tsk->thread.trap_nr = trapnr; | |
130 | die(str, regs, error_code); | |
131 | } | |
132 | return 0; | |
133 | } | |
1da177e4 | 134 | |
c416ddf5 FW |
135 | return -1; |
136 | } | |
1da177e4 | 137 | |
c416ddf5 FW |
138 | static void __kprobes |
139 | do_trap(int trapnr, int signr, char *str, struct pt_regs *regs, | |
140 | long error_code, siginfo_t *info) | |
141 | { | |
142 | struct task_struct *tsk = current; | |
143 | ||
144 | ||
145 | if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code)) | |
146 | return; | |
b5964405 | 147 | /* |
51e7dc70 | 148 | * We want error_code and trap_nr set for userspace faults and |
b5964405 IM |
149 | * kernelspace faults which result in die(), but not |
150 | * kernelspace faults which are fixed up. die() gives the | |
151 | * process no chance to handle the signal and notice the | |
152 | * kernel fault information, so that won't result in polluting | |
153 | * the information about previously queued, but not yet | |
154 | * delivered, faults. See also do_general_protection below. | |
155 | */ | |
156 | tsk->thread.error_code = error_code; | |
51e7dc70 | 157 | tsk->thread.trap_nr = trapnr; |
d1895183 | 158 | |
081f75bb AH |
159 | #ifdef CONFIG_X86_64 |
160 | if (show_unhandled_signals && unhandled_signal(tsk, signr) && | |
161 | printk_ratelimit()) { | |
c767a54b JP |
162 | pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx", |
163 | tsk->comm, tsk->pid, str, | |
164 | regs->ip, regs->sp, error_code); | |
081f75bb | 165 | print_vma_addr(" in ", regs->ip); |
c767a54b | 166 | pr_cont("\n"); |
081f75bb AH |
167 | } |
168 | #endif | |
169 | ||
b5964405 IM |
170 | if (info) |
171 | force_sig_info(signr, info, tsk); | |
172 | else | |
173 | force_sig(signr, tsk); | |
1da177e4 LT |
174 | } |
175 | ||
b5964405 | 176 | #define DO_ERROR(trapnr, signr, str, name) \ |
e407d620 | 177 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 | 178 | { \ |
6c1e0256 FW |
179 | enum ctx_state prev_state; \ |
180 | \ | |
181 | prev_state = exception_enter(); \ | |
6ba3c97a FW |
182 | if (notify_die(DIE_TRAP, str, regs, error_code, \ |
183 | trapnr, signr) == NOTIFY_STOP) { \ | |
6c1e0256 | 184 | exception_exit(prev_state); \ |
b5964405 | 185 | return; \ |
6ba3c97a | 186 | } \ |
61aef7d2 | 187 | conditional_sti(regs); \ |
3c1326f8 | 188 | do_trap(trapnr, signr, str, regs, error_code, NULL); \ |
6c1e0256 | 189 | exception_exit(prev_state); \ |
1da177e4 LT |
190 | } |
191 | ||
3c1326f8 | 192 | #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \ |
e407d620 | 193 | dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \ |
b5964405 IM |
194 | { \ |
195 | siginfo_t info; \ | |
6c1e0256 FW |
196 | enum ctx_state prev_state; \ |
197 | \ | |
b5964405 IM |
198 | info.si_signo = signr; \ |
199 | info.si_errno = 0; \ | |
200 | info.si_code = sicode; \ | |
201 | info.si_addr = (void __user *)siaddr; \ | |
6c1e0256 | 202 | prev_state = exception_enter(); \ |
6ba3c97a FW |
203 | if (notify_die(DIE_TRAP, str, regs, error_code, \ |
204 | trapnr, signr) == NOTIFY_STOP) { \ | |
6c1e0256 | 205 | exception_exit(prev_state); \ |
b5964405 | 206 | return; \ |
6ba3c97a | 207 | } \ |
61aef7d2 | 208 | conditional_sti(regs); \ |
3c1326f8 | 209 | do_trap(trapnr, signr, str, regs, error_code, &info); \ |
6c1e0256 | 210 | exception_exit(prev_state); \ |
1da177e4 LT |
211 | } |
212 | ||
c9408265 KC |
213 | DO_ERROR_INFO(X86_TRAP_DE, SIGFPE, "divide error", divide_error, FPE_INTDIV, |
214 | regs->ip) | |
215 | DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow) | |
216 | DO_ERROR(X86_TRAP_BR, SIGSEGV, "bounds", bounds) | |
217 | DO_ERROR_INFO(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op, ILL_ILLOPN, | |
218 | regs->ip) | |
219 | DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun", | |
220 | coprocessor_segment_overrun) | |
221 | DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS) | |
222 | DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present) | |
081f75bb | 223 | #ifdef CONFIG_X86_32 |
c9408265 | 224 | DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment) |
081f75bb | 225 | #endif |
c9408265 KC |
226 | DO_ERROR_INFO(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check, |
227 | BUS_ADRALN, 0) | |
1da177e4 | 228 | |
081f75bb AH |
229 | #ifdef CONFIG_X86_64 |
230 | /* Runs on IST stack */ | |
231 | dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code) | |
232 | { | |
6c1e0256 FW |
233 | enum ctx_state prev_state; |
234 | ||
235 | prev_state = exception_enter(); | |
081f75bb | 236 | if (notify_die(DIE_TRAP, "stack segment", regs, error_code, |
6ba3c97a FW |
237 | X86_TRAP_SS, SIGBUS) != NOTIFY_STOP) { |
238 | preempt_conditional_sti(regs); | |
239 | do_trap(X86_TRAP_SS, SIGBUS, "stack segment", regs, error_code, NULL); | |
240 | preempt_conditional_cli(regs); | |
241 | } | |
6c1e0256 | 242 | exception_exit(prev_state); |
081f75bb AH |
243 | } |
244 | ||
245 | dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code) | |
246 | { | |
247 | static const char str[] = "double fault"; | |
248 | struct task_struct *tsk = current; | |
249 | ||
ea21cb1f AL |
250 | #ifdef CONFIG_X86_ESPFIX64 |
251 | extern unsigned char native_irq_return_iret[]; | |
252 | ||
253 | /* | |
254 | * If IRET takes a non-IST fault on the espfix64 stack, then we | |
255 | * end up promoting it to a doublefault. In that case, modify | |
256 | * the stack to make it look like we just entered the #GP | |
257 | * handler from user space, similar to bad_iret. | |
258 | */ | |
259 | if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY && | |
260 | regs->cs == __KERNEL_CS && | |
261 | regs->ip == (unsigned long)native_irq_return_iret) | |
262 | { | |
263 | struct pt_regs *normal_regs = task_pt_regs(current); | |
264 | ||
265 | /* Fake a #GP(0) from userspace. */ | |
266 | memmove(&normal_regs->ip, (void *)regs->sp, 5*8); | |
267 | normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */ | |
268 | regs->ip = (unsigned long)general_protection; | |
269 | regs->sp = (unsigned long)&normal_regs->orig_ax; | |
270 | return; | |
271 | } | |
272 | #endif | |
273 | ||
6c1e0256 | 274 | exception_enter(); |
081f75bb | 275 | /* Return not checked because double check cannot be ignored */ |
c9408265 | 276 | notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV); |
081f75bb AH |
277 | |
278 | tsk->thread.error_code = error_code; | |
51e7dc70 | 279 | tsk->thread.trap_nr = X86_TRAP_DF; |
081f75bb | 280 | |
bd8b96df IM |
281 | /* |
282 | * This is always a kernel trap and never fixable (and thus must | |
283 | * never return). | |
284 | */ | |
081f75bb AH |
285 | for (;;) |
286 | die(str, regs, error_code); | |
287 | } | |
288 | #endif | |
289 | ||
e407d620 | 290 | dotraplinkage void __kprobes |
13485ab5 | 291 | do_general_protection(struct pt_regs *regs, long error_code) |
1da177e4 | 292 | { |
13485ab5 | 293 | struct task_struct *tsk; |
6c1e0256 | 294 | enum ctx_state prev_state; |
b5964405 | 295 | |
6c1e0256 | 296 | prev_state = exception_enter(); |
c6df0d71 AH |
297 | conditional_sti(regs); |
298 | ||
081f75bb | 299 | #ifdef CONFIG_X86_32 |
ef3f6288 FW |
300 | if (regs->flags & X86_VM_MASK) { |
301 | local_irq_enable(); | |
302 | handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code); | |
6ba3c97a | 303 | goto exit; |
ef3f6288 | 304 | } |
081f75bb | 305 | #endif |
1da177e4 | 306 | |
13485ab5 | 307 | tsk = current; |
ef3f6288 FW |
308 | if (!user_mode(regs)) { |
309 | if (fixup_exception(regs)) | |
6ba3c97a | 310 | goto exit; |
ef3f6288 FW |
311 | |
312 | tsk->thread.error_code = error_code; | |
313 | tsk->thread.trap_nr = X86_TRAP_GP; | |
6ba3c97a FW |
314 | if (notify_die(DIE_GPF, "general protection fault", regs, error_code, |
315 | X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP) | |
ef3f6288 | 316 | die("general protection fault", regs, error_code); |
6ba3c97a | 317 | goto exit; |
ef3f6288 | 318 | } |
1da177e4 | 319 | |
13485ab5 | 320 | tsk->thread.error_code = error_code; |
51e7dc70 | 321 | tsk->thread.trap_nr = X86_TRAP_GP; |
b5964405 | 322 | |
13485ab5 AH |
323 | if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) && |
324 | printk_ratelimit()) { | |
c767a54b | 325 | pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx", |
13485ab5 AH |
326 | tsk->comm, task_pid_nr(tsk), |
327 | regs->ip, regs->sp, error_code); | |
03252919 | 328 | print_vma_addr(" in ", regs->ip); |
c767a54b | 329 | pr_cont("\n"); |
03252919 | 330 | } |
abd4f750 | 331 | |
13485ab5 | 332 | force_sig(SIGSEGV, tsk); |
6ba3c97a | 333 | exit: |
6c1e0256 | 334 | exception_exit(prev_state); |
1da177e4 LT |
335 | } |
336 | ||
c1d518c8 | 337 | /* May run on IST stack. */ |
08d636b6 | 338 | dotraplinkage void __kprobes notrace do_int3(struct pt_regs *regs, long error_code) |
1da177e4 | 339 | { |
6c1e0256 FW |
340 | enum ctx_state prev_state; |
341 | ||
08d636b6 | 342 | #ifdef CONFIG_DYNAMIC_FTRACE |
a192cd04 SR |
343 | /* |
344 | * ftrace must be first, everything else may cause a recursive crash. | |
345 | * See note by declaration of modifying_ftrace_code in ftrace.c | |
346 | */ | |
347 | if (unlikely(atomic_read(&modifying_ftrace_code)) && | |
348 | ftrace_int3_handler(regs)) | |
08d636b6 SR |
349 | return; |
350 | #endif | |
6c1e0256 | 351 | prev_state = exception_enter(); |
f503b5ae | 352 | #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP |
c9408265 KC |
353 | if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
354 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 355 | goto exit; |
f503b5ae | 356 | #endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */ |
cc3a1bf5 | 357 | |
c9408265 KC |
358 | if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP, |
359 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 360 | goto exit; |
b5964405 | 361 | |
42181186 SR |
362 | /* |
363 | * Let others (NMI) know that the debug stack is in use | |
364 | * as we may switch to the interrupt stack. | |
365 | */ | |
366 | debug_stack_usage_inc(); | |
4915a35e | 367 | preempt_conditional_sti(regs); |
c9408265 | 368 | do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL); |
4915a35e | 369 | preempt_conditional_cli(regs); |
42181186 | 370 | debug_stack_usage_dec(); |
6ba3c97a | 371 | exit: |
6c1e0256 | 372 | exception_exit(prev_state); |
1da177e4 | 373 | } |
1da177e4 | 374 | |
081f75bb | 375 | #ifdef CONFIG_X86_64 |
bd8b96df IM |
376 | /* |
377 | * Help handler running on IST stack to switch back to user stack | |
378 | * for scheduling or signal handling. The actual stack switch is done in | |
379 | * entry.S | |
380 | */ | |
081f75bb AH |
381 | asmlinkage __kprobes struct pt_regs *sync_regs(struct pt_regs *eregs) |
382 | { | |
383 | struct pt_regs *regs = eregs; | |
384 | /* Did already sync */ | |
385 | if (eregs == (struct pt_regs *)eregs->sp) | |
386 | ; | |
387 | /* Exception from user space */ | |
388 | else if (user_mode(eregs)) | |
389 | regs = task_pt_regs(current); | |
bd8b96df IM |
390 | /* |
391 | * Exception from kernel and interrupts are enabled. Move to | |
392 | * kernel process stack. | |
393 | */ | |
081f75bb AH |
394 | else if (eregs->flags & X86_EFLAGS_IF) |
395 | regs = (struct pt_regs *)(eregs->sp -= sizeof(struct pt_regs)); | |
396 | if (eregs != regs) | |
397 | *regs = *eregs; | |
398 | return regs; | |
399 | } | |
400 | #endif | |
401 | ||
1da177e4 LT |
402 | /* |
403 | * Our handling of the processor debug registers is non-trivial. | |
404 | * We do not clear them on entry and exit from the kernel. Therefore | |
405 | * it is possible to get a watchpoint trap here from inside the kernel. | |
406 | * However, the code in ./ptrace.c has ensured that the user can | |
407 | * only set watchpoints on userspace addresses. Therefore the in-kernel | |
408 | * watchpoint trap can only occur in code which is reading/writing | |
409 | * from user space. Such code must not hold kernel locks (since it | |
410 | * can equally take a page fault), therefore it is safe to call | |
411 | * force_sig_info even though that claims and releases locks. | |
b5964405 | 412 | * |
1da177e4 LT |
413 | * Code in ./signal.c ensures that the debug control register |
414 | * is restored before we deliver any signal, and therefore that | |
415 | * user code runs with the correct debug control register even though | |
416 | * we clear it here. | |
417 | * | |
418 | * Being careful here means that we don't have to be as careful in a | |
419 | * lot of more complicated places (task switching can be a bit lazy | |
420 | * about restoring all the debug state, and ptrace doesn't have to | |
421 | * find every occurrence of the TF bit that could be saved away even | |
422 | * by user code) | |
c1d518c8 AH |
423 | * |
424 | * May run on IST stack. | |
1da177e4 | 425 | */ |
e407d620 | 426 | dotraplinkage void __kprobes do_debug(struct pt_regs *regs, long error_code) |
1da177e4 | 427 | { |
1da177e4 | 428 | struct task_struct *tsk = current; |
6c1e0256 | 429 | enum ctx_state prev_state; |
a1e80faf | 430 | int user_icebp = 0; |
08d68323 | 431 | unsigned long dr6; |
da654b74 | 432 | int si_code; |
1da177e4 | 433 | |
6c1e0256 | 434 | prev_state = exception_enter(); |
6ba3c97a | 435 | |
08d68323 | 436 | get_debugreg(dr6, 6); |
1da177e4 | 437 | |
40f9249a P |
438 | /* Filter out all the reserved bits which are preset to 1 */ |
439 | dr6 &= ~DR6_RESERVED; | |
440 | ||
a1e80faf FW |
441 | /* |
442 | * If dr6 has no reason to give us about the origin of this trap, | |
443 | * then it's very likely the result of an icebp/int01 trap. | |
444 | * User wants a sigtrap for that. | |
445 | */ | |
446 | if (!dr6 && user_mode(regs)) | |
447 | user_icebp = 1; | |
448 | ||
f8561296 | 449 | /* Catch kmemcheck conditions first of all! */ |
eadb8a09 | 450 | if ((dr6 & DR_STEP) && kmemcheck_trap(regs)) |
6ba3c97a | 451 | goto exit; |
f8561296 | 452 | |
08d68323 P |
453 | /* DR6 may or may not be cleared by the CPU */ |
454 | set_debugreg(0, 6); | |
10faa81e | 455 | |
ea8e61b7 PZ |
456 | /* |
457 | * The processor cleared BTF, so don't mark that we need it set. | |
458 | */ | |
459 | clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP); | |
460 | ||
08d68323 P |
461 | /* Store the virtualized DR6 value */ |
462 | tsk->thread.debugreg6 = dr6; | |
463 | ||
62edab90 P |
464 | if (notify_die(DIE_DEBUG, "debug", regs, PTR_ERR(&dr6), error_code, |
465 | SIGTRAP) == NOTIFY_STOP) | |
6ba3c97a | 466 | goto exit; |
3d2a71a5 | 467 | |
42181186 SR |
468 | /* |
469 | * Let others (NMI) know that the debug stack is in use | |
470 | * as we may switch to the interrupt stack. | |
471 | */ | |
472 | debug_stack_usage_inc(); | |
473 | ||
1da177e4 | 474 | /* It's safe to allow irq's after DR6 has been saved */ |
3d2a71a5 | 475 | preempt_conditional_sti(regs); |
1da177e4 | 476 | |
08d68323 | 477 | if (regs->flags & X86_VM_MASK) { |
c9408265 KC |
478 | handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, |
479 | X86_TRAP_DB); | |
6554287b | 480 | preempt_conditional_cli(regs); |
42181186 | 481 | debug_stack_usage_dec(); |
6ba3c97a | 482 | goto exit; |
1da177e4 LT |
483 | } |
484 | ||
1da177e4 | 485 | /* |
08d68323 P |
486 | * Single-stepping through system calls: ignore any exceptions in |
487 | * kernel space, but re-enable TF when returning to user mode. | |
488 | * | |
489 | * We already checked v86 mode above, so we can check for kernel mode | |
490 | * by just checking the CPL of CS. | |
1da177e4 | 491 | */ |
08d68323 P |
492 | if ((dr6 & DR_STEP) && !user_mode(regs)) { |
493 | tsk->thread.debugreg6 &= ~DR_STEP; | |
494 | set_tsk_thread_flag(tsk, TIF_SINGLESTEP); | |
495 | regs->flags &= ~X86_EFLAGS_TF; | |
1da177e4 | 496 | } |
08d68323 | 497 | si_code = get_si_code(tsk->thread.debugreg6); |
a1e80faf | 498 | if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp) |
08d68323 | 499 | send_sigtrap(tsk, regs, error_code, si_code); |
3d2a71a5 | 500 | preempt_conditional_cli(regs); |
42181186 | 501 | debug_stack_usage_dec(); |
1da177e4 | 502 | |
6ba3c97a | 503 | exit: |
6c1e0256 | 504 | exception_exit(prev_state); |
1da177e4 LT |
505 | } |
506 | ||
507 | /* | |
508 | * Note that we play around with the 'TS' bit in an attempt to get | |
509 | * the correct behaviour even in the presence of the asynchronous | |
510 | * IRQ13 behaviour | |
511 | */ | |
9b6dba9e | 512 | void math_error(struct pt_regs *regs, int error_code, int trapnr) |
1da177e4 | 513 | { |
e2e75c91 | 514 | struct task_struct *task = current; |
1da177e4 | 515 | siginfo_t info; |
9b6dba9e | 516 | unsigned short err; |
c9408265 KC |
517 | char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" : |
518 | "simd exception"; | |
e2e75c91 BG |
519 | |
520 | if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP) | |
521 | return; | |
522 | conditional_sti(regs); | |
523 | ||
524 | if (!user_mode_vm(regs)) | |
525 | { | |
526 | if (!fixup_exception(regs)) { | |
527 | task->thread.error_code = error_code; | |
51e7dc70 | 528 | task->thread.trap_nr = trapnr; |
e2e75c91 BG |
529 | die(str, regs, error_code); |
530 | } | |
531 | return; | |
532 | } | |
1da177e4 LT |
533 | |
534 | /* | |
535 | * Save the info for the exception handler and clear the error. | |
536 | */ | |
1da177e4 | 537 | save_init_fpu(task); |
51e7dc70 | 538 | task->thread.trap_nr = trapnr; |
9b6dba9e | 539 | task->thread.error_code = error_code; |
1da177e4 LT |
540 | info.si_signo = SIGFPE; |
541 | info.si_errno = 0; | |
9b6dba9e | 542 | info.si_addr = (void __user *)regs->ip; |
c9408265 | 543 | if (trapnr == X86_TRAP_MF) { |
9b6dba9e BG |
544 | unsigned short cwd, swd; |
545 | /* | |
546 | * (~cwd & swd) will mask out exceptions that are not set to unmasked | |
547 | * status. 0x3f is the exception bits in these regs, 0x200 is the | |
548 | * C1 reg you need in case of a stack fault, 0x040 is the stack | |
549 | * fault bit. We should only be taking one exception at a time, | |
550 | * so if this combination doesn't produce any single exception, | |
551 | * then we have a bad program that isn't synchronizing its FPU usage | |
552 | * and it will suffer the consequences since we won't be able to | |
553 | * fully reproduce the context of the exception | |
554 | */ | |
555 | cwd = get_fpu_cwd(task); | |
556 | swd = get_fpu_swd(task); | |
adf77bac | 557 | |
9b6dba9e BG |
558 | err = swd & ~cwd; |
559 | } else { | |
560 | /* | |
561 | * The SIMD FPU exceptions are handled a little differently, as there | |
562 | * is only a single status/control register. Thus, to determine which | |
563 | * unmasked exception was caught we must mask the exception mask bits | |
564 | * at 0x1f80, and then use these to mask the exception bits at 0x3f. | |
565 | */ | |
566 | unsigned short mxcsr = get_fpu_mxcsr(task); | |
567 | err = ~(mxcsr >> 7) & mxcsr; | |
568 | } | |
adf77bac PA |
569 | |
570 | if (err & 0x001) { /* Invalid op */ | |
b5964405 IM |
571 | /* |
572 | * swd & 0x240 == 0x040: Stack Underflow | |
573 | * swd & 0x240 == 0x240: Stack Overflow | |
574 | * User must clear the SF bit (0x40) if set | |
575 | */ | |
576 | info.si_code = FPE_FLTINV; | |
adf77bac | 577 | } else if (err & 0x004) { /* Divide by Zero */ |
b5964405 | 578 | info.si_code = FPE_FLTDIV; |
adf77bac | 579 | } else if (err & 0x008) { /* Overflow */ |
b5964405 | 580 | info.si_code = FPE_FLTOVF; |
adf77bac PA |
581 | } else if (err & 0x012) { /* Denormal, Underflow */ |
582 | info.si_code = FPE_FLTUND; | |
583 | } else if (err & 0x020) { /* Precision */ | |
b5964405 | 584 | info.si_code = FPE_FLTRES; |
adf77bac | 585 | } else { |
bd8b96df | 586 | /* |
c9408265 KC |
587 | * If we're using IRQ 13, or supposedly even some trap |
588 | * X86_TRAP_MF implementations, it's possible | |
589 | * we get a spurious trap, which is not an error. | |
bd8b96df | 590 | */ |
c9408265 | 591 | return; |
1da177e4 LT |
592 | } |
593 | force_sig_info(SIGFPE, &info, task); | |
594 | } | |
595 | ||
e407d620 | 596 | dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code) |
1da177e4 | 597 | { |
6c1e0256 FW |
598 | enum ctx_state prev_state; |
599 | ||
600 | prev_state = exception_enter(); | |
c9408265 | 601 | math_error(regs, error_code, X86_TRAP_MF); |
6c1e0256 | 602 | exception_exit(prev_state); |
1da177e4 LT |
603 | } |
604 | ||
e407d620 AH |
605 | dotraplinkage void |
606 | do_simd_coprocessor_error(struct pt_regs *regs, long error_code) | |
1da177e4 | 607 | { |
6c1e0256 FW |
608 | enum ctx_state prev_state; |
609 | ||
610 | prev_state = exception_enter(); | |
c9408265 | 611 | math_error(regs, error_code, X86_TRAP_XF); |
6c1e0256 | 612 | exception_exit(prev_state); |
1da177e4 LT |
613 | } |
614 | ||
e407d620 AH |
615 | dotraplinkage void |
616 | do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) | |
1da177e4 | 617 | { |
cf81978d | 618 | conditional_sti(regs); |
1da177e4 LT |
619 | #if 0 |
620 | /* No need to warn about this any longer. */ | |
c767a54b | 621 | pr_info("Ignoring P6 Local APIC Spurious Interrupt Bug...\n"); |
1da177e4 LT |
622 | #endif |
623 | } | |
624 | ||
081f75bb | 625 | asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void) |
1da177e4 | 626 | { |
1da177e4 | 627 | } |
4efc0670 | 628 | |
7856f6cc | 629 | asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void) |
081f75bb AH |
630 | { |
631 | } | |
632 | ||
1da177e4 | 633 | /* |
b5964405 | 634 | * 'math_state_restore()' saves the current math information in the |
1da177e4 LT |
635 | * old math state array, and gets the new ones from the current task |
636 | * | |
637 | * Careful.. There are problems with IBM-designed IRQ13 behaviour. | |
638 | * Don't touch unless you *really* know how it works. | |
639 | * | |
be98c2cd LT |
640 | * Must be called with kernel preemption disabled (eg with local |
641 | * local interrupts as in the case of do_device_not_available). | |
1da177e4 | 642 | */ |
be98c2cd | 643 | void math_state_restore(void) |
1da177e4 | 644 | { |
f94edacf | 645 | struct task_struct *tsk = current; |
1da177e4 | 646 | |
aa283f49 SS |
647 | if (!tsk_used_math(tsk)) { |
648 | local_irq_enable(); | |
649 | /* | |
650 | * does a slab alloc which can sleep | |
651 | */ | |
652 | if (init_fpu(tsk)) { | |
653 | /* | |
654 | * ran out of memory! | |
655 | */ | |
656 | do_group_exit(SIGKILL); | |
657 | return; | |
658 | } | |
659 | local_irq_disable(); | |
660 | } | |
661 | ||
f94edacf | 662 | __thread_fpu_begin(tsk); |
304bceda | 663 | |
80ab6f1e LT |
664 | /* |
665 | * Paranoid restore. send a SIGSEGV if we fail to restore the state. | |
666 | */ | |
667 | if (unlikely(restore_fpu_checking(tsk))) { | |
304bceda | 668 | drop_init_fpu(tsk); |
80ab6f1e LT |
669 | force_sig(SIGSEGV, tsk); |
670 | return; | |
671 | } | |
b3b0870e LT |
672 | |
673 | tsk->fpu_counter++; | |
1da177e4 | 674 | } |
5992b6da | 675 | EXPORT_SYMBOL_GPL(math_state_restore); |
1da177e4 | 676 | |
e407d620 | 677 | dotraplinkage void __kprobes |
aa78bcfa | 678 | do_device_not_available(struct pt_regs *regs, long error_code) |
7643e9b9 | 679 | { |
6c1e0256 FW |
680 | enum ctx_state prev_state; |
681 | ||
682 | prev_state = exception_enter(); | |
5d2bd700 | 683 | BUG_ON(use_eager_fpu()); |
304bceda | 684 | |
a334fe43 | 685 | #ifdef CONFIG_MATH_EMULATION |
7643e9b9 | 686 | if (read_cr0() & X86_CR0_EM) { |
d315760f TH |
687 | struct math_emu_info info = { }; |
688 | ||
7643e9b9 | 689 | conditional_sti(regs); |
d315760f | 690 | |
aa78bcfa | 691 | info.regs = regs; |
d315760f | 692 | math_emulate(&info); |
6c1e0256 | 693 | exception_exit(prev_state); |
a334fe43 | 694 | return; |
7643e9b9 | 695 | } |
a334fe43 BG |
696 | #endif |
697 | math_state_restore(); /* interrupts still off */ | |
698 | #ifdef CONFIG_X86_32 | |
699 | conditional_sti(regs); | |
081f75bb | 700 | #endif |
6c1e0256 | 701 | exception_exit(prev_state); |
7643e9b9 AH |
702 | } |
703 | ||
081f75bb | 704 | #ifdef CONFIG_X86_32 |
e407d620 | 705 | dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code) |
f8e0870f AH |
706 | { |
707 | siginfo_t info; | |
6c1e0256 | 708 | enum ctx_state prev_state; |
6ba3c97a | 709 | |
6c1e0256 | 710 | prev_state = exception_enter(); |
f8e0870f AH |
711 | local_irq_enable(); |
712 | ||
713 | info.si_signo = SIGILL; | |
714 | info.si_errno = 0; | |
715 | info.si_code = ILL_BADSTK; | |
fc6fcdfb | 716 | info.si_addr = NULL; |
c9408265 | 717 | if (notify_die(DIE_TRAP, "iret exception", regs, error_code, |
6ba3c97a FW |
718 | X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) { |
719 | do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code, | |
720 | &info); | |
721 | } | |
6c1e0256 | 722 | exception_exit(prev_state); |
f8e0870f | 723 | } |
081f75bb | 724 | #endif |
f8e0870f | 725 | |
29c84391 JK |
726 | /* Set of traps needed for early debugging. */ |
727 | void __init early_trap_init(void) | |
728 | { | |
c9408265 | 729 | set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK); |
29c84391 | 730 | /* int3 can be called from all */ |
c9408265 | 731 | set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK); |
8170e6be | 732 | #ifdef CONFIG_X86_32 |
c9408265 | 733 | set_intr_gate(X86_TRAP_PF, &page_fault); |
8170e6be | 734 | #endif |
29c84391 JK |
735 | load_idt(&idt_descr); |
736 | } | |
737 | ||
8170e6be PA |
738 | void __init early_trap_pf_init(void) |
739 | { | |
740 | #ifdef CONFIG_X86_64 | |
741 | set_intr_gate(X86_TRAP_PF, &page_fault); | |
742 | #endif | |
743 | } | |
744 | ||
1da177e4 LT |
745 | void __init trap_init(void) |
746 | { | |
dbeb2be2 RR |
747 | int i; |
748 | ||
1da177e4 | 749 | #ifdef CONFIG_EISA |
927222b1 | 750 | void __iomem *p = early_ioremap(0x0FFFD9, 4); |
b5964405 IM |
751 | |
752 | if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24)) | |
1da177e4 | 753 | EISA_bus = 1; |
927222b1 | 754 | early_iounmap(p, 4); |
1da177e4 LT |
755 | #endif |
756 | ||
c9408265 KC |
757 | set_intr_gate(X86_TRAP_DE, ÷_error); |
758 | set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK); | |
699d2937 | 759 | /* int4 can be called from all */ |
c9408265 KC |
760 | set_system_intr_gate(X86_TRAP_OF, &overflow); |
761 | set_intr_gate(X86_TRAP_BR, &bounds); | |
762 | set_intr_gate(X86_TRAP_UD, &invalid_op); | |
763 | set_intr_gate(X86_TRAP_NM, &device_not_available); | |
081f75bb | 764 | #ifdef CONFIG_X86_32 |
c9408265 | 765 | set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS); |
081f75bb | 766 | #else |
c9408265 | 767 | set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK); |
081f75bb | 768 | #endif |
c9408265 KC |
769 | set_intr_gate(X86_TRAP_OLD_MF, &coprocessor_segment_overrun); |
770 | set_intr_gate(X86_TRAP_TS, &invalid_TSS); | |
771 | set_intr_gate(X86_TRAP_NP, &segment_not_present); | |
772 | set_intr_gate_ist(X86_TRAP_SS, &stack_segment, STACKFAULT_STACK); | |
773 | set_intr_gate(X86_TRAP_GP, &general_protection); | |
774 | set_intr_gate(X86_TRAP_SPURIOUS, &spurious_interrupt_bug); | |
775 | set_intr_gate(X86_TRAP_MF, &coprocessor_error); | |
776 | set_intr_gate(X86_TRAP_AC, &alignment_check); | |
1da177e4 | 777 | #ifdef CONFIG_X86_MCE |
c9408265 | 778 | set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK); |
1da177e4 | 779 | #endif |
c9408265 | 780 | set_intr_gate(X86_TRAP_XF, &simd_coprocessor_error); |
1da177e4 | 781 | |
bb3f0b59 YL |
782 | /* Reserve all the builtin and the syscall vector: */ |
783 | for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) | |
784 | set_bit(i, used_vectors); | |
785 | ||
081f75bb AH |
786 | #ifdef CONFIG_IA32_EMULATION |
787 | set_system_intr_gate(IA32_SYSCALL_VECTOR, ia32_syscall); | |
bb3f0b59 | 788 | set_bit(IA32_SYSCALL_VECTOR, used_vectors); |
081f75bb AH |
789 | #endif |
790 | ||
791 | #ifdef CONFIG_X86_32 | |
699d2937 | 792 | set_system_trap_gate(SYSCALL_VECTOR, &system_call); |
dbeb2be2 | 793 | set_bit(SYSCALL_VECTOR, used_vectors); |
081f75bb | 794 | #endif |
bb3f0b59 | 795 | |
4eefbe79 KC |
796 | /* |
797 | * Set the IDT descriptor to a fixed read-only location, so that the | |
798 | * "sidt" instruction will not leak the location of the kernel, and | |
799 | * to defend the IDT against arbitrary memory write vulnerabilities. | |
800 | * It will be reloaded in cpu_init() */ | |
801 | __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO); | |
802 | idt_descr.address = fix_to_virt(FIX_RO_IDT); | |
803 | ||
1da177e4 | 804 | /* |
b5964405 | 805 | * Should be a barrier for any external CPU state: |
1da177e4 LT |
806 | */ |
807 | cpu_init(); | |
808 | ||
428cf902 | 809 | x86_init.irqs.trap_init(); |
228bdaa9 SR |
810 | |
811 | #ifdef CONFIG_X86_64 | |
812 | memcpy(&nmi_idt_table, &idt_table, IDT_ENTRIES * 16); | |
c9408265 KC |
813 | set_nmi_gate(X86_TRAP_DB, &debug); |
814 | set_nmi_gate(X86_TRAP_BP, &int3); | |
228bdaa9 | 815 | #endif |
1da177e4 | 816 | } |