Modules: remove unneeded release function
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / x86 / kernel / cpu / mcheck / mce_amd_64.c
CommitLineData
89b831ef 1/*
95268664 2 * (c) 2005, 2006 Advanced Micro Devices, Inc.
89b831ef
JS
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
6 *
7 * Written by Jacob Shin - AMD, Inc.
8 *
9 * Support : jacob.shin@amd.com
10 *
95268664
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11 * April 2006
12 * - added support for AMD Family 0x10 processors
89b831ef 13 *
95268664 14 * All MC4_MISCi registers are shared between multi-cores
89b831ef
JS
15 */
16
17#include <linux/cpu.h>
18#include <linux/errno.h>
19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <linux/kobject.h>
22#include <linux/notifier.h>
23#include <linux/sched.h>
24#include <linux/smp.h>
25#include <linux/sysdev.h>
26#include <linux/sysfs.h>
27#include <asm/apic.h>
28#include <asm/mce.h>
29#include <asm/msr.h>
30#include <asm/percpu.h>
95833c83 31#include <asm/idle.h>
89b831ef 32
2903ee85
JS
33#define PFX "mce_threshold: "
34#define VERSION "version 1.1.1"
35#define NR_BANKS 6
36#define NR_BLOCKS 9
37#define THRESHOLD_MAX 0xFFF
38#define INT_TYPE_APIC 0x00020000
39#define MASK_VALID_HI 0x80000000
24ce0e96
JB
40#define MASK_CNTP_HI 0x40000000
41#define MASK_LOCKED_HI 0x20000000
2903ee85
JS
42#define MASK_LVTOFF_HI 0x00F00000
43#define MASK_COUNT_EN_HI 0x00080000
44#define MASK_INT_TYPE_HI 0x00060000
45#define MASK_OVERFLOW_HI 0x00010000
89b831ef 46#define MASK_ERR_COUNT_HI 0x00000FFF
95268664
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47#define MASK_BLKPTR_LO 0xFF000000
48#define MCG_XBLK_ADDR 0xC0000400
89b831ef 49
95268664
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50struct threshold_block {
51 unsigned int block;
52 unsigned int bank;
89b831ef 53 unsigned int cpu;
95268664
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54 u32 address;
55 u16 interrupt_enable;
89b831ef
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56 u16 threshold_limit;
57 struct kobject kobj;
95268664 58 struct list_head miscj;
89b831ef
JS
59};
60
95268664
JS
61/* defaults used early on boot */
62static struct threshold_block threshold_defaults = {
89b831ef
JS
63 .interrupt_enable = 0,
64 .threshold_limit = THRESHOLD_MAX,
65};
66
95268664 67struct threshold_bank {
a521cf20 68 struct kobject *kobj;
95268664
JS
69 struct threshold_block *blocks;
70 cpumask_t cpus;
71};
72static DEFINE_PER_CPU(struct threshold_bank *, threshold_banks[NR_BANKS]);
73
89b831ef
JS
74#ifdef CONFIG_SMP
75static unsigned char shared_bank[NR_BANKS] = {
76 0, 0, 0, 0, 1
77};
78#endif
79
80static DEFINE_PER_CPU(unsigned char, bank_map); /* see which banks are on */
81
82/*
83 * CPU Initialization
84 */
85
86/* must be called with correct cpu affinity */
95268664 87static void threshold_restart_bank(struct threshold_block *b,
89b831ef
JS
88 int reset, u16 old_limit)
89{
90 u32 mci_misc_hi, mci_misc_lo;
91
95268664 92 rdmsr(b->address, mci_misc_lo, mci_misc_hi);
89b831ef
JS
93
94 if (b->threshold_limit < (mci_misc_hi & THRESHOLD_MAX))
95 reset = 1; /* limit cannot be lower than err count */
96
97 if (reset) { /* reset err count and overflow bit */
98 mci_misc_hi =
99 (mci_misc_hi & ~(MASK_ERR_COUNT_HI | MASK_OVERFLOW_HI)) |
100 (THRESHOLD_MAX - b->threshold_limit);
101 } else if (old_limit) { /* change limit w/o reset */
102 int new_count = (mci_misc_hi & THRESHOLD_MAX) +
103 (old_limit - b->threshold_limit);
104 mci_misc_hi = (mci_misc_hi & ~MASK_ERR_COUNT_HI) |
105 (new_count & THRESHOLD_MAX);
106 }
107
108 b->interrupt_enable ?
109 (mci_misc_hi = (mci_misc_hi & ~MASK_INT_TYPE_HI) | INT_TYPE_APIC) :
110 (mci_misc_hi &= ~MASK_INT_TYPE_HI);
111
112 mci_misc_hi |= MASK_COUNT_EN_HI;
95268664 113 wrmsr(b->address, mci_misc_lo, mci_misc_hi);
89b831ef
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114}
115
95268664 116/* cpu init entry point, called from mce.c with preempt off */
89b831ef
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117void __cpuinit mce_amd_feature_init(struct cpuinfo_x86 *c)
118{
95268664 119 unsigned int bank, block;
89b831ef 120 unsigned int cpu = smp_processor_id();
95268664 121 u32 low = 0, high = 0, address = 0;
89b831ef
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122
123 for (bank = 0; bank < NR_BANKS; ++bank) {
95268664
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124 for (block = 0; block < NR_BLOCKS; ++block) {
125 if (block == 0)
126 address = MSR_IA32_MC0_MISC + bank * 4;
24ce0e96
JB
127 else if (block == 1) {
128 address = (low & MASK_BLKPTR_LO) >> 21;
129 if (!address)
130 break;
131 address += MCG_XBLK_ADDR;
132 }
95268664
JS
133 else
134 ++address;
135
136 if (rdmsr_safe(address, &low, &high))
24ce0e96 137 break;
95268664
JS
138
139 if (!(high & MASK_VALID_HI)) {
140 if (block)
141 continue;
142 else
143 break;
144 }
145
24ce0e96
JB
146 if (!(high & MASK_CNTP_HI) ||
147 (high & MASK_LOCKED_HI))
95268664
JS
148 continue;
149
150 if (!block)
151 per_cpu(bank_map, cpu) |= (1 << bank);
89b831ef 152#ifdef CONFIG_SMP
95268664
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153 if (shared_bank[bank] && c->cpu_core_id)
154 break;
89b831ef 155#endif
95268664
JS
156 high &= ~MASK_LVTOFF_HI;
157 high |= K8_APIC_EXT_LVT_ENTRY_THRESHOLD << 20;
158 wrmsr(address, low, high);
159
f40f31bf
TG
160 setup_APIC_extended_lvt(K8_APIC_EXT_LVT_ENTRY_THRESHOLD,
161 THRESHOLD_APIC_VECTOR,
162 K8_APIC_EXT_INT_MSG_FIX, 0);
89b831ef 163
95268664
JS
164 threshold_defaults.address = address;
165 threshold_restart_bank(&threshold_defaults, 0, 0);
166 }
89b831ef
JS
167 }
168}
169
170/*
171 * APIC Interrupt Handler
172 */
173
174/*
175 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
176 * the interrupt goes off when error_count reaches threshold_limit.
177 * the handler will simply log mcelog w/ software defined bank number.
178 */
179asmlinkage void mce_threshold_interrupt(void)
180{
95268664 181 unsigned int bank, block;
89b831ef 182 struct mce m;
95268664 183 u32 low = 0, high = 0, address = 0;
89b831ef
JS
184
185 ack_APIC_irq();
95833c83 186 exit_idle();
89b831ef
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187 irq_enter();
188
189 memset(&m, 0, sizeof(m));
190 rdtscll(m.tsc);
191 m.cpu = smp_processor_id();
192
193 /* assume first bank caused it */
194 for (bank = 0; bank < NR_BANKS; ++bank) {
24ce0e96
JB
195 if (!(per_cpu(bank_map, m.cpu) & (1 << bank)))
196 continue;
95268664
JS
197 for (block = 0; block < NR_BLOCKS; ++block) {
198 if (block == 0)
199 address = MSR_IA32_MC0_MISC + bank * 4;
24ce0e96
JB
200 else if (block == 1) {
201 address = (low & MASK_BLKPTR_LO) >> 21;
202 if (!address)
203 break;
204 address += MCG_XBLK_ADDR;
205 }
95268664
JS
206 else
207 ++address;
208
209 if (rdmsr_safe(address, &low, &high))
24ce0e96 210 break;
95268664
JS
211
212 if (!(high & MASK_VALID_HI)) {
213 if (block)
214 continue;
215 else
216 break;
217 }
218
24ce0e96
JB
219 if (!(high & MASK_CNTP_HI) ||
220 (high & MASK_LOCKED_HI))
95268664
JS
221 continue;
222
a98f0dd3
AK
223 /* Log the machine check that caused the threshold
224 event. */
225 do_machine_check(NULL, 0);
226
95268664
JS
227 if (high & MASK_OVERFLOW_HI) {
228 rdmsrl(address, m.misc);
229 rdmsrl(MSR_IA32_MC0_STATUS + bank * 4,
230 m.status);
231 m.bank = K8_MCE_THRESHOLD_BASE
232 + bank * NR_BLOCKS
233 + block;
234 mce_log(&m);
235 goto out;
236 }
89b831ef
JS
237 }
238 }
2903ee85 239out:
38e760a1 240 add_pda(irq_threshold_count, 1);
89b831ef
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241 irq_exit();
242}
243
244/*
245 * Sysfs Interface
246 */
247
89b831ef 248struct threshold_attr {
2903ee85 249 struct attribute attr;
95268664
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250 ssize_t(*show) (struct threshold_block *, char *);
251 ssize_t(*store) (struct threshold_block *, const char *, size_t count);
89b831ef
JS
252};
253
89b831ef
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254static cpumask_t affinity_set(unsigned int cpu)
255{
256 cpumask_t oldmask = current->cpus_allowed;
257 cpumask_t newmask = CPU_MASK_NONE;
258 cpu_set(cpu, newmask);
259 set_cpus_allowed(current, newmask);
260 return oldmask;
261}
262
263static void affinity_restore(cpumask_t oldmask)
264{
265 set_cpus_allowed(current, oldmask);
266}
267
2903ee85
JS
268#define SHOW_FIELDS(name) \
269static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
270{ \
271 return sprintf(buf, "%lx\n", (unsigned long) b->name); \
272}
89b831ef
JS
273SHOW_FIELDS(interrupt_enable)
274SHOW_FIELDS(threshold_limit)
275
95268664 276static ssize_t store_interrupt_enable(struct threshold_block *b,
89b831ef
JS
277 const char *buf, size_t count)
278{
279 char *end;
280 cpumask_t oldmask;
281 unsigned long new = simple_strtoul(buf, &end, 0);
282 if (end == buf)
283 return -EINVAL;
284 b->interrupt_enable = !!new;
285
286 oldmask = affinity_set(b->cpu);
287 threshold_restart_bank(b, 0, 0);
288 affinity_restore(oldmask);
289
290 return end - buf;
291}
292
95268664 293static ssize_t store_threshold_limit(struct threshold_block *b,
89b831ef
JS
294 const char *buf, size_t count)
295{
296 char *end;
297 cpumask_t oldmask;
298 u16 old;
299 unsigned long new = simple_strtoul(buf, &end, 0);
300 if (end == buf)
301 return -EINVAL;
302 if (new > THRESHOLD_MAX)
303 new = THRESHOLD_MAX;
304 if (new < 1)
305 new = 1;
306 old = b->threshold_limit;
307 b->threshold_limit = new;
308
309 oldmask = affinity_set(b->cpu);
310 threshold_restart_bank(b, 0, old);
311 affinity_restore(oldmask);
312
313 return end - buf;
314}
315
95268664 316static ssize_t show_error_count(struct threshold_block *b, char *buf)
89b831ef
JS
317{
318 u32 high, low;
319 cpumask_t oldmask;
320 oldmask = affinity_set(b->cpu);
95268664 321 rdmsr(b->address, low, high);
89b831ef
JS
322 affinity_restore(oldmask);
323 return sprintf(buf, "%x\n",
324 (high & 0xFFF) - (THRESHOLD_MAX - b->threshold_limit));
325}
326
95268664 327static ssize_t store_error_count(struct threshold_block *b,
89b831ef
JS
328 const char *buf, size_t count)
329{
330 cpumask_t oldmask;
331 oldmask = affinity_set(b->cpu);
332 threshold_restart_bank(b, 1, 0);
333 affinity_restore(oldmask);
334 return 1;
335}
336
337#define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
338 .attr = {.name = __stringify(_name), .mode = _mode }, \
339 .show = _show, \
340 .store = _store, \
341};
342
2903ee85
JS
343#define RW_ATTR(name) \
344static struct threshold_attr name = \
89b831ef
JS
345 THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
346
2903ee85
JS
347RW_ATTR(interrupt_enable);
348RW_ATTR(threshold_limit);
349RW_ATTR(error_count);
89b831ef
JS
350
351static struct attribute *default_attrs[] = {
352 &interrupt_enable.attr,
353 &threshold_limit.attr,
354 &error_count.attr,
355 NULL
356};
357
95268664 358#define to_block(k) container_of(k, struct threshold_block, kobj)
2903ee85 359#define to_attr(a) container_of(a, struct threshold_attr, attr)
89b831ef
JS
360
361static ssize_t show(struct kobject *kobj, struct attribute *attr, char *buf)
362{
95268664 363 struct threshold_block *b = to_block(kobj);
89b831ef
JS
364 struct threshold_attr *a = to_attr(attr);
365 ssize_t ret;
366 ret = a->show ? a->show(b, buf) : -EIO;
367 return ret;
368}
369
370static ssize_t store(struct kobject *kobj, struct attribute *attr,
371 const char *buf, size_t count)
372{
95268664 373 struct threshold_block *b = to_block(kobj);
89b831ef
JS
374 struct threshold_attr *a = to_attr(attr);
375 ssize_t ret;
376 ret = a->store ? a->store(b, buf, count) : -EIO;
377 return ret;
378}
379
380static struct sysfs_ops threshold_ops = {
381 .show = show,
382 .store = store,
383};
384
385static struct kobj_type threshold_ktype = {
386 .sysfs_ops = &threshold_ops,
387 .default_attrs = default_attrs,
388};
389
95268664
JS
390static __cpuinit int allocate_threshold_blocks(unsigned int cpu,
391 unsigned int bank,
392 unsigned int block,
393 u32 address)
394{
395 int err;
396 u32 low, high;
397 struct threshold_block *b = NULL;
398
399 if ((bank >= NR_BANKS) || (block >= NR_BLOCKS))
400 return 0;
401
402 if (rdmsr_safe(address, &low, &high))
24ce0e96 403 return 0;
95268664
JS
404
405 if (!(high & MASK_VALID_HI)) {
406 if (block)
407 goto recurse;
408 else
409 return 0;
410 }
411
24ce0e96
JB
412 if (!(high & MASK_CNTP_HI) ||
413 (high & MASK_LOCKED_HI))
95268664
JS
414 goto recurse;
415
416 b = kzalloc(sizeof(struct threshold_block), GFP_KERNEL);
417 if (!b)
418 return -ENOMEM;
95268664
JS
419
420 b->block = block;
421 b->bank = bank;
422 b->cpu = cpu;
423 b->address = address;
424 b->interrupt_enable = 0;
425 b->threshold_limit = THRESHOLD_MAX;
426
427 INIT_LIST_HEAD(&b->miscj);
428
429 if (per_cpu(threshold_banks, cpu)[bank]->blocks)
430 list_add(&b->miscj,
431 &per_cpu(threshold_banks, cpu)[bank]->blocks->miscj);
432 else
433 per_cpu(threshold_banks, cpu)[bank]->blocks = b;
434
542eb75a
GKH
435 err = kobject_init_and_add(&b->kobj, &threshold_ktype,
436 per_cpu(threshold_banks, cpu)[bank]->kobj,
437 "misc%i", block);
95268664
JS
438 if (err)
439 goto out_free;
440recurse:
441 if (!block) {
442 address = (low & MASK_BLKPTR_LO) >> 21;
443 if (!address)
444 return 0;
445 address += MCG_XBLK_ADDR;
446 } else
447 ++address;
448
449 err = allocate_threshold_blocks(cpu, bank, ++block, address);
450 if (err)
451 goto out_free;
452
542eb75a
GKH
453 kobject_uevent(&b->kobj, KOBJ_ADD);
454
95268664
JS
455 return err;
456
457out_free:
458 if (b) {
459 kobject_unregister(&b->kobj);
460 kfree(b);
461 }
462 return err;
463}
464
89b831ef 465/* symlinks sibling shared banks to first core. first core owns dir/files. */
95268664 466static __cpuinit int threshold_create_bank(unsigned int cpu, unsigned int bank)
89b831ef 467{
95268664 468 int i, err = 0;
68209407 469 struct threshold_bank *b = NULL;
95268664
JS
470 cpumask_t oldmask = CPU_MASK_NONE;
471 char name[32];
472
473 sprintf(name, "threshold_bank%i", bank);
89b831ef
JS
474
475#ifdef CONFIG_SMP
92cb7612 476 if (cpu_data(cpu).cpu_core_id && shared_bank[bank]) { /* symlink */
08357611 477 i = first_cpu(per_cpu(cpu_core_map, cpu));
95268664
JS
478
479 /* first core not up yet */
92cb7612 480 if (cpu_data(i).cpu_core_id)
95268664
JS
481 goto out;
482
483 /* already linked */
484 if (per_cpu(threshold_banks, cpu)[bank])
485 goto out;
486
487 b = per_cpu(threshold_banks, i)[bank];
89b831ef 488
89b831ef
JS
489 if (!b)
490 goto out;
95268664 491
fff2e89f 492 err = sysfs_create_link(&per_cpu(device_mce, cpu).kobj,
a521cf20 493 b->kobj, name);
89b831ef
JS
494 if (err)
495 goto out;
95268664 496
08357611 497 b->cpus = per_cpu(cpu_core_map, cpu);
89b831ef
JS
498 per_cpu(threshold_banks, cpu)[bank] = b;
499 goto out;
500 }
501#endif
502
95268664 503 b = kzalloc(sizeof(struct threshold_bank), GFP_KERNEL);
89b831ef
JS
504 if (!b) {
505 err = -ENOMEM;
506 goto out;
507 }
89b831ef 508
a521cf20
GKH
509 b->kobj = kobject_create_and_add(name, &per_cpu(device_mce, cpu).kobj);
510 if (!b->kobj)
511 goto out_free;
512
95268664
JS
513#ifndef CONFIG_SMP
514 b->cpus = CPU_MASK_ALL;
515#else
08357611 516 b->cpus = per_cpu(cpu_core_map, cpu);
95268664 517#endif
95268664 518
89b831ef 519 per_cpu(threshold_banks, cpu)[bank] = b;
95268664
JS
520
521 oldmask = affinity_set(cpu);
522 err = allocate_threshold_blocks(cpu, bank, 0,
523 MSR_IA32_MC0_MISC + bank * 4);
524 affinity_restore(oldmask);
525
526 if (err)
527 goto out_free;
528
529 for_each_cpu_mask(i, b->cpus) {
530 if (i == cpu)
531 continue;
532
533 err = sysfs_create_link(&per_cpu(device_mce, i).kobj,
a521cf20 534 b->kobj, name);
95268664
JS
535 if (err)
536 goto out;
537
538 per_cpu(threshold_banks, i)[bank] = b;
539 }
540
541 goto out;
542
543out_free:
544 per_cpu(threshold_banks, cpu)[bank] = NULL;
545 kfree(b);
2903ee85 546out:
89b831ef
JS
547 return err;
548}
549
550/* create dir/files for all valid threshold banks */
551static __cpuinit int threshold_create_device(unsigned int cpu)
552{
2903ee85 553 unsigned int bank;
89b831ef
JS
554 int err = 0;
555
89b831ef
JS
556 for (bank = 0; bank < NR_BANKS; ++bank) {
557 if (!(per_cpu(bank_map, cpu) & 1 << bank))
558 continue;
559 err = threshold_create_bank(cpu, bank);
560 if (err)
561 goto out;
562 }
2903ee85 563out:
89b831ef
JS
564 return err;
565}
566
89b831ef
JS
567/*
568 * let's be hotplug friendly.
569 * in case of multiple core processors, the first core always takes ownership
570 * of shared sysfs dir/files, and rest of the cores will be symlinked to it.
571 */
572
be6b5a35 573static void deallocate_threshold_block(unsigned int cpu,
95268664
JS
574 unsigned int bank)
575{
576 struct threshold_block *pos = NULL;
577 struct threshold_block *tmp = NULL;
578 struct threshold_bank *head = per_cpu(threshold_banks, cpu)[bank];
579
580 if (!head)
581 return;
582
583 list_for_each_entry_safe(pos, tmp, &head->blocks->miscj, miscj) {
584 kobject_unregister(&pos->kobj);
585 list_del(&pos->miscj);
586 kfree(pos);
587 }
588
589 kfree(per_cpu(threshold_banks, cpu)[bank]->blocks);
590 per_cpu(threshold_banks, cpu)[bank]->blocks = NULL;
591}
592
be6b5a35 593static void threshold_remove_bank(unsigned int cpu, int bank)
89b831ef 594{
95268664 595 int i = 0;
89b831ef 596 struct threshold_bank *b;
95268664 597 char name[32];
89b831ef
JS
598
599 b = per_cpu(threshold_banks, cpu)[bank];
95268664 600
89b831ef
JS
601 if (!b)
602 return;
95268664
JS
603
604 if (!b->blocks)
605 goto free_out;
606
607 sprintf(name, "threshold_bank%i", bank);
608
02316067 609#ifdef CONFIG_SMP
95268664
JS
610 /* sibling symlink */
611 if (shared_bank[bank] && b->blocks->cpu != cpu) {
fff2e89f 612 sysfs_remove_link(&per_cpu(device_mce, cpu).kobj, name);
0d2caebd 613 per_cpu(threshold_banks, cpu)[bank] = NULL;
95268664 614 return;
89b831ef 615 }
02316067 616#endif
95268664
JS
617
618 /* remove all sibling symlinks before unregistering */
619 for_each_cpu_mask(i, b->cpus) {
620 if (i == cpu)
621 continue;
622
623 sysfs_remove_link(&per_cpu(device_mce, i).kobj, name);
624 per_cpu(threshold_banks, i)[bank] = NULL;
625 }
626
627 deallocate_threshold_block(cpu, bank);
628
629free_out:
a521cf20 630 kobject_unregister(b->kobj);
95268664
JS
631 kfree(b);
632 per_cpu(threshold_banks, cpu)[bank] = NULL;
89b831ef
JS
633}
634
be6b5a35 635static void threshold_remove_device(unsigned int cpu)
89b831ef 636{
2903ee85 637 unsigned int bank;
89b831ef
JS
638
639 for (bank = 0; bank < NR_BANKS; ++bank) {
640 if (!(per_cpu(bank_map, cpu) & 1 << bank))
641 continue;
642 threshold_remove_bank(cpu, bank);
643 }
89b831ef
JS
644}
645
89b831ef 646/* get notified when a cpu comes on/off */
be6b5a35 647static int threshold_cpu_callback(struct notifier_block *nfb,
89b831ef
JS
648 unsigned long action, void *hcpu)
649{
650 /* cpu was unsigned int to begin with */
651 unsigned int cpu = (unsigned long)hcpu;
652
653 if (cpu >= NR_CPUS)
654 goto out;
655
656 switch (action) {
657 case CPU_ONLINE:
8bb78442 658 case CPU_ONLINE_FROZEN:
89b831ef 659 threshold_create_device(cpu);
89b831ef
JS
660 break;
661 case CPU_DEAD:
8bb78442 662 case CPU_DEAD_FROZEN:
89b831ef
JS
663 threshold_remove_device(cpu);
664 break;
665 default:
666 break;
667 }
668 out:
669 return NOTIFY_OK;
670}
671
be6b5a35 672static struct notifier_block threshold_cpu_notifier = {
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673 .notifier_call = threshold_cpu_callback,
674};
675
676static __init int threshold_init_device(void)
677{
2903ee85 678 unsigned lcpu = 0;
89b831ef 679
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680 /* to hit CPUs online before the notifier is up */
681 for_each_online_cpu(lcpu) {
fff2e89f 682 int err = threshold_create_device(lcpu);
89b831ef 683 if (err)
fff2e89f 684 return err;
89b831ef 685 }
be6b5a35 686 register_hotcpu_notifier(&threshold_cpu_notifier);
fff2e89f 687 return 0;
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688}
689
690device_initcall(threshold_init_device);