Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Written by: Garry Forsgren, Unisys Corporation | |
3 | * Natalie Protasevich, Unisys Corporation | |
7da18ed9 | 4 | * |
1da177e4 LT |
5 | * This file contains the code to configure and interface |
6 | * with Unisys ES7000 series hardware system manager. | |
7 | * | |
7da18ed9 IM |
8 | * Copyright (c) 2003 Unisys Corporation. |
9 | * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar | |
10 | * | |
11 | * All Rights Reserved. | |
1da177e4 LT |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify it | |
14 | * under the terms of version 2 of the GNU General Public License as | |
15 | * published by the Free Software Foundation. | |
16 | * | |
17 | * This program is distributed in the hope that it would be useful, but | |
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write the Free Software Foundation, Inc., 59 | |
23 | * Temple Place - Suite 330, Boston MA 02111-1307, USA. | |
24 | * | |
25 | * Contact information: Unisys Corporation, Township Line & Union Meeting | |
26 | * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or: | |
27 | * | |
28 | * http://www.unisys.com | |
29 | */ | |
5cd476ef JP |
30 | |
31 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
32 | ||
2c4ce18c IM |
33 | #include <linux/notifier.h> |
34 | #include <linux/spinlock.h> | |
35 | #include <linux/cpumask.h> | |
36 | #include <linux/threads.h> | |
1da177e4 | 37 | #include <linux/kernel.h> |
2c4ce18c IM |
38 | #include <linux/module.h> |
39 | #include <linux/reboot.h> | |
1da177e4 | 40 | #include <linux/string.h> |
2c4ce18c | 41 | #include <linux/types.h> |
1da177e4 | 42 | #include <linux/errno.h> |
1da177e4 | 43 | #include <linux/acpi.h> |
2c4ce18c | 44 | #include <linux/init.h> |
5a0e3ad6 | 45 | #include <linux/gfp.h> |
7da18ed9 | 46 | #include <linux/nmi.h> |
2c4ce18c | 47 | #include <linux/smp.h> |
7da18ed9 | 48 | #include <linux/io.h> |
2c4ce18c | 49 | |
1da177e4 | 50 | #include <asm/apicdef.h> |
2c4ce18c IM |
51 | #include <asm/atomic.h> |
52 | #include <asm/fixmap.h> | |
53 | #include <asm/mpspec.h> | |
569712b2 | 54 | #include <asm/setup.h> |
2c4ce18c IM |
55 | #include <asm/apic.h> |
56 | #include <asm/ipi.h> | |
1da177e4 | 57 | |
1625324d YL |
58 | /* |
59 | * ES7000 chipsets | |
60 | */ | |
61 | ||
2c4ce18c IM |
62 | #define NON_UNISYS 0 |
63 | #define ES7000_CLASSIC 1 | |
64 | #define ES7000_ZORRO 2 | |
1625324d | 65 | |
2c4ce18c IM |
66 | #define MIP_REG 1 |
67 | #define MIP_PSAI_REG 4 | |
1625324d | 68 | |
2c4ce18c IM |
69 | #define MIP_BUSY 1 |
70 | #define MIP_SPIN 0xf0000 | |
71 | #define MIP_VALID 0x0100000000000000ULL | |
352887d1 | 72 | #define MIP_SW_APIC 0x1020b |
1625324d | 73 | |
2c4ce18c | 74 | #define MIP_PORT(val) ((val >> 32) & 0xffff) |
1625324d | 75 | |
2c4ce18c | 76 | #define MIP_RD_LO(val) (val & 0xffffffff) |
1625324d | 77 | |
352887d1 IM |
78 | struct mip_reg { |
79 | unsigned long long off_0x00; | |
80 | unsigned long long off_0x08; | |
81 | unsigned long long off_0x10; | |
82 | unsigned long long off_0x18; | |
83 | unsigned long long off_0x20; | |
84 | unsigned long long off_0x28; | |
85 | unsigned long long off_0x30; | |
86 | unsigned long long off_0x38; | |
87 | }; | |
88 | ||
1625324d | 89 | struct mip_reg_info { |
2c4ce18c IM |
90 | unsigned long long mip_info; |
91 | unsigned long long delivery_info; | |
92 | unsigned long long host_reg; | |
93 | unsigned long long mip_reg; | |
1625324d YL |
94 | }; |
95 | ||
1625324d | 96 | struct psai { |
2c4ce18c IM |
97 | unsigned long long entry_type; |
98 | unsigned long long addr; | |
99 | unsigned long long bep_addr; | |
1625324d YL |
100 | }; |
101 | ||
1625324d | 102 | #ifdef CONFIG_ACPI |
7da18ed9 | 103 | |
352887d1 | 104 | struct es7000_oem_table { |
2c4ce18c IM |
105 | struct acpi_table_header Header; |
106 | u32 OEMTableAddr; | |
107 | u32 OEMTableSize; | |
1625324d | 108 | }; |
7da18ed9 IM |
109 | |
110 | static unsigned long oem_addrX; | |
111 | static unsigned long oem_size; | |
112 | ||
1625324d YL |
113 | #endif |
114 | ||
1da177e4 LT |
115 | /* |
116 | * ES7000 Globals | |
117 | */ | |
118 | ||
7da18ed9 | 119 | static volatile unsigned long *psai; |
2c4ce18c IM |
120 | static struct mip_reg *mip_reg; |
121 | static struct mip_reg *host_reg; | |
122 | static int mip_port; | |
7da18ed9 IM |
123 | static unsigned long mip_addr; |
124 | static unsigned long host_addr; | |
1da177e4 | 125 | |
2c4ce18c | 126 | int es7000_plat; |
32c50612 | 127 | |
1da177e4 LT |
128 | /* |
129 | * GSI override for ES7000 platforms. | |
130 | */ | |
131 | ||
2c4ce18c | 132 | static unsigned int base; |
1da177e4 LT |
133 | |
134 | static int | |
135 | es7000_rename_gsi(int ioapic, int gsi) | |
136 | { | |
9338316c NP |
137 | if (es7000_plat == ES7000_ZORRO) |
138 | return gsi; | |
139 | ||
1da177e4 LT |
140 | if (!base) { |
141 | int i; | |
142 | for (i = 0; i < nr_ioapics; i++) | |
143 | base += nr_ioapic_registers[i]; | |
144 | } | |
145 | ||
c7e7964c | 146 | if (!ioapic && (gsi < 16)) |
1da177e4 | 147 | gsi += base; |
2c4ce18c | 148 | |
1da177e4 LT |
149 | return gsi; |
150 | } | |
151 | ||
667c5296 | 152 | static int __cpuinit wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) |
569712b2 YL |
153 | { |
154 | unsigned long vect = 0, psaival = 0; | |
155 | ||
156 | if (psai == NULL) | |
157 | return -1; | |
158 | ||
159 | vect = ((unsigned long)__pa(eip)/0x1000) << 16; | |
160 | psaival = (0x1000000 | vect | cpu); | |
161 | ||
162 | while (*psai & 0x1000000) | |
163 | ; | |
164 | ||
165 | *psai = psaival; | |
166 | ||
167 | return 0; | |
168 | } | |
54ac14a8 | 169 | |
871d78c6 | 170 | static int es7000_apic_is_cluster(void) |
54ac14a8 | 171 | { |
b5fe363b YL |
172 | /* MPENTIUMIII */ |
173 | if (boot_cpu_data.x86 == 6 && | |
005155b1 | 174 | (boot_cpu_data.x86_model >= 7 && boot_cpu_data.x86_model <= 11)) |
2b6163bf | 175 | return 1; |
b5fe363b | 176 | |
54ac14a8 YL |
177 | return 0; |
178 | } | |
569712b2 | 179 | |
871d78c6 | 180 | static void setup_unisys(void) |
56f1d5d5 NP |
181 | { |
182 | /* | |
183 | * Determine the generation of the ES7000 currently running. | |
184 | * | |
185 | * es7000_plat = 1 if the machine is a 5xx ES7000 box | |
186 | * es7000_plat = 2 if the machine is a x86_64 ES7000 box | |
187 | * | |
188 | */ | |
189 | if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2)) | |
9338316c | 190 | es7000_plat = ES7000_ZORRO; |
56f1d5d5 | 191 | else |
9338316c | 192 | es7000_plat = ES7000_CLASSIC; |
56f1d5d5 NP |
193 | ioapic_renumber_irq = es7000_rename_gsi; |
194 | } | |
195 | ||
1da177e4 | 196 | /* |
d3185b37 | 197 | * Parse the OEM Table: |
1da177e4 | 198 | */ |
871d78c6 | 199 | static int parse_unisys_oem(char *oemptr) |
1da177e4 | 200 | { |
352887d1 | 201 | int i; |
1da177e4 | 202 | int success = 0; |
352887d1 IM |
203 | unsigned char type, size; |
204 | unsigned long val; | |
205 | char *tp = NULL; | |
206 | struct psai *psaip = NULL; | |
1da177e4 LT |
207 | struct mip_reg_info *mi; |
208 | struct mip_reg *host, *mip; | |
209 | ||
210 | tp = oemptr; | |
211 | ||
212 | tp += 8; | |
213 | ||
352887d1 | 214 | for (i = 0; i <= 6; i++) { |
1da177e4 LT |
215 | type = *tp++; |
216 | size = *tp++; | |
217 | tp -= 2; | |
218 | switch (type) { | |
219 | case MIP_REG: | |
220 | mi = (struct mip_reg_info *)tp; | |
221 | val = MIP_RD_LO(mi->host_reg); | |
222 | host_addr = val; | |
223 | host = (struct mip_reg *)val; | |
224 | host_reg = __va(host); | |
225 | val = MIP_RD_LO(mi->mip_reg); | |
226 | mip_port = MIP_PORT(mi->mip_info); | |
227 | mip_addr = val; | |
228 | mip = (struct mip_reg *)val; | |
229 | mip_reg = __va(mip); | |
5cd476ef | 230 | pr_debug("host_reg = 0x%lx\n", |
5171c304 | 231 | (unsigned long)host_reg); |
5cd476ef | 232 | pr_debug("mip_reg = 0x%lx\n", |
5171c304 | 233 | (unsigned long)mip_reg); |
1da177e4 LT |
234 | success++; |
235 | break; | |
236 | case MIP_PSAI_REG: | |
237 | psaip = (struct psai *)tp; | |
238 | if (tp != NULL) { | |
239 | if (psaip->addr) | |
240 | psai = __va(psaip->addr); | |
241 | else | |
242 | psai = NULL; | |
243 | success++; | |
244 | } | |
245 | break; | |
246 | default: | |
247 | break; | |
248 | } | |
1da177e4 LT |
249 | tp += size; |
250 | } | |
251 | ||
d3185b37 | 252 | if (success < 2) |
9338316c | 253 | es7000_plat = NON_UNISYS; |
d3185b37 | 254 | else |
56f1d5d5 | 255 | setup_unisys(); |
2c4ce18c | 256 | |
1da177e4 LT |
257 | return es7000_plat; |
258 | } | |
259 | ||
e5428ede | 260 | #ifdef CONFIG_ACPI |
b74d446f | 261 | static int __init find_unisys_acpi_oem_table(unsigned long *oem_addr) |
1da177e4 | 262 | { |
ceb6c468 | 263 | struct acpi_table_header *header = NULL; |
7da18ed9 | 264 | struct es7000_oem_table *table; |
b825e6cc | 265 | acpi_size tbl_size; |
7da18ed9 IM |
266 | acpi_status ret; |
267 | int i = 0; | |
a73aaedd | 268 | |
7da18ed9 IM |
269 | for (;;) { |
270 | ret = acpi_get_table_with_size("OEM1", i++, &header, &tbl_size); | |
271 | if (!ACPI_SUCCESS(ret)) | |
272 | return -1; | |
a73aaedd | 273 | |
7da18ed9 IM |
274 | if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) |
275 | break; | |
a73aaedd | 276 | |
b825e6cc | 277 | early_acpi_os_unmap_memory(header, tbl_size); |
1da177e4 | 278 | } |
7da18ed9 IM |
279 | |
280 | table = (void *)header; | |
281 | ||
282 | oem_addrX = table->OEMTableAddr; | |
283 | oem_size = table->OEMTableSize; | |
284 | ||
285 | early_acpi_os_unmap_memory(header, tbl_size); | |
286 | ||
287 | *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, oem_size); | |
288 | ||
289 | return 0; | |
1da177e4 | 290 | } |
a73aaedd | 291 | |
b74d446f | 292 | static void __init unmap_unisys_acpi_oem_table(unsigned long oem_addr) |
a73aaedd | 293 | { |
b825e6cc YL |
294 | if (!oem_addr) |
295 | return; | |
296 | ||
297 | __acpi_unmap_table((char *)oem_addr, oem_size); | |
a73aaedd | 298 | } |
7da18ed9 IM |
299 | |
300 | static int es7000_check_dsdt(void) | |
301 | { | |
302 | struct acpi_table_header header; | |
303 | ||
304 | if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) && | |
305 | !strncmp(header.oem_id, "UNISYS", 6)) | |
306 | return 1; | |
307 | return 0; | |
308 | } | |
309 | ||
871d78c6 | 310 | static int es7000_acpi_ret; |
2b6163bf | 311 | |
7da18ed9 | 312 | /* Hook from generic ACPI tables.c */ |
b74d446f | 313 | static int __init es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
7da18ed9 IM |
314 | { |
315 | unsigned long oem_addr = 0; | |
316 | int check_dsdt; | |
317 | int ret = 0; | |
318 | ||
319 | /* check dsdt at first to avoid clear fix_map for oem_addr */ | |
320 | check_dsdt = es7000_check_dsdt(); | |
321 | ||
322 | if (!find_unisys_acpi_oem_table(&oem_addr)) { | |
323 | if (check_dsdt) { | |
324 | ret = parse_unisys_oem((char *)oem_addr); | |
325 | } else { | |
326 | setup_unisys(); | |
327 | ret = 1; | |
328 | } | |
329 | /* | |
330 | * we need to unmap it | |
331 | */ | |
332 | unmap_unisys_acpi_oem_table(oem_addr); | |
333 | } | |
2b6163bf YL |
334 | |
335 | es7000_acpi_ret = ret; | |
336 | ||
337 | return ret && !es7000_apic_is_cluster(); | |
7da18ed9 | 338 | } |
3b900d44 | 339 | |
871d78c6 | 340 | static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id) |
2b6163bf YL |
341 | { |
342 | int ret = es7000_acpi_ret; | |
343 | ||
344 | return ret && es7000_apic_is_cluster(); | |
345 | } | |
346 | ||
7da18ed9 | 347 | #else /* !CONFIG_ACPI: */ |
871d78c6 | 348 | static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
7da18ed9 IM |
349 | { |
350 | return 0; | |
351 | } | |
3b900d44 | 352 | |
871d78c6 | 353 | static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id) |
3b900d44 IM |
354 | { |
355 | return 0; | |
356 | } | |
7da18ed9 | 357 | #endif /* !CONFIG_ACPI */ |
1da177e4 | 358 | |
2c4ce18c | 359 | static void es7000_spin(int n) |
1da177e4 LT |
360 | { |
361 | int i = 0; | |
362 | ||
363 | while (i++ < n) | |
364 | rep_nop(); | |
365 | } | |
366 | ||
871d78c6 | 367 | static int es7000_mip_write(struct mip_reg *mip_reg) |
1da177e4 | 368 | { |
2c4ce18c IM |
369 | int status = 0; |
370 | int spin; | |
1da177e4 LT |
371 | |
372 | spin = MIP_SPIN; | |
2c4ce18c IM |
373 | while ((host_reg->off_0x38 & MIP_VALID) != 0) { |
374 | if (--spin <= 0) { | |
7da18ed9 | 375 | WARN(1, "Timeout waiting for Host Valid Flag\n"); |
2c4ce18c IM |
376 | return -1; |
377 | } | |
1da177e4 LT |
378 | es7000_spin(MIP_SPIN); |
379 | } | |
380 | ||
381 | memcpy(host_reg, mip_reg, sizeof(struct mip_reg)); | |
382 | outb(1, mip_port); | |
383 | ||
384 | spin = MIP_SPIN; | |
385 | ||
2c4ce18c | 386 | while ((mip_reg->off_0x38 & MIP_VALID) == 0) { |
1da177e4 | 387 | if (--spin <= 0) { |
7da18ed9 | 388 | WARN(1, "Timeout waiting for MIP Valid Flag\n"); |
1da177e4 LT |
389 | return -1; |
390 | } | |
391 | es7000_spin(MIP_SPIN); | |
392 | } | |
393 | ||
2c4ce18c IM |
394 | status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48; |
395 | mip_reg->off_0x38 &= ~MIP_VALID; | |
396 | ||
1da177e4 LT |
397 | return status; |
398 | } | |
399 | ||
871d78c6 | 400 | static void es7000_enable_apic_mode(void) |
1da177e4 | 401 | { |
b0b20e5a IM |
402 | struct mip_reg es7000_mip_reg; |
403 | int mip_status; | |
404 | ||
405 | if (!es7000_plat) | |
1da177e4 | 406 | return; |
b0b20e5a | 407 | |
5cd476ef | 408 | pr_info("Enabling APIC mode.\n"); |
352887d1 IM |
409 | memset(&es7000_mip_reg, 0, sizeof(struct mip_reg)); |
410 | es7000_mip_reg.off_0x00 = MIP_SW_APIC; | |
411 | es7000_mip_reg.off_0x38 = MIP_VALID; | |
b0b20e5a | 412 | |
7da18ed9 IM |
413 | while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) |
414 | WARN(1, "Command failed, status = %x\n", mip_status); | |
1da177e4 | 415 | } |
2e096df8 | 416 | |
73e907de | 417 | static void es7000_vector_allocation_domain(int cpu, struct cpumask *retmask) |
2e096df8 IM |
418 | { |
419 | /* Careful. Some cpus do not strictly honor the set of cpus | |
420 | * specified in the interrupt destination when using lowest | |
421 | * priority interrupt delivery mode. | |
422 | * | |
423 | * In particular there was a hyperthreading cpu observed to | |
424 | * deliver interrupts to the wrong hyperthread when only one | |
425 | * hyperthread was specified in the interrupt desitination. | |
426 | */ | |
5c6cb5e2 RR |
427 | cpumask_clear(retmask); |
428 | cpumask_bits(retmask)[0] = APIC_ALL_CPUS; | |
2e096df8 IM |
429 | } |
430 | ||
431 | ||
432 | static void es7000_wait_for_init_deassert(atomic_t *deassert) | |
433 | { | |
2e096df8 IM |
434 | while (!atomic_read(deassert)) |
435 | cpu_relax(); | |
2e096df8 IM |
436 | } |
437 | ||
438 | static unsigned int es7000_get_apic_id(unsigned long x) | |
439 | { | |
440 | return (x >> 24) & 0xFF; | |
441 | } | |
442 | ||
2e096df8 IM |
443 | static void es7000_send_IPI_mask(const struct cpumask *mask, int vector) |
444 | { | |
43f39890 | 445 | default_send_IPI_mask_sequence_phys(mask, vector); |
2e096df8 IM |
446 | } |
447 | ||
448 | static void es7000_send_IPI_allbutself(int vector) | |
449 | { | |
43f39890 | 450 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); |
2e096df8 IM |
451 | } |
452 | ||
453 | static void es7000_send_IPI_all(int vector) | |
454 | { | |
455 | es7000_send_IPI_mask(cpu_online_mask, vector); | |
456 | } | |
457 | ||
458 | static int es7000_apic_id_registered(void) | |
459 | { | |
352887d1 | 460 | return 1; |
2e096df8 IM |
461 | } |
462 | ||
73e907de | 463 | static const struct cpumask *target_cpus_cluster(void) |
2e096df8 | 464 | { |
101aaca1 | 465 | return cpu_all_mask; |
2e096df8 IM |
466 | } |
467 | ||
4f062896 | 468 | static const struct cpumask *es7000_target_cpus(void) |
2e096df8 | 469 | { |
4f062896 | 470 | return cpumask_of(smp_processor_id()); |
2e096df8 IM |
471 | } |
472 | ||
7abc0753 | 473 | static unsigned long es7000_check_apicid_used(physid_mask_t *map, int apicid) |
2e096df8 IM |
474 | { |
475 | return 0; | |
476 | } | |
7abc0753 | 477 | |
2e096df8 IM |
478 | static unsigned long es7000_check_apicid_present(int bit) |
479 | { | |
480 | return physid_isset(bit, phys_cpu_present_map); | |
481 | } | |
482 | ||
483 | static unsigned long calculate_ldr(int cpu) | |
484 | { | |
2c4ce18c | 485 | unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu); |
2e096df8 | 486 | |
2c4ce18c | 487 | return SET_APIC_LOGICAL_ID(id); |
2e096df8 IM |
488 | } |
489 | ||
490 | /* | |
491 | * Set up the logical destination ID. | |
492 | * | |
493 | * Intel recommends to set DFR, LdR and TPR before enabling | |
494 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
495 | * document number 292116). So here it goes... | |
496 | */ | |
497 | static void es7000_init_apic_ldr_cluster(void) | |
498 | { | |
499 | unsigned long val; | |
500 | int cpu = smp_processor_id(); | |
501 | ||
352887d1 | 502 | apic_write(APIC_DFR, APIC_DFR_CLUSTER); |
2e096df8 IM |
503 | val = calculate_ldr(cpu); |
504 | apic_write(APIC_LDR, val); | |
505 | } | |
506 | ||
507 | static void es7000_init_apic_ldr(void) | |
508 | { | |
509 | unsigned long val; | |
510 | int cpu = smp_processor_id(); | |
511 | ||
352887d1 | 512 | apic_write(APIC_DFR, APIC_DFR_FLAT); |
2e096df8 IM |
513 | val = calculate_ldr(cpu); |
514 | apic_write(APIC_LDR, val); | |
515 | } | |
516 | ||
517 | static void es7000_setup_apic_routing(void) | |
518 | { | |
519 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); | |
7da18ed9 | 520 | |
5cd476ef | 521 | pr_info("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", |
2e096df8 IM |
522 | (apic_version[apic] == 0x14) ? |
523 | "Physical Cluster" : "Logical Cluster", | |
4f062896 | 524 | nr_ioapics, cpumask_bits(es7000_target_cpus())[0]); |
2e096df8 IM |
525 | } |
526 | ||
527 | static int es7000_apicid_to_node(int logical_apicid) | |
528 | { | |
529 | return 0; | |
530 | } | |
531 | ||
532 | ||
533 | static int es7000_cpu_present_to_apicid(int mps_cpu) | |
534 | { | |
535 | if (!mps_cpu) | |
536 | return boot_cpu_physical_apicid; | |
537 | else if (mps_cpu < nr_cpu_ids) | |
2c4ce18c | 538 | return per_cpu(x86_bios_cpu_apicid, mps_cpu); |
2e096df8 IM |
539 | else |
540 | return BAD_APICID; | |
541 | } | |
542 | ||
7da18ed9 IM |
543 | static int cpu_id; |
544 | ||
7abc0753 | 545 | static void es7000_apicid_to_cpu_present(int phys_apicid, physid_mask_t *retmap) |
2e096df8 | 546 | { |
7abc0753 | 547 | physid_set_mask_of_physid(cpu_id, retmap); |
7da18ed9 | 548 | ++cpu_id; |
2e096df8 IM |
549 | } |
550 | ||
551 | /* Mapping from cpu number to logical apicid */ | |
552 | static int es7000_cpu_to_logical_apicid(int cpu) | |
553 | { | |
554 | #ifdef CONFIG_SMP | |
555 | if (cpu >= nr_cpu_ids) | |
556 | return BAD_APICID; | |
2f205bc4 | 557 | return cpu_2_logical_apicid[cpu]; |
2e096df8 IM |
558 | #else |
559 | return logical_smp_processor_id(); | |
560 | #endif | |
561 | } | |
562 | ||
7abc0753 | 563 | static void es7000_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) |
2e096df8 IM |
564 | { |
565 | /* For clustered we don't have a good way to do this yet - hack */ | |
7abc0753 | 566 | physids_promote(0xFFL, retmap); |
2e096df8 IM |
567 | } |
568 | ||
569 | static int es7000_check_phys_apicid_present(int cpu_physical_apicid) | |
570 | { | |
571 | boot_cpu_physical_apicid = read_apic_id(); | |
2c4ce18c | 572 | return 1; |
2e096df8 IM |
573 | } |
574 | ||
73e907de | 575 | static unsigned int es7000_cpu_mask_to_apicid(const struct cpumask *cpumask) |
2e096df8 | 576 | { |
0edc0b32 JS |
577 | unsigned int round = 0; |
578 | int cpu, uninitialized_var(apicid); | |
2e096df8 | 579 | |
2e096df8 | 580 | /* |
0edc0b32 | 581 | * The cpus in the mask must all be on the apic cluster. |
2e096df8 | 582 | */ |
0edc0b32 JS |
583 | for_each_cpu(cpu, cpumask) { |
584 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | |
2e096df8 | 585 | |
0edc0b32 JS |
586 | if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
587 | WARN(1, "Not a valid mask!"); | |
2e096df8 | 588 | |
0edc0b32 | 589 | return BAD_APICID; |
2e096df8 | 590 | } |
0edc0b32 JS |
591 | apicid = new_apicid; |
592 | round++; | |
2e096df8 IM |
593 | } |
594 | return apicid; | |
595 | } | |
596 | ||
597 | static unsigned int | |
598 | es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask, | |
599 | const struct cpumask *andmask) | |
600 | { | |
601 | int apicid = es7000_cpu_to_logical_apicid(0); | |
602 | cpumask_var_t cpumask; | |
603 | ||
604 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | |
605 | return apicid; | |
606 | ||
607 | cpumask_and(cpumask, inmask, andmask); | |
608 | cpumask_and(cpumask, cpumask, cpu_online_mask); | |
609 | apicid = es7000_cpu_mask_to_apicid(cpumask); | |
610 | ||
611 | free_cpumask_var(cpumask); | |
612 | ||
613 | return apicid; | |
614 | } | |
615 | ||
616 | static int es7000_phys_pkg_id(int cpuid_apic, int index_msb) | |
617 | { | |
618 | return cpuid_apic >> index_msb; | |
619 | } | |
620 | ||
2e096df8 IM |
621 | static int probe_es7000(void) |
622 | { | |
623 | /* probed later in mptable/ACPI hooks */ | |
624 | return 0; | |
625 | } | |
626 | ||
871d78c6 JS |
627 | static int es7000_mps_ret; |
628 | static int es7000_mps_oem_check(struct mpc_table *mpc, char *oem, | |
629 | char *productid) | |
2e096df8 | 630 | { |
2b6163bf YL |
631 | int ret = 0; |
632 | ||
2e096df8 IM |
633 | if (mpc->oemptr) { |
634 | struct mpc_oemtable *oem_table = | |
635 | (struct mpc_oemtable *)mpc->oemptr; | |
636 | ||
637 | if (!strncmp(oem, "UNISYS", 6)) | |
2b6163bf | 638 | ret = parse_unisys_oem((char *)oem_table); |
2e096df8 | 639 | } |
2b6163bf YL |
640 | |
641 | es7000_mps_ret = ret; | |
642 | ||
643 | return ret && !es7000_apic_is_cluster(); | |
644 | } | |
645 | ||
871d78c6 JS |
646 | static int es7000_mps_oem_check_cluster(struct mpc_table *mpc, char *oem, |
647 | char *productid) | |
2b6163bf YL |
648 | { |
649 | int ret = es7000_mps_ret; | |
650 | ||
651 | return ret && es7000_apic_is_cluster(); | |
2e096df8 IM |
652 | } |
653 | ||
151586d0 RM |
654 | /* We've been warned by a false positive warning.Use __refdata to keep calm. */ |
655 | struct apic __refdata apic_es7000_cluster = { | |
2b6163bf YL |
656 | |
657 | .name = "es7000", | |
658 | .probe = probe_es7000, | |
659 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check_cluster, | |
660 | .apic_id_registered = es7000_apic_id_registered, | |
661 | ||
662 | .irq_delivery_mode = dest_LowestPrio, | |
663 | /* logical delivery broadcast to all procs: */ | |
664 | .irq_dest_mode = 1, | |
665 | ||
666 | .target_cpus = target_cpus_cluster, | |
667 | .disable_esr = 1, | |
668 | .dest_logical = 0, | |
669 | .check_apicid_used = es7000_check_apicid_used, | |
670 | .check_apicid_present = es7000_check_apicid_present, | |
671 | ||
672 | .vector_allocation_domain = es7000_vector_allocation_domain, | |
673 | .init_apic_ldr = es7000_init_apic_ldr_cluster, | |
674 | ||
675 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | |
676 | .setup_apic_routing = es7000_setup_apic_routing, | |
677 | .multi_timer_check = NULL, | |
678 | .apicid_to_node = es7000_apicid_to_node, | |
679 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | |
680 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | |
681 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | |
682 | .setup_portio_remap = NULL, | |
683 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | |
684 | .enable_apic_mode = es7000_enable_apic_mode, | |
685 | .phys_pkg_id = es7000_phys_pkg_id, | |
686 | .mps_oem_check = es7000_mps_oem_check_cluster, | |
687 | ||
688 | .get_apic_id = es7000_get_apic_id, | |
689 | .set_apic_id = NULL, | |
690 | .apic_id_mask = 0xFF << 24, | |
691 | ||
c2b20cbd | 692 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, |
2b6163bf YL |
693 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, |
694 | ||
695 | .send_IPI_mask = es7000_send_IPI_mask, | |
696 | .send_IPI_mask_allbutself = NULL, | |
697 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | |
698 | .send_IPI_all = es7000_send_IPI_all, | |
699 | .send_IPI_self = default_send_IPI_self, | |
700 | ||
1f5bcabf | 701 | .wakeup_secondary_cpu = wakeup_secondary_cpu_via_mip, |
2b6163bf YL |
702 | |
703 | .trampoline_phys_low = 0x467, | |
704 | .trampoline_phys_high = 0x469, | |
705 | ||
706 | .wait_for_init_deassert = NULL, | |
707 | ||
708 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | |
709 | .smp_callin_clear_local_apic = NULL, | |
710 | .inquire_remote_apic = default_inquire_remote_apic, | |
711 | ||
712 | .read = native_apic_mem_read, | |
713 | .write = native_apic_mem_write, | |
714 | .icr_read = native_apic_icr_read, | |
715 | .icr_write = native_apic_icr_write, | |
716 | .wait_icr_idle = native_apic_wait_icr_idle, | |
717 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
718 | }; | |
2e096df8 | 719 | |
b74d446f | 720 | struct apic __refdata apic_es7000 = { |
2e096df8 IM |
721 | |
722 | .name = "es7000", | |
723 | .probe = probe_es7000, | |
724 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check, | |
725 | .apic_id_registered = es7000_apic_id_registered, | |
726 | ||
727 | .irq_delivery_mode = dest_Fixed, | |
728 | /* phys delivery to target CPUs: */ | |
729 | .irq_dest_mode = 0, | |
730 | ||
731 | .target_cpus = es7000_target_cpus, | |
732 | .disable_esr = 1, | |
733 | .dest_logical = 0, | |
734 | .check_apicid_used = es7000_check_apicid_used, | |
735 | .check_apicid_present = es7000_check_apicid_present, | |
736 | ||
737 | .vector_allocation_domain = es7000_vector_allocation_domain, | |
738 | .init_apic_ldr = es7000_init_apic_ldr, | |
739 | ||
740 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | |
741 | .setup_apic_routing = es7000_setup_apic_routing, | |
742 | .multi_timer_check = NULL, | |
743 | .apicid_to_node = es7000_apicid_to_node, | |
744 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | |
745 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | |
746 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | |
747 | .setup_portio_remap = NULL, | |
748 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | |
749 | .enable_apic_mode = es7000_enable_apic_mode, | |
750 | .phys_pkg_id = es7000_phys_pkg_id, | |
751 | .mps_oem_check = es7000_mps_oem_check, | |
752 | ||
753 | .get_apic_id = es7000_get_apic_id, | |
754 | .set_apic_id = NULL, | |
755 | .apic_id_mask = 0xFF << 24, | |
756 | ||
757 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, | |
758 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, | |
759 | ||
760 | .send_IPI_mask = es7000_send_IPI_mask, | |
761 | .send_IPI_mask_allbutself = NULL, | |
762 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | |
763 | .send_IPI_all = es7000_send_IPI_all, | |
6b64ee02 | 764 | .send_IPI_self = default_send_IPI_self, |
2e096df8 | 765 | |
2e096df8 IM |
766 | .trampoline_phys_low = 0x467, |
767 | .trampoline_phys_high = 0x469, | |
768 | ||
769 | .wait_for_init_deassert = es7000_wait_for_init_deassert, | |
770 | ||
771 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | |
772 | .smp_callin_clear_local_apic = NULL, | |
2e096df8 | 773 | .inquire_remote_apic = default_inquire_remote_apic, |
c1eeb2de YL |
774 | |
775 | .read = native_apic_mem_read, | |
776 | .write = native_apic_mem_write, | |
777 | .icr_read = native_apic_icr_read, | |
778 | .icr_write = native_apic_icr_write, | |
779 | .wait_icr_idle = native_apic_wait_icr_idle, | |
780 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
2e096df8 | 781 | }; |