Commit | Line | Data |
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1965aae3 PA |
1 | #ifndef _ASM_X86_SMP_H |
2 | #define _ASM_X86_SMP_H | |
c27cfeff | 3 | #ifndef __ASSEMBLY__ |
53ebef49 | 4 | #include <linux/cpumask.h> |
93b016f8 | 5 | #include <linux/init.h> |
7e1efc0c | 6 | #include <asm/percpu.h> |
53ebef49 | 7 | |
b23dab08 GC |
8 | /* |
9 | * We need the APIC definitions automatically as part of 'smp.h' | |
10 | */ | |
11 | #ifdef CONFIG_X86_LOCAL_APIC | |
12 | # include <asm/mpspec.h> | |
13 | # include <asm/apic.h> | |
14 | # ifdef CONFIG_X86_IO_APIC | |
15 | # include <asm/io_apic.h> | |
16 | # endif | |
17 | #endif | |
b23dab08 | 18 | #include <asm/thread_info.h> |
fb8fd077 | 19 | #include <asm/cpumask.h> |
69092624 | 20 | #include <asm/cpufeature.h> |
b23dab08 | 21 | |
53ebef49 GC |
22 | extern int smp_num_siblings; |
23 | extern unsigned int num_processors; | |
c27cfeff | 24 | |
69092624 LM |
25 | static inline bool cpu_has_ht_siblings(void) |
26 | { | |
27 | bool has_siblings = false; | |
28 | #ifdef CONFIG_SMP | |
29 | has_siblings = cpu_has_ht && smp_num_siblings > 1; | |
30 | #endif | |
31 | return has_siblings; | |
32 | } | |
33 | ||
7ad728f9 RR |
34 | DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map); |
35 | DECLARE_PER_CPU(cpumask_var_t, cpu_core_map); | |
b3d7336d YL |
36 | /* cpus sharing the last level cache: */ |
37 | DECLARE_PER_CPU(cpumask_var_t, cpu_llc_shared_map); | |
7e1efc0c | 38 | DECLARE_PER_CPU(u16, cpu_llc_id); |
fb26132b | 39 | DECLARE_PER_CPU(int, cpu_number); |
23ca4bba | 40 | |
c2d1cec1 MT |
41 | static inline struct cpumask *cpu_sibling_mask(int cpu) |
42 | { | |
7ad728f9 | 43 | return per_cpu(cpu_sibling_map, cpu); |
c2d1cec1 MT |
44 | } |
45 | ||
46 | static inline struct cpumask *cpu_core_mask(int cpu) | |
47 | { | |
7ad728f9 | 48 | return per_cpu(cpu_core_map, cpu); |
c2d1cec1 MT |
49 | } |
50 | ||
b3d7336d YL |
51 | static inline struct cpumask *cpu_llc_shared_mask(int cpu) |
52 | { | |
53 | return per_cpu(cpu_llc_shared_map, cpu); | |
54 | } | |
55 | ||
23ca4bba MT |
56 | DECLARE_EARLY_PER_CPU(u16, x86_cpu_to_apicid); |
57 | DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid); | |
4e62445b | 58 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
4c321ff8 TH |
59 | DECLARE_EARLY_PER_CPU(int, x86_cpu_to_logical_apicid); |
60 | #endif | |
7e1efc0c | 61 | |
9d97d0da | 62 | /* Static state in head.S used to set up a CPU */ |
11d4c3f9 | 63 | extern unsigned long stack_start; /* Initial stack pointer address */ |
9d97d0da | 64 | |
8239c25f TG |
65 | struct task_struct; |
66 | ||
16694024 GC |
67 | struct smp_ops { |
68 | void (*smp_prepare_boot_cpu)(void); | |
69 | void (*smp_prepare_cpus)(unsigned max_cpus); | |
16694024 GC |
70 | void (*smp_cpus_done)(unsigned max_cpus); |
71 | ||
76fac077 | 72 | void (*stop_other_cpus)(int wait); |
16694024 | 73 | void (*smp_send_reschedule)(int cpu); |
3b16cf87 | 74 | |
5cdaf183 | 75 | int (*cpu_up)(unsigned cpu, struct task_struct *tidle); |
93be71b6 AN |
76 | int (*cpu_disable)(void); |
77 | void (*cpu_die)(unsigned int cpu); | |
78 | void (*play_dead)(void); | |
79 | ||
bcda016e | 80 | void (*send_call_func_ipi)(const struct cpumask *mask); |
3b16cf87 | 81 | void (*send_call_func_single_ipi)(int cpu); |
16694024 GC |
82 | }; |
83 | ||
14522076 GC |
84 | /* Globals due to paravirt */ |
85 | extern void set_cpu_sibling_map(int cpu); | |
86 | ||
c76cb368 | 87 | #ifdef CONFIG_SMP |
d0173aea GOC |
88 | #ifndef CONFIG_PARAVIRT |
89 | #define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0) | |
90 | #endif | |
c76cb368 | 91 | extern struct smp_ops smp_ops; |
8678969e | 92 | |
377d6984 GC |
93 | static inline void smp_send_stop(void) |
94 | { | |
76fac077 AK |
95 | smp_ops.stop_other_cpus(0); |
96 | } | |
97 | ||
98 | static inline void stop_other_cpus(void) | |
99 | { | |
100 | smp_ops.stop_other_cpus(1); | |
377d6984 GC |
101 | } |
102 | ||
1e3fac83 GC |
103 | static inline void smp_prepare_boot_cpu(void) |
104 | { | |
105 | smp_ops.smp_prepare_boot_cpu(); | |
106 | } | |
107 | ||
7557da67 GC |
108 | static inline void smp_prepare_cpus(unsigned int max_cpus) |
109 | { | |
110 | smp_ops.smp_prepare_cpus(max_cpus); | |
111 | } | |
112 | ||
c5597649 GC |
113 | static inline void smp_cpus_done(unsigned int max_cpus) |
114 | { | |
115 | smp_ops.smp_cpus_done(max_cpus); | |
116 | } | |
117 | ||
8239c25f | 118 | static inline int __cpu_up(unsigned int cpu, struct task_struct *tidle) |
71d19549 | 119 | { |
5cdaf183 | 120 | return smp_ops.cpu_up(cpu, tidle); |
71d19549 GC |
121 | } |
122 | ||
93be71b6 AN |
123 | static inline int __cpu_disable(void) |
124 | { | |
125 | return smp_ops.cpu_disable(); | |
126 | } | |
127 | ||
128 | static inline void __cpu_die(unsigned int cpu) | |
129 | { | |
130 | smp_ops.cpu_die(cpu); | |
131 | } | |
132 | ||
133 | static inline void play_dead(void) | |
134 | { | |
135 | smp_ops.play_dead(); | |
136 | } | |
137 | ||
8678969e GC |
138 | static inline void smp_send_reschedule(int cpu) |
139 | { | |
140 | smp_ops.smp_send_reschedule(cpu); | |
141 | } | |
64b1a21e | 142 | |
3b16cf87 JA |
143 | static inline void arch_send_call_function_single_ipi(int cpu) |
144 | { | |
145 | smp_ops.send_call_func_single_ipi(cpu); | |
146 | } | |
147 | ||
b643deca | 148 | static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
64b1a21e | 149 | { |
b643deca | 150 | smp_ops.send_call_func_ipi(mask); |
64b1a21e | 151 | } |
71d19549 | 152 | |
8227dce7 | 153 | void cpu_disable_common(void); |
1e3fac83 | 154 | void native_smp_prepare_boot_cpu(void); |
7557da67 | 155 | void native_smp_prepare_cpus(unsigned int max_cpus); |
c5597649 | 156 | void native_smp_cpus_done(unsigned int max_cpus); |
5cdaf183 | 157 | int native_cpu_up(unsigned int cpunum, struct task_struct *tidle); |
93be71b6 AN |
158 | int native_cpu_disable(void); |
159 | void native_cpu_die(unsigned int cpu); | |
160 | void native_play_dead(void); | |
a21f5d88 | 161 | void play_dead_common(void); |
a7b480e7 BP |
162 | void wbinvd_on_cpu(int cpu); |
163 | int wbinvd_on_all_cpus(void); | |
93be71b6 | 164 | |
bcda016e | 165 | void native_send_call_func_ipi(const struct cpumask *mask); |
3b16cf87 | 166 | void native_send_call_func_single_ipi(int cpu); |
7eb43a6d | 167 | void x86_idle_thread_init(unsigned int cpu, struct task_struct *idle); |
93b016f8 | 168 | |
1d89a7f0 | 169 | void smp_store_cpu_info(int id); |
c70dcb74 | 170 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
a9c057c1 | 171 | |
a7b480e7 BP |
172 | #else /* !CONFIG_SMP */ |
173 | #define wbinvd_on_cpu(cpu) wbinvd() | |
174 | static inline int wbinvd_on_all_cpus(void) | |
175 | { | |
176 | wbinvd(); | |
177 | return 0; | |
178 | } | |
14adf855 | 179 | #endif /* CONFIG_SMP */ |
a9c057c1 | 180 | |
2fe60147 AS |
181 | extern unsigned disabled_cpus __cpuinitdata; |
182 | ||
a9c057c1 GC |
183 | #ifdef CONFIG_X86_32_SMP |
184 | /* | |
185 | * This function is needed by all SMP systems. It must _always_ be valid | |
186 | * from the initial startup. We map APIC_BASE very early in page_setup(), | |
187 | * so this is correct in the x86 case. | |
188 | */ | |
c6ae41e7 | 189 | #define raw_smp_processor_id() (this_cpu_read(cpu_number)) |
a9c057c1 GC |
190 | extern int safe_smp_processor_id(void); |
191 | ||
192 | #elif defined(CONFIG_X86_64_SMP) | |
c6ae41e7 | 193 | #define raw_smp_processor_id() (this_cpu_read(cpu_number)) |
a9c057c1 GC |
194 | |
195 | #define stack_smp_processor_id() \ | |
196 | ({ \ | |
197 | struct thread_info *ti; \ | |
198 | __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \ | |
199 | ti->cpu; \ | |
200 | }) | |
201 | #define safe_smp_processor_id() smp_processor_id() | |
202 | ||
c76cb368 | 203 | #endif |
16694024 | 204 | |
1b000843 GC |
205 | #ifdef CONFIG_X86_LOCAL_APIC |
206 | ||
1b374e4d | 207 | #ifndef CONFIG_X86_64 |
1b000843 GC |
208 | static inline int logical_smp_processor_id(void) |
209 | { | |
210 | /* we don't want to mark this access volatile - bad code generation */ | |
4797f6b0 | 211 | return GET_APIC_LOGICAL_ID(apic_read(APIC_LDR)); |
1b000843 GC |
212 | } |
213 | ||
ac23d4ee JS |
214 | #endif |
215 | ||
1b000843 | 216 | extern int hard_smp_processor_id(void); |
1b000843 GC |
217 | |
218 | #else /* CONFIG_X86_LOCAL_APIC */ | |
219 | ||
220 | # ifndef CONFIG_SMP | |
221 | # define hard_smp_processor_id() 0 | |
222 | # endif | |
223 | ||
224 | #endif /* CONFIG_X86_LOCAL_APIC */ | |
225 | ||
99e8b9ca DZ |
226 | #ifdef CONFIG_DEBUG_NMI_SELFTEST |
227 | extern void nmi_selftest(void); | |
228 | #else | |
229 | #define nmi_selftest() do { } while (0) | |
230 | #endif | |
231 | ||
c27cfeff | 232 | #endif /* __ASSEMBLY__ */ |
1965aae3 | 233 | #endif /* _ASM_X86_SMP_H */ |