[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / sparc / include / asm / mc146818rtc_32.h

/*
 * Machine dependent access functions for RTC registers.
 */
#ifndef __ASM_SPARC_MC146818RTC_H
#define __ASM_SPARC_MC146818RTC_H

#include <asm/io.h>

#ifndef RTC_PORT
#define RTC_PORT(x)	(0x70 + (x))
#define RTC_ALWAYS_BCD	1	/* RTC operates in binary mode */
#endif

/*
 * The yet supported machines all access the RTC index register via
 * an ISA port access but the way to access the date register differs ...
 */
#define CMOS_READ(addr) ({ \
outb_p((addr),RTC_PORT(0)); \
inb_p(RTC_PORT(1)); \
})
#define CMOS_WRITE(val, addr) ({ \
outb_p((addr),RTC_PORT(0)); \
outb_p((val),RTC_PORT(1)); \
})

#define RTC_IRQ 8

#endif /* __ASM_SPARC_MC146818RTC_H */
Commit	Line	Data
f5e706ad SR	1	/*
	2	* Machine dependent access functions for RTC registers.
	3	*/
	4	#ifndef __ASM_SPARC_MC146818RTC_H
	5	#define __ASM_SPARC_MC146818RTC_H
	6
	7	#include <asm/io.h>
	8
	9	#ifndef RTC_PORT
	10	#define RTC_PORT(x) (0x70 + (x))
	11	#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */
	12	#endif
	13
	14	/*
	15	* The yet supported machines all access the RTC index register via
	16	* an ISA port access but the way to access the date register differs ...
	17	*/
	18	#define CMOS_READ(addr) ({ \
	19	outb_p((addr),RTC_PORT(0)); \
	20	inb_p(RTC_PORT(1)); \
	21	})
	22	#define CMOS_WRITE(val, addr) ({ \
	23	outb_p((addr),RTC_PORT(0)); \
	24	outb_p((val),RTC_PORT(1)); \
	25	})
	26
	27	#define RTC_IRQ 8
	28
	29	#endif /* __ASM_SPARC_MC146818RTC_H */