[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / platforms / pseries / eeh_cache.c

/*
 * eeh_cache.c
 * PCI address cache; allows the lookup of PCI devices based on I/O address
 *
 * Copyright IBM Corporation 2004
 * Copyright Linas Vepstas <linas@austin.ibm.com> 2004
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

#include <linux/list.h>
#include <linux/pci.h>
#include <linux/rbtree.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/atomic.h>
#include <asm/pci-bridge.h>
#include <asm/ppc-pci.h>


/**
 * The pci address cache subsystem.  This subsystem places
 * PCI device address resources into a red-black tree, sorted
 * according to the address range, so that given only an i/o
 * address, the corresponding PCI device can be **quickly**
 * found. It is safe to perform an address lookup in an interrupt
 * context; this ability is an important feature.
 *
 * Currently, the only customer of this code is the EEH subsystem;
 * thus, this code has been somewhat tailored to suit EEH better.
 * In particular, the cache does *not* hold the addresses of devices
 * for which EEH is not enabled.
 *
 * (Implementation Note: The RB tree seems to be better/faster
 * than any hash algo I could think of for this problem, even
 * with the penalty of slow pointer chases for d-cache misses).
 */
struct pci_io_addr_range
{
	struct rb_node rb_node;
	unsigned long addr_lo;
	unsigned long addr_hi;
	struct pci_dev *pcidev;
	unsigned int flags;
};

static struct pci_io_addr_cache
{
	struct rb_root rb_root;
	spinlock_t piar_lock;
} pci_io_addr_cache_root;

static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
{
	struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;

	while (n) {
		struct pci_io_addr_range *piar;
		piar = rb_entry(n, struct pci_io_addr_range, rb_node);

		if (addr < piar->addr_lo) {
			n = n->rb_left;
		} else {
			if (addr > piar->addr_hi) {
				n = n->rb_right;
			} else {
				pci_dev_get(piar->pcidev);
				return piar->pcidev;
			}
		}
	}

	return NULL;
}

/**
 * pci_get_device_by_addr - Get device, given only address
 * @addr: mmio (PIO) phys address or i/o port number
 *
 * Given an mmio phys address, or a port number, find a pci device
 * that implements this address.  Be sure to pci_dev_put the device
 * when finished.  I/O port numbers are assumed to be offset
 * from zero (that is, they do *not* have pci_io_addr added in).
 * It is safe to call this function within an interrupt.
 */
struct pci_dev *pci_get_device_by_addr(unsigned long addr)
{
	struct pci_dev *dev;
	unsigned long flags;

	spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
	dev = __pci_get_device_by_addr(addr);
	spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
	return dev;
}

#ifdef DEBUG
/*
 * Handy-dandy debug print routine, does nothing more
 * than print out the contents of our addr cache.
 */
static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
{
	struct rb_node *n;
	int cnt = 0;

	n = rb_first(&cache->rb_root);
	while (n) {
		struct pci_io_addr_range *piar;
		piar = rb_entry(n, struct pci_io_addr_range, rb_node);
		printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
		       (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
		       piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
		cnt++;
		n = rb_next(n);
	}
}
#endif

/* Insert address range into the rb tree. */
static struct pci_io_addr_range *
pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
		      unsigned long ahi, unsigned int flags)
{
	struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
	struct rb_node *parent = NULL;
	struct pci_io_addr_range *piar;

	/* Walk tree, find a place to insert into tree */
	while (*p) {
		parent = *p;
		piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
		if (ahi < piar->addr_lo) {
			p = &parent->rb_left;
		} else if (alo > piar->addr_hi) {
			p = &parent->rb_right;
		} else {
			if (dev != piar->pcidev ||
			    alo != piar->addr_lo || ahi != piar->addr_hi) {
				printk(KERN_WARNING "PIAR: overlapping address range\n");
			}
			return piar;
		}
	}
	piar = kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
	if (!piar)
		return NULL;

	pci_dev_get(dev);
	piar->addr_lo = alo;
	piar->addr_hi = ahi;
	piar->pcidev = dev;
	piar->flags = flags;

#ifdef DEBUG
	printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
	                  alo, ahi, pci_name (dev));
#endif

	rb_link_node(&piar->rb_node, parent, p);
	rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);

	return piar;
}

static void __pci_addr_cache_insert_device(struct pci_dev *dev)
{
	struct device_node *dn;
	struct pci_dn *pdn;
	int i;

	dn = pci_device_to_OF_node(dev);
	if (!dn) {
		printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
		return;
	}

	/* Skip any devices for which EEH is not enabled. */
	pdn = PCI_DN(dn);
	if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
	    pdn->eeh_mode & EEH_MODE_NOCHECK) {
#ifdef DEBUG
		printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
		       pci_name(dev), pdn->node->full_name);
#endif
		return;
	}

	/* Walk resources on this device, poke them into the tree */
	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
		unsigned long start = pci_resource_start(dev,i);
		unsigned long end = pci_resource_end(dev,i);
		unsigned int flags = pci_resource_flags(dev,i);

		/* We are interested only bus addresses, not dma or other stuff */
		if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
			continue;
		if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
			 continue;
		pci_addr_cache_insert(dev, start, end, flags);
	}
}

/**
 * pci_addr_cache_insert_device - Add a device to the address cache
 * @dev: PCI device whose I/O addresses we are interested in.
 *
 * In order to support the fast lookup of devices based on addresses,
 * we maintain a cache of devices that can be quickly searched.
 * This routine adds a device to that cache.
 */
void pci_addr_cache_insert_device(struct pci_dev *dev)
{
	unsigned long flags;

	/* Ignore PCI bridges */
	if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
		return;

	spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
	__pci_addr_cache_insert_device(dev);
	spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
}

static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
{
	struct rb_node *n;

restart:
	n = rb_first(&pci_io_addr_cache_root.rb_root);
	while (n) {
		struct pci_io_addr_range *piar;
		piar = rb_entry(n, struct pci_io_addr_range, rb_node);

		if (piar->pcidev == dev) {
			rb_erase(n, &pci_io_addr_cache_root.rb_root);
			pci_dev_put(piar->pcidev);
			kfree(piar);
			goto restart;
		}
		n = rb_next(n);
	}
}

/**
 * pci_addr_cache_remove_device - remove pci device from addr cache
 * @dev: device to remove
 *
 * Remove a device from the addr-cache tree.
 * This is potentially expensive, since it will walk
 * the tree multiple times (once per resource).
 * But so what; device removal doesn't need to be that fast.
 */
void pci_addr_cache_remove_device(struct pci_dev *dev)
{
	unsigned long flags;

	spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
	__pci_addr_cache_remove_device(dev);
	spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
}

/**
 * pci_addr_cache_build - Build a cache of I/O addresses
 *
 * Build a cache of pci i/o addresses.  This cache will be used to
 * find the pci device that corresponds to a given address.
 * This routine scans all pci busses to build the cache.
 * Must be run late in boot process, after the pci controllers
 * have been scanned for devices (after all device resources are known).
 */
void __init pci_addr_cache_build(void)
{
	struct device_node *dn;
	struct pci_dev *dev = NULL;

	spin_lock_init(&pci_io_addr_cache_root.piar_lock);

	for_each_pci_dev(dev) {
		pci_addr_cache_insert_device(dev);

		dn = pci_device_to_OF_node(dev);
		if (!dn)
			continue;
		pci_dev_get(dev);  /* matching put is in eeh_remove_device() */
		PCI_DN(dn)->pcidev = dev;

		eeh_sysfs_add_device(dev);
	}

#ifdef DEBUG
	/* Verify tree built up above, echo back the list of addrs. */
	pci_addr_cache_print(&pci_io_addr_cache_root);
#endif
}
Commit	Line	Data
5d5a0936 LV	1	/*
	2	* eeh_cache.c
	3	* PCI address cache; allows the lookup of PCI devices based on I/O address
	4	*
3c8c90ab LV	5	* Copyright IBM Corporation 2004
3c8c90ab LV	6	* Copyright Linas Vepstas <linas@austin.ibm.com> 2004
5d5a0936 LV	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22
	23	#include <linux/list.h>
	24	#include <linux/pci.h>
	25	#include <linux/rbtree.h>
5a0e3ad6	26	#include <linux/slab.h>
5d5a0936	27	#include <linux/spinlock.h>
60063497	28	#include <linux/atomic.h>
5d5a0936 LV	29	#include <asm/pci-bridge.h>
5d5a0936 LV	30	#include <asm/ppc-pci.h>
5d5a0936	31
5d5a0936 LV	32
	33	/**
	34	* The pci address cache subsystem. This subsystem places
	35	* PCI device address resources into a red-black tree, sorted
	36	* according to the address range, so that given only an i/o
	37	* address, the corresponding PCI device can be quickly
	38	* found. It is safe to perform an address lookup in an interrupt
	39	* context; this ability is an important feature.
	40	*
	41	* Currently, the only customer of this code is the EEH subsystem;
	42	* thus, this code has been somewhat tailored to suit EEH better.
	43	* In particular, the cache does not hold the addresses of devices
	44	* for which EEH is not enabled.
	45	*
	46	* (Implementation Note: The RB tree seems to be better/faster
	47	* than any hash algo I could think of for this problem, even
	48	* with the penalty of slow pointer chases for d-cache misses).
	49	*/
	50	struct pci_io_addr_range
	51	{
	52	struct rb_node rb_node;
	53	unsigned long addr_lo;
	54	unsigned long addr_hi;
	55	struct pci_dev *pcidev;
	56	unsigned int flags;
	57	};
	58
	59	static struct pci_io_addr_cache
	60	{
	61	struct rb_root rb_root;
	62	spinlock_t piar_lock;
	63	} pci_io_addr_cache_root;
	64
	65	static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
	66	{
	67	struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
	68
	69	while (n) {
	70	struct pci_io_addr_range *piar;
	71	piar = rb_entry(n, struct pci_io_addr_range, rb_node);
	72
	73	if (addr < piar->addr_lo) {
	74	n = n->rb_left;
	75	} else {
	76	if (addr > piar->addr_hi) {
	77	n = n->rb_right;
	78	} else {
	79	pci_dev_get(piar->pcidev);
	80	return piar->pcidev;
	81	}
	82	}
	83	}
	84
	85	return NULL;
	86	}
	87
	88	/**
	89	* pci_get_device_by_addr - Get device, given only address
	90	* @addr: mmio (PIO) phys address or i/o port number
	91	*
	92	* Given an mmio phys address, or a port number, find a pci device
	93	* that implements this address. Be sure to pci_dev_put the device
	94	* when finished. I/O port numbers are assumed to be offset
	95	* from zero (that is, they do not have pci_io_addr added in).
96	* It is safe to call this function within an interrupt.
97	*/
98	struct pci_dev *pci_get_device_by_addr(unsigned long addr)
99	{
100	struct pci_dev *dev;
101	unsigned long flags;
102
103	spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
104	dev = __pci_get_device_by_addr(addr);
105	spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
106	return dev;
107	}
108
109	#ifdef DEBUG
110	/*
111	* Handy-dandy debug print routine, does nothing more
112	* than print out the contents of our addr cache.
113	*/
114	static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
115	{
116	struct rb_node *n;
117	int cnt = 0;
118
119	n = rb_first(&cache->rb_root);
120	while (n) {
121	struct pci_io_addr_range *piar;
122	piar = rb_entry(n, struct pci_io_addr_range, rb_node);
123	printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
124	(piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
125	piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
126	cnt++;
127	n = rb_next(n);
128	}
129	}
130	#endif
131
132	/* Insert address range into the rb tree. */
133	static struct pci_io_addr_range *
134	pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
135	unsigned long ahi, unsigned int flags)
136	{
137	struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
138	struct rb_node *parent = NULL;
139	struct pci_io_addr_range *piar;
140
141	/* Walk tree, find a place to insert into tree */
142	while (*p) {
143	parent = *p;
144	piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
145	if (ahi < piar->addr_lo) {
146	p = &parent->rb_left;
147	} else if (alo > piar->addr_hi) {
148	p = &parent->rb_right;
149	} else {
150	if (dev != piar->pcidev \|\|
151	alo != piar->addr_lo \|\| ahi != piar->addr_hi) {
152	printk(KERN_WARNING "PIAR: overlapping address range\n");
153	}
154	return piar;
155	}
156	}
5cbded58	157	piar = kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
5d5a0936 LV	158	if (!piar)
	159	return NULL;
	160
af525592	161	pci_dev_get(dev);
5d5a0936 LV	162	piar->addr_lo = alo;
	163	piar->addr_hi = ahi;
	164	piar->pcidev = dev;
	165	piar->flags = flags;
	166
	167	#ifdef DEBUG
	168	printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
	169	alo, ahi, pci_name (dev));
	170	#endif
	171
	172	rb_link_node(&piar->rb_node, parent, p);
	173	rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
	174
	175	return piar;
	176	}
	177
	178	static void __pci_addr_cache_insert_device(struct pci_dev *dev)
	179	{
	180	struct device_node *dn;
	181	struct pci_dn *pdn;
	182	int i;
5d5a0936 LV	183
	184	dn = pci_device_to_OF_node(dev);
	185	if (!dn) {
	186	printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
	187	return;
	188	}
	189
	190	/* Skip any devices for which EEH is not enabled. */
	191	pdn = PCI_DN(dn);
	192	if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) \|\|
	193	pdn->eeh_mode & EEH_MODE_NOCHECK) {
	194	#ifdef DEBUG
	195	printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
	196	pci_name(dev), pdn->node->full_name);
	197	#endif
	198	return;
	199	}
	200
5d5a0936 LV	201	/* Walk resources on this device, poke them into the tree */
	202	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
	203	unsigned long start = pci_resource_start(dev,i);
	204	unsigned long end = pci_resource_end(dev,i);
	205	unsigned int flags = pci_resource_flags(dev,i);
	206
	207	/* We are interested only bus addresses, not dma or other stuff */
	208	if (0 == (flags & (IORESOURCE_IO \| IORESOURCE_MEM)))
	209	continue;
	210	if (start == 0 \|\| ~start == 0 \|\| end == 0 \|\| ~end == 0)
	211	continue;
	212	pci_addr_cache_insert(dev, start, end, flags);
5d5a0936	213	}
5d5a0936 LV	214	}
	215
	216	/**
	217	* pci_addr_cache_insert_device - Add a device to the address cache
	218	* @dev: PCI device whose I/O addresses we are interested in.
	219	*
	220	* In order to support the fast lookup of devices based on addresses,
	221	* we maintain a cache of devices that can be quickly searched.
	222	* This routine adds a device to that cache.
	223	*/
	224	void pci_addr_cache_insert_device(struct pci_dev *dev)
	225	{
	226	unsigned long flags;
	227
093eda3c LV	228	/* Ignore PCI bridges */
	229	if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
	230	return;
	231
5d5a0936 LV	232	spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
	233	__pci_addr_cache_insert_device(dev);
	234	spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
	235	}
	236
	237	static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
	238	{
	239	struct rb_node *n;
5d5a0936 LV	240
	241	restart:
	242	n = rb_first(&pci_io_addr_cache_root.rb_root);
	243	while (n) {
	244	struct pci_io_addr_range *piar;
	245	piar = rb_entry(n, struct pci_io_addr_range, rb_node);
	246
	247	if (piar->pcidev == dev) {
	248	rb_erase(n, &pci_io_addr_cache_root.rb_root);
af525592	249	pci_dev_put(piar->pcidev);
5d5a0936 LV	250	kfree(piar);
	251	goto restart;
	252	}
	253	n = rb_next(n);
	254	}
5d5a0936 LV	255	}
	256
	257	/**
	258	* pci_addr_cache_remove_device - remove pci device from addr cache
	259	* @dev: device to remove
	260	*
	261	* Remove a device from the addr-cache tree.
	262	* This is potentially expensive, since it will walk
	263	* the tree multiple times (once per resource).
	264	* But so what; device removal doesn't need to be that fast.
	265	*/
	266	void pci_addr_cache_remove_device(struct pci_dev *dev)
	267	{
	268	unsigned long flags;
	269
	270	spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
	271	__pci_addr_cache_remove_device(dev);
	272	spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
	273	}
	274
	275	/**
	276	* pci_addr_cache_build - Build a cache of I/O addresses
	277	*
	278	* Build a cache of pci i/o addresses. This cache will be used to
	279	* find the pci device that corresponds to a given address.
	280	* This routine scans all pci busses to build the cache.
	281	* Must be run late in boot process, after the pci controllers
d6e05edc	282	* have been scanned for devices (after all device resources are known).
5d5a0936 LV	283	*/
	284	void __init pci_addr_cache_build(void)
	285	{
	286	struct device_node *dn;
	287	struct pci_dev *dev = NULL;
	288
	289	spin_lock_init(&pci_io_addr_cache_root.piar_lock);
	290
6901c6cc	291	for_each_pci_dev(dev) {
5d5a0936 LV	292	pci_addr_cache_insert_device(dev);
5d5a0936 LV	293
5d5a0936	294	dn = pci_device_to_OF_node(dev);
ccba051c NL	295	if (!dn)
ccba051c NL	296	continue;
093eda3c	297	pci_dev_get(dev); /* matching put is in eeh_remove_device() */
821b537f	298	PCI_DN(dn)->pcidev = dev;
e1d04c97 LV	299
e1d04c97 LV	300	eeh_sysfs_add_device(dev);
5d5a0936 LV	301	}
	302
	303	#ifdef DEBUG
	304	/* Verify tree built up above, echo back the list of addrs. */
	305	pci_addr_cache_print(&pci_io_addr_cache_root);
	306	#endif
	307	}
	308