[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / udbg_16550.c

/*
 * udbg for for NS16550 compatable serial ports
 *
 * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 */
#include <linux/config.h>
#include <linux/types.h>
#include <asm/udbg.h>
#include <asm/io.h>

extern u8 real_readb(volatile u8 __iomem  *addr);
extern void real_writeb(u8 data, volatile u8 __iomem *addr);

struct NS16550 {
	/* this struct must be packed */
	unsigned char rbr;  /* 0 */
	unsigned char ier;  /* 1 */
	unsigned char fcr;  /* 2 */
	unsigned char lcr;  /* 3 */
	unsigned char mcr;  /* 4 */
	unsigned char lsr;  /* 5 */
	unsigned char msr;  /* 6 */
	unsigned char scr;  /* 7 */
};

#define thr rbr
#define iir fcr
#define dll rbr
#define dlm ier
#define dlab lcr

#define LSR_DR   0x01  /* Data ready */
#define LSR_OE   0x02  /* Overrun */
#define LSR_PE   0x04  /* Parity error */
#define LSR_FE   0x08  /* Framing error */
#define LSR_BI   0x10  /* Break */
#define LSR_THRE 0x20  /* Xmit holding register empty */
#define LSR_TEMT 0x40  /* Xmitter empty */
#define LSR_ERR  0x80  /* Error */

#define LCR_DLAB 0x80

static volatile struct NS16550 __iomem *udbg_comport;

static void udbg_550_putc(char c)
{
	if (udbg_comport) {
		while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
			/* wait for idle */;
		out_8(&udbg_comport->thr, c);
		if (c == '\n')
			udbg_550_putc('\r');
	}
}

static int udbg_550_getc_poll(void)
{
	if (udbg_comport) {
		if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
			return in_8(&udbg_comport->rbr);
		else
			return -1;
	}
	return -1;
}

static char udbg_550_getc(void)
{
	if (udbg_comport) {
		while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
			/* wait for char */;
		return in_8(&udbg_comport->rbr);
	}
	return 0;
}

void udbg_init_uart(void __iomem *comport, unsigned int speed,
		    unsigned int clock)
{
	unsigned int dll, base_bauds = clock / 16;

	if (speed == 0)
		speed = 9600;
	dll = base_bauds / speed;

	if (comport) {
		udbg_comport = (struct NS16550 __iomem *)comport;
		out_8(&udbg_comport->lcr, 0x00);
		out_8(&udbg_comport->ier, 0xff);
		out_8(&udbg_comport->ier, 0x00);
		out_8(&udbg_comport->lcr, LCR_DLAB);
		out_8(&udbg_comport->dll, dll & 0xff);
		out_8(&udbg_comport->dlm, dll >> 8);
		/* 8 data, 1 stop, no parity */
		out_8(&udbg_comport->lcr, 0x03);
		/* RTS/DTR */
		out_8(&udbg_comport->mcr, 0x03);
		/* Clear & enable FIFOs */
		out_8(&udbg_comport->fcr ,0x07);
		udbg_putc = udbg_550_putc;
		udbg_getc = udbg_550_getc;
		udbg_getc_poll = udbg_550_getc_poll;
	}
}

unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
{
	unsigned int dll, dlm, divisor, prescaler, speed;
	u8 old_lcr;
	volatile struct NS16550 __iomem *port = comport;

	old_lcr = in_8(&port->lcr);

	/* select divisor latch registers.  */
	out_8(&port->lcr, LCR_DLAB);

	/* now, read the divisor */
	dll = in_8(&port->dll);
	dlm = in_8(&port->dlm);
	divisor = dlm << 8 | dll;

	/* check prescaling */
	if (in_8(&port->mcr) & 0x80)
		prescaler = 4;
	else
		prescaler = 1;

	/* restore the LCR */
	out_8(&port->lcr, old_lcr);

	/* calculate speed */
	speed = (clock / prescaler) / (divisor * 16);

	/* sanity check */
	if (speed < 9600 || speed > 115200)
		speed = 9600;

	return speed;
}

#ifdef CONFIG_PPC_MAPLE
void udbg_maple_real_putc(unsigned char c)
{
	if (udbg_comport) {
		while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
			/* wait for idle */;
		real_writeb(c, &udbg_comport->thr); eieio();
		if (c == '\n')
			udbg_maple_real_putc('\r');
	}
}

void udbg_init_maple_realmode(void)
{
	udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;

	udbg_putc = udbg_maple_real_putc;
	udbg_getc = NULL;
	udbg_getc_poll = NULL;
}
#endif /* CONFIG_PPC_MAPLE */
Commit	Line	Data
7f853352 MM	1	/*
	2	* udbg for for NS16550 compatable serial ports
	3	*
	4	* Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version
	9	* 2 of the License, or (at your option) any later version.
	10	*/
	11	#include <linux/config.h>
	12	#include <linux/types.h>
188d2ce7	13	#include <asm/udbg.h>
7f853352	14	#include <asm/io.h>
7f853352 MM	15
	16	extern u8 real_readb(volatile u8 __iomem *addr);
	17	extern void real_writeb(u8 data, volatile u8 __iomem *addr);
	18
	19	struct NS16550 {
	20	/* this struct must be packed */
	21	unsigned char rbr; /* 0 */
	22	unsigned char ier; /* 1 */
	23	unsigned char fcr; /* 2 */
	24	unsigned char lcr; /* 3 */
	25	unsigned char mcr; /* 4 */
	26	unsigned char lsr; /* 5 */
	27	unsigned char msr; /* 6 */
	28	unsigned char scr; /* 7 */
	29	};
	30
	31	#define thr rbr
	32	#define iir fcr
	33	#define dll rbr
	34	#define dlm ier
	35	#define dlab lcr
	36
	37	#define LSR_DR 0x01 /* Data ready */
	38	#define LSR_OE 0x02 /* Overrun */
	39	#define LSR_PE 0x04 /* Parity error */
	40	#define LSR_FE 0x08 /* Framing error */
	41	#define LSR_BI 0x10 /* Break */
	42	#define LSR_THRE 0x20 /* Xmit holding register empty */
	43	#define LSR_TEMT 0x40 /* Xmitter empty */
	44	#define LSR_ERR 0x80 /* Error */
	45
463ce0e1 BH	46	#define LCR_DLAB 0x80
463ce0e1 BH	47
7f853352 MM	48	static volatile struct NS16550 __iomem *udbg_comport;
7f853352 MM	49
51d3082f	50	static void udbg_550_putc(char c)
7f853352 MM	51	{
	52	if (udbg_comport) {
	53	while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
	54	/* wait for idle */;
	55	out_8(&udbg_comport->thr, c);
	56	if (c == '\n')
	57	udbg_550_putc('\r');
	58	}
	59	}
	60
	61	static int udbg_550_getc_poll(void)
	62	{
	63	if (udbg_comport) {
	64	if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
	65	return in_8(&udbg_comport->rbr);
	66	else
	67	return -1;
	68	}
	69	return -1;
	70	}
	71
51d3082f	72	static char udbg_550_getc(void)
7f853352 MM	73	{
	74	if (udbg_comport) {
	75	while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
	76	/* wait for char */;
	77	return in_8(&udbg_comport->rbr);
	78	}
	79	return 0;
	80	}
	81
463ce0e1 BH	82	void udbg_init_uart(void __iomem *comport, unsigned int speed,
463ce0e1 BH	83	unsigned int clock)
7f853352	84	{
463ce0e1 BH	85	unsigned int dll, base_bauds = clock / 16;
	86
	87	if (speed == 0)
	88	speed = 9600;
	89	dll = base_bauds / speed;
7f853352 MM	90
	91	if (comport) {
	92	udbg_comport = (struct NS16550 __iomem *)comport;
	93	out_8(&udbg_comport->lcr, 0x00);
	94	out_8(&udbg_comport->ier, 0xff);
	95	out_8(&udbg_comport->ier, 0x00);
463ce0e1 BH	96	out_8(&udbg_comport->lcr, LCR_DLAB);
	97	out_8(&udbg_comport->dll, dll & 0xff);
	98	out_8(&udbg_comport->dlm, dll >> 8);
	99	/* 8 data, 1 stop, no parity */
	100	out_8(&udbg_comport->lcr, 0x03);
	101	/* RTS/DTR */
	102	out_8(&udbg_comport->mcr, 0x03);
	103	/* Clear & enable FIFOs */
	104	out_8(&udbg_comport->fcr ,0x07);
c8f1c8be MM	105	udbg_putc = udbg_550_putc;
	106	udbg_getc = udbg_550_getc;
	107	udbg_getc_poll = udbg_550_getc_poll;
7f853352 MM	108	}
	109	}
	110
463ce0e1 BH	111	unsigned int udbg_probe_uart_speed(void __iomem *comport, unsigned int clock)
	112	{
	113	unsigned int dll, dlm, divisor, prescaler, speed;
	114	u8 old_lcr;
	115	volatile struct NS16550 __iomem *port = comport;
	116
	117	old_lcr = in_8(&port->lcr);
	118
	119	/* select divisor latch registers. */
	120	out_8(&port->lcr, LCR_DLAB);
	121
	122	/* now, read the divisor */
	123	dll = in_8(&port->dll);
	124	dlm = in_8(&port->dlm);
	125	divisor = dlm << 8 \| dll;
	126
	127	/* check prescaling */
	128	if (in_8(&port->mcr) & 0x80)
	129	prescaler = 4;
	130	else
	131	prescaler = 1;
	132
	133	/* restore the LCR */
	134	out_8(&port->lcr, old_lcr);
	135
	136	/* calculate speed */
	137	speed = (clock / prescaler) / (divisor * 16);
	138
	139	/* sanity check */
	140	if (speed < 9600 \|\| speed > 115200)
	141	speed = 9600;
	142
	143	return speed;
	144	}
	145
7f853352 MM	146	#ifdef CONFIG_PPC_MAPLE
	147	void udbg_maple_real_putc(unsigned char c)
	148	{
	149	if (udbg_comport) {
	150	while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
	151	/* wait for idle */;
	152	real_writeb(c, &udbg_comport->thr); eieio();
	153	if (c == '\n')
	154	udbg_maple_real_putc('\r');
	155	}
	156	}
	157
	158	void udbg_init_maple_realmode(void)
	159	{
	160	udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;
	161
c8f1c8be MM	162	udbg_putc = udbg_maple_real_putc;
	163	udbg_getc = NULL;
	164	udbg_getc_poll = NULL;
7f853352 MM	165	}
7f853352 MM	166	#endif /* CONFIG_PPC_MAPLE */