signal: fix information leak in copy_siginfo_from_user32
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / powerpc / kernel / signal_32.c
CommitLineData
1da177e4 1/*
81e7009e 2 * Signal handling for 32bit PPC and 32bit tasks on 64bit PPC
1da177e4 3 *
81e7009e
SR
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
1da177e4
LT
6 * Copyright (C) 2001 IBM
7 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
9 *
81e7009e
SR
10 * Derived from "arch/i386/kernel/signal.c"
11 * Copyright (C) 1991, 1992 Linus Torvalds
12 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
1da177e4 13 *
81e7009e
SR
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
1da177e4
LT
18 */
19
1da177e4 20#include <linux/sched.h>
81e7009e 21#include <linux/mm.h>
1da177e4 22#include <linux/smp.h>
1da177e4
LT
23#include <linux/kernel.h>
24#include <linux/signal.h>
1da177e4
LT
25#include <linux/errno.h>
26#include <linux/elf.h>
05ead015 27#include <linux/ptrace.h>
76462232 28#include <linux/ratelimit.h>
81e7009e
SR
29#ifdef CONFIG_PPC64
30#include <linux/syscalls.h>
1da177e4 31#include <linux/compat.h>
81e7009e
SR
32#else
33#include <linux/wait.h>
81e7009e
SR
34#include <linux/unistd.h>
35#include <linux/stddef.h>
36#include <linux/tty.h>
37#include <linux/binfmts.h>
81e7009e
SR
38#endif
39
1da177e4 40#include <asm/uaccess.h>
81e7009e 41#include <asm/cacheflush.h>
a7f31841 42#include <asm/syscalls.h>
c5ff7001 43#include <asm/sigcontext.h>
a7f290da 44#include <asm/vdso.h>
ae3a197e 45#include <asm/switch_to.h>
2b0a576d 46#include <asm/tm.h>
81e7009e 47#ifdef CONFIG_PPC64
879168ee 48#include "ppc32.h"
1da177e4 49#include <asm/unistd.h>
81e7009e
SR
50#else
51#include <asm/ucontext.h>
52#include <asm/pgtable.h>
53#endif
1da177e4 54
22e38f29
BH
55#include "signal.h"
56
81e7009e 57#undef DEBUG_SIG
1da177e4 58
81e7009e 59#ifdef CONFIG_PPC64
b09a4913 60#define sys_rt_sigreturn compat_sys_rt_sigreturn
b09a4913
SR
61#define sys_swapcontext compat_sys_swapcontext
62#define sys_sigreturn compat_sys_sigreturn
81e7009e
SR
63
64#define old_sigaction old_sigaction32
65#define sigcontext sigcontext32
66#define mcontext mcontext32
67#define ucontext ucontext32
68
7cce2465
AV
69#define __save_altstack __compat_save_altstack
70
c1cb299e
MN
71/*
72 * Userspace code may pass a ucontext which doesn't include VSX added
73 * at the end. We need to check for this case.
74 */
75#define UCONTEXTSIZEWITHOUTVSX \
76 (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
77
81e7009e
SR
78/*
79 * Returning 0 means we return to userspace via
80 * ret_from_except and thus restore all user
81 * registers from *regs. This is what we need
82 * to do when a signal has been delivered.
83 */
81e7009e
SR
84
85#define GP_REGS_SIZE min(sizeof(elf_gregset_t32), sizeof(struct pt_regs32))
86#undef __SIGNAL_FRAMESIZE
87#define __SIGNAL_FRAMESIZE __SIGNAL_FRAMESIZE32
88#undef ELF_NVRREG
89#define ELF_NVRREG ELF_NVRREG32
90
91/*
92 * Functions for flipping sigsets (thanks to brain dead generic
93 * implementation that makes things simple for little endian only)
94 */
95static inline int put_sigset_t(compat_sigset_t __user *uset, sigset_t *set)
96{
97 compat_sigset_t cset;
98
99 switch (_NSIG_WORDS) {
a313f4c5 100 case 4: cset.sig[6] = set->sig[3] & 0xffffffffull;
81e7009e
SR
101 cset.sig[7] = set->sig[3] >> 32;
102 case 3: cset.sig[4] = set->sig[2] & 0xffffffffull;
103 cset.sig[5] = set->sig[2] >> 32;
104 case 2: cset.sig[2] = set->sig[1] & 0xffffffffull;
105 cset.sig[3] = set->sig[1] >> 32;
106 case 1: cset.sig[0] = set->sig[0] & 0xffffffffull;
107 cset.sig[1] = set->sig[0] >> 32;
108 }
109 return copy_to_user(uset, &cset, sizeof(*uset));
110}
111
9b7cf8b4
PM
112static inline int get_sigset_t(sigset_t *set,
113 const compat_sigset_t __user *uset)
81e7009e
SR
114{
115 compat_sigset_t s32;
116
117 if (copy_from_user(&s32, uset, sizeof(*uset)))
118 return -EFAULT;
119
120 /*
121 * Swap the 2 words of the 64-bit sigset_t (they are stored
122 * in the "wrong" endian in 32-bit user storage).
123 */
124 switch (_NSIG_WORDS) {
125 case 4: set->sig[3] = s32.sig[6] | (((long)s32.sig[7]) << 32);
126 case 3: set->sig[2] = s32.sig[4] | (((long)s32.sig[5]) << 32);
127 case 2: set->sig[1] = s32.sig[2] | (((long)s32.sig[3]) << 32);
128 case 1: set->sig[0] = s32.sig[0] | (((long)s32.sig[1]) << 32);
129 }
130 return 0;
131}
132
29e646df 133#define to_user_ptr(p) ptr_to_compat(p)
81e7009e
SR
134#define from_user_ptr(p) compat_ptr(p)
135
136static inline int save_general_regs(struct pt_regs *regs,
137 struct mcontext __user *frame)
138{
139 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
140 int i;
141
1bd79336 142 WARN_ON(!FULL_REGS(regs));
401d1f02
DW
143
144 for (i = 0; i <= PT_RESULT; i ++) {
145 if (i == 14 && !FULL_REGS(regs))
146 i = 32;
81e7009e
SR
147 if (__put_user((unsigned int)gregs[i], &frame->mc_gregs[i]))
148 return -EFAULT;
401d1f02 149 }
81e7009e
SR
150 return 0;
151}
152
153static inline int restore_general_regs(struct pt_regs *regs,
154 struct mcontext __user *sr)
155{
156 elf_greg_t64 *gregs = (elf_greg_t64 *)regs;
157 int i;
158
159 for (i = 0; i <= PT_RESULT; i++) {
160 if ((i == PT_MSR) || (i == PT_SOFTE))
161 continue;
162 if (__get_user(gregs[i], &sr->mc_gregs[i]))
163 return -EFAULT;
164 }
165 return 0;
166}
167
168#else /* CONFIG_PPC64 */
169
81e7009e
SR
170#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
171
172static inline int put_sigset_t(sigset_t __user *uset, sigset_t *set)
173{
174 return copy_to_user(uset, set, sizeof(*uset));
175}
176
9b7cf8b4 177static inline int get_sigset_t(sigset_t *set, const sigset_t __user *uset)
81e7009e
SR
178{
179 return copy_from_user(set, uset, sizeof(*uset));
180}
181
29e646df
AV
182#define to_user_ptr(p) ((unsigned long)(p))
183#define from_user_ptr(p) ((void __user *)(p))
81e7009e
SR
184
185static inline int save_general_regs(struct pt_regs *regs,
186 struct mcontext __user *frame)
187{
1bd79336 188 WARN_ON(!FULL_REGS(regs));
81e7009e
SR
189 return __copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE);
190}
191
192static inline int restore_general_regs(struct pt_regs *regs,
193 struct mcontext __user *sr)
194{
195 /* copy up to but not including MSR */
196 if (__copy_from_user(regs, &sr->mc_gregs,
197 PT_MSR * sizeof(elf_greg_t)))
198 return -EFAULT;
199 /* copy from orig_r3 (the word after the MSR) up to the end */
200 if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
201 GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
202 return -EFAULT;
203 return 0;
204}
81e7009e
SR
205#endif
206
1da177e4
LT
207/*
208 * When we have signals to deliver, we set up on the
209 * user stack, going down from the original stack pointer:
a3f61dc0
BH
210 * an ABI gap of 56 words
211 * an mcontext struct
81e7009e
SR
212 * a sigcontext struct
213 * a gap of __SIGNAL_FRAMESIZE bytes
1da177e4 214 *
a3f61dc0
BH
215 * Each of these things must be a multiple of 16 bytes in size. The following
216 * structure represent all of this except the __SIGNAL_FRAMESIZE gap
1da177e4
LT
217 *
218 */
a3f61dc0
BH
219struct sigframe {
220 struct sigcontext sctx; /* the sigcontext */
81e7009e 221 struct mcontext mctx; /* all the register values */
2b0a576d
MN
222#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
223 struct sigcontext sctx_transact;
224 struct mcontext mctx_transact;
225#endif
1da177e4
LT
226 /*
227 * Programs using the rs6000/xcoff abi can save up to 19 gp
228 * regs and 18 fp regs below sp before decrementing it.
229 */
230 int abigap[56];
231};
232
233/* We use the mc_pad field for the signal return trampoline. */
234#define tramp mc_pad
235
236/*
237 * When we have rt signals to deliver, we set up on the
238 * user stack, going down from the original stack pointer:
81e7009e
SR
239 * one rt_sigframe struct (siginfo + ucontext + ABI gap)
240 * a gap of __SIGNAL_FRAMESIZE+16 bytes
241 * (the +16 is to get the siginfo and ucontext in the same
1da177e4
LT
242 * positions as in older kernels).
243 *
244 * Each of these things must be a multiple of 16 bytes in size.
245 *
246 */
81e7009e
SR
247struct rt_sigframe {
248#ifdef CONFIG_PPC64
249 compat_siginfo_t info;
250#else
251 struct siginfo info;
252#endif
253 struct ucontext uc;
2b0a576d
MN
254#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
255 struct ucontext uc_transact;
256#endif
1da177e4
LT
257 /*
258 * Programs using the rs6000/xcoff abi can save up to 19 gp
259 * regs and 18 fp regs below sp before decrementing it.
260 */
261 int abigap[56];
262};
263
6a274c08
MN
264#ifdef CONFIG_VSX
265unsigned long copy_fpr_to_user(void __user *to,
266 struct task_struct *task)
267{
268 double buf[ELF_NFPREG];
269 int i;
270
271 /* save FPR copy to local buffer then write to the thread_struct */
272 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
273 buf[i] = task->thread.TS_FPR(i);
274 memcpy(&buf[i], &task->thread.fpscr, sizeof(double));
275 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
276}
277
278unsigned long copy_fpr_from_user(struct task_struct *task,
279 void __user *from)
280{
281 double buf[ELF_NFPREG];
282 int i;
283
284 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
285 return 1;
286 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
287 task->thread.TS_FPR(i) = buf[i];
288 memcpy(&task->thread.fpscr, &buf[i], sizeof(double));
289
290 return 0;
291}
292
293unsigned long copy_vsx_to_user(void __user *to,
294 struct task_struct *task)
295{
296 double buf[ELF_NVSRHALFREG];
297 int i;
298
299 /* save FPR copy to local buffer then write to the thread_struct */
300 for (i = 0; i < ELF_NVSRHALFREG; i++)
301 buf[i] = task->thread.fpr[i][TS_VSRLOWOFFSET];
302 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
303}
304
305unsigned long copy_vsx_from_user(struct task_struct *task,
306 void __user *from)
307{
308 double buf[ELF_NVSRHALFREG];
309 int i;
310
311 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
312 return 1;
313 for (i = 0; i < ELF_NVSRHALFREG ; i++)
314 task->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
315 return 0;
316}
2b0a576d
MN
317
318#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
319unsigned long copy_transact_fpr_to_user(void __user *to,
320 struct task_struct *task)
321{
322 double buf[ELF_NFPREG];
323 int i;
324
325 /* save FPR copy to local buffer then write to the thread_struct */
326 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
327 buf[i] = task->thread.TS_TRANS_FPR(i);
328 memcpy(&buf[i], &task->thread.transact_fpscr, sizeof(double));
329 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
330}
331
332unsigned long copy_transact_fpr_from_user(struct task_struct *task,
333 void __user *from)
334{
335 double buf[ELF_NFPREG];
336 int i;
337
338 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
339 return 1;
340 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
341 task->thread.TS_TRANS_FPR(i) = buf[i];
342 memcpy(&task->thread.transact_fpscr, &buf[i], sizeof(double));
343
344 return 0;
345}
346
347unsigned long copy_transact_vsx_to_user(void __user *to,
348 struct task_struct *task)
349{
350 double buf[ELF_NVSRHALFREG];
351 int i;
352
353 /* save FPR copy to local buffer then write to the thread_struct */
354 for (i = 0; i < ELF_NVSRHALFREG; i++)
355 buf[i] = task->thread.transact_fpr[i][TS_VSRLOWOFFSET];
356 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
357}
358
359unsigned long copy_transact_vsx_from_user(struct task_struct *task,
360 void __user *from)
361{
362 double buf[ELF_NVSRHALFREG];
363 int i;
364
365 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
366 return 1;
367 for (i = 0; i < ELF_NVSRHALFREG ; i++)
368 task->thread.transact_fpr[i][TS_VSRLOWOFFSET] = buf[i];
369 return 0;
370}
371#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
372#else
373inline unsigned long copy_fpr_to_user(void __user *to,
374 struct task_struct *task)
375{
376 return __copy_to_user(to, task->thread.fpr,
377 ELF_NFPREG * sizeof(double));
378}
379
380inline unsigned long copy_fpr_from_user(struct task_struct *task,
381 void __user *from)
382{
383 return __copy_from_user(task->thread.fpr, from,
384 ELF_NFPREG * sizeof(double));
385}
2b0a576d
MN
386
387#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
388inline unsigned long copy_transact_fpr_to_user(void __user *to,
389 struct task_struct *task)
390{
391 return __copy_to_user(to, task->thread.transact_fpr,
392 ELF_NFPREG * sizeof(double));
393}
394
395inline unsigned long copy_transact_fpr_from_user(struct task_struct *task,
396 void __user *from)
397{
398 return __copy_from_user(task->thread.transact_fpr, from,
399 ELF_NFPREG * sizeof(double));
400}
401#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
6a274c08
MN
402#endif
403
1da177e4
LT
404/*
405 * Save the current user registers on the user stack.
81e7009e
SR
406 * We only save the altivec/spe registers if the process has used
407 * altivec/spe instructions at some point.
1da177e4 408 */
81e7009e 409static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
d6ea4422
MN
410 struct mcontext __user *tm_frame, int sigret,
411 int ctx_has_vsx_region)
1da177e4 412{
9e751186
MN
413 unsigned long msr = regs->msr;
414
1da177e4
LT
415 /* Make sure floating point registers are stored in regs */
416 flush_fp_to_thread(current);
417
c6e6771b
MN
418 /* save general registers */
419 if (save_general_regs(regs, frame))
1da177e4
LT
420 return 1;
421
1da177e4
LT
422#ifdef CONFIG_ALTIVEC
423 /* save altivec registers */
424 if (current->thread.used_vr) {
425 flush_altivec_to_thread(current);
426 if (__copy_to_user(&frame->mc_vregs, current->thread.vr,
81e7009e 427 ELF_NVRREG * sizeof(vector128)))
1da177e4
LT
428 return 1;
429 /* set MSR_VEC in the saved MSR value to indicate that
430 frame->mc_vregs contains valid data */
9e751186 431 msr |= MSR_VEC;
1da177e4
LT
432 }
433 /* else assert((regs->msr & MSR_VEC) == 0) */
434
435 /* We always copy to/from vrsave, it's 0 if we don't have or don't
436 * use altivec. Since VSCR only contains 32 bits saved in the least
437 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
438 * most significant bits of that same vector. --BenH
439 */
440 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
441 return 1;
442#endif /* CONFIG_ALTIVEC */
6a274c08 443 if (copy_fpr_to_user(&frame->mc_fregs, current))
c6e6771b 444 return 1;
8e731405
MN
445
446 /*
447 * Clear the MSR VSX bit to indicate there is no valid state attached
448 * to this context, except in the specific case below where we set it.
449 */
450 msr &= ~MSR_VSX;
6a274c08 451#ifdef CONFIG_VSX
ce48b210
MN
452 /*
453 * Copy VSR 0-31 upper half from thread_struct to local
454 * buffer, then write that to userspace. Also set MSR_VSX in
455 * the saved MSR value to indicate that frame->mc_vregs
456 * contains valid data
457 */
16c29d18 458 if (current->thread.used_vsr && ctx_has_vsx_region) {
7c292170 459 __giveup_vsx(current);
6a274c08 460 if (copy_vsx_to_user(&frame->mc_vsregs, current))
ce48b210
MN
461 return 1;
462 msr |= MSR_VSX;
8e731405 463 }
c6e6771b 464#endif /* CONFIG_VSX */
81e7009e
SR
465#ifdef CONFIG_SPE
466 /* save spe registers */
467 if (current->thread.used_spe) {
468 flush_spe_to_thread(current);
469 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
470 ELF_NEVRREG * sizeof(u32)))
471 return 1;
472 /* set MSR_SPE in the saved MSR value to indicate that
473 frame->mc_vregs contains valid data */
9e751186 474 msr |= MSR_SPE;
81e7009e
SR
475 }
476 /* else assert((regs->msr & MSR_SPE) == 0) */
477
478 /* We always copy to/from spefscr */
479 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
480 return 1;
481#endif /* CONFIG_SPE */
482
9e751186
MN
483 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
484 return 1;
d6ea4422
MN
485 /* We need to write 0 the MSR top 32 bits in the tm frame so that we
486 * can check it on the restore to see if TM is active
487 */
488 if (tm_frame && __put_user(0, &tm_frame->mc_gregs[PT_MSR]))
489 return 1;
490
1da177e4
LT
491 if (sigret) {
492 /* Set up the sigreturn trampoline: li r0,sigret; sc */
493 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
494 || __put_user(0x44000002UL, &frame->tramp[1]))
495 return 1;
496 flush_icache_range((unsigned long) &frame->tramp[0],
497 (unsigned long) &frame->tramp[2]);
498 }
499
500 return 0;
501}
502
2b0a576d
MN
503#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
504/*
505 * Save the current user registers on the user stack.
506 * We only save the altivec/spe registers if the process has used
507 * altivec/spe instructions at some point.
508 * We also save the transactional registers to a second ucontext in the
509 * frame.
510 *
511 * See save_user_regs() and signal_64.c:setup_tm_sigcontexts().
512 */
513static int save_tm_user_regs(struct pt_regs *regs,
514 struct mcontext __user *frame,
515 struct mcontext __user *tm_frame, int sigret)
516{
517 unsigned long msr = regs->msr;
518
2b0a576d
MN
519 /* Make sure floating point registers are stored in regs */
520 flush_fp_to_thread(current);
521
522 /* Save both sets of general registers */
523 if (save_general_regs(&current->thread.ckpt_regs, frame)
524 || save_general_regs(regs, tm_frame))
525 return 1;
526
527 /* Stash the top half of the 64bit MSR into the 32bit MSR word
528 * of the transactional mcontext. This way we have a backward-compatible
529 * MSR in the 'normal' (checkpointed) mcontext and additionally one can
530 * also look at what type of transaction (T or S) was active at the
531 * time of the signal.
532 */
533 if (__put_user((msr >> 32), &tm_frame->mc_gregs[PT_MSR]))
534 return 1;
535
536#ifdef CONFIG_ALTIVEC
537 /* save altivec registers */
538 if (current->thread.used_vr) {
539 flush_altivec_to_thread(current);
540 if (__copy_to_user(&frame->mc_vregs, current->thread.vr,
541 ELF_NVRREG * sizeof(vector128)))
542 return 1;
543 if (msr & MSR_VEC) {
544 if (__copy_to_user(&tm_frame->mc_vregs,
545 current->thread.transact_vr,
546 ELF_NVRREG * sizeof(vector128)))
547 return 1;
548 } else {
549 if (__copy_to_user(&tm_frame->mc_vregs,
550 current->thread.vr,
551 ELF_NVRREG * sizeof(vector128)))
552 return 1;
553 }
554
555 /* set MSR_VEC in the saved MSR value to indicate that
556 * frame->mc_vregs contains valid data
557 */
558 msr |= MSR_VEC;
559 }
560
561 /* We always copy to/from vrsave, it's 0 if we don't have or don't
562 * use altivec. Since VSCR only contains 32 bits saved in the least
563 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
564 * most significant bits of that same vector. --BenH
565 */
566 if (__put_user(current->thread.vrsave,
567 (u32 __user *)&frame->mc_vregs[32]))
568 return 1;
569 if (msr & MSR_VEC) {
570 if (__put_user(current->thread.transact_vrsave,
571 (u32 __user *)&tm_frame->mc_vregs[32]))
572 return 1;
573 } else {
574 if (__put_user(current->thread.vrsave,
575 (u32 __user *)&tm_frame->mc_vregs[32]))
576 return 1;
577 }
578#endif /* CONFIG_ALTIVEC */
579
580 if (copy_fpr_to_user(&frame->mc_fregs, current))
581 return 1;
582 if (msr & MSR_FP) {
583 if (copy_transact_fpr_to_user(&tm_frame->mc_fregs, current))
584 return 1;
585 } else {
586 if (copy_fpr_to_user(&tm_frame->mc_fregs, current))
587 return 1;
588 }
589
590#ifdef CONFIG_VSX
591 /*
592 * Copy VSR 0-31 upper half from thread_struct to local
593 * buffer, then write that to userspace. Also set MSR_VSX in
594 * the saved MSR value to indicate that frame->mc_vregs
595 * contains valid data
596 */
597 if (current->thread.used_vsr) {
598 __giveup_vsx(current);
599 if (copy_vsx_to_user(&frame->mc_vsregs, current))
600 return 1;
601 if (msr & MSR_VSX) {
602 if (copy_transact_vsx_to_user(&tm_frame->mc_vsregs,
603 current))
604 return 1;
605 } else {
606 if (copy_vsx_to_user(&tm_frame->mc_vsregs, current))
607 return 1;
608 }
609
610 msr |= MSR_VSX;
611 }
612#endif /* CONFIG_VSX */
613#ifdef CONFIG_SPE
614 /* SPE regs are not checkpointed with TM, so this section is
615 * simply the same as in save_user_regs().
616 */
617 if (current->thread.used_spe) {
618 flush_spe_to_thread(current);
619 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
620 ELF_NEVRREG * sizeof(u32)))
621 return 1;
622 /* set MSR_SPE in the saved MSR value to indicate that
623 * frame->mc_vregs contains valid data */
624 msr |= MSR_SPE;
625 }
626
627 /* We always copy to/from spefscr */
628 if (__put_user(current->thread.spefscr, (u32 __user *)&frame->mc_vregs + ELF_NEVRREG))
629 return 1;
630#endif /* CONFIG_SPE */
631
632 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
633 return 1;
634 if (sigret) {
635 /* Set up the sigreturn trampoline: li r0,sigret; sc */
636 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
637 || __put_user(0x44000002UL, &frame->tramp[1]))
638 return 1;
639 flush_icache_range((unsigned long) &frame->tramp[0],
640 (unsigned long) &frame->tramp[2]);
641 }
642
643 return 0;
644}
645#endif
646
1da177e4
LT
647/*
648 * Restore the current user register values from the user stack,
649 * (except for MSR).
650 */
651static long restore_user_regs(struct pt_regs *regs,
81e7009e 652 struct mcontext __user *sr, int sig)
1da177e4 653{
81e7009e 654 long err;
1da177e4 655 unsigned int save_r2 = 0;
1da177e4 656 unsigned long msr;
c6e6771b 657#ifdef CONFIG_VSX
c6e6771b
MN
658 int i;
659#endif
1da177e4
LT
660
661 /*
662 * restore general registers but not including MSR or SOFTE. Also
663 * take care of keeping r2 (TLS) intact if not a signal
664 */
665 if (!sig)
666 save_r2 = (unsigned int)regs->gpr[2];
81e7009e 667 err = restore_general_regs(regs, sr);
9a81c16b 668 regs->trap = 0;
fab5db97 669 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
1da177e4
LT
670 if (!sig)
671 regs->gpr[2] = (unsigned long) save_r2;
672 if (err)
673 return 1;
674
fab5db97
PM
675 /* if doing signal return, restore the previous little-endian mode */
676 if (sig)
677 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
678
5388fb10
PM
679 /*
680 * Do this before updating the thread state in
681 * current->thread.fpr/vr/evr. That way, if we get preempted
682 * and another task grabs the FPU/Altivec/SPE, it won't be
683 * tempted to save the current CPU state into the thread_struct
684 * and corrupt what we are writing there.
685 */
686 discard_lazy_cpu_state();
687
1da177e4 688#ifdef CONFIG_ALTIVEC
c6e6771b
MN
689 /*
690 * Force the process to reload the altivec registers from
691 * current->thread when it next does altivec instructions
692 */
1da177e4 693 regs->msr &= ~MSR_VEC;
fab5db97 694 if (msr & MSR_VEC) {
1da177e4
LT
695 /* restore altivec registers from the stack */
696 if (__copy_from_user(current->thread.vr, &sr->mc_vregs,
697 sizeof(sr->mc_vregs)))
698 return 1;
699 } else if (current->thread.used_vr)
81e7009e 700 memset(current->thread.vr, 0, ELF_NVRREG * sizeof(vector128));
1da177e4
LT
701
702 /* Always get VRSAVE back */
703 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
704 return 1;
705#endif /* CONFIG_ALTIVEC */
6a274c08
MN
706 if (copy_fpr_from_user(current, &sr->mc_fregs))
707 return 1;
1da177e4 708
c6e6771b 709#ifdef CONFIG_VSX
ce48b210
MN
710 /*
711 * Force the process to reload the VSX registers from
712 * current->thread when it next does VSX instruction.
713 */
714 regs->msr &= ~MSR_VSX;
715 if (msr & MSR_VSX) {
716 /*
717 * Restore altivec registers from the stack to a local
718 * buffer, then write this out to the thread_struct
719 */
6a274c08 720 if (copy_vsx_from_user(current, &sr->mc_vsregs))
ce48b210 721 return 1;
ce48b210
MN
722 } else if (current->thread.used_vsr)
723 for (i = 0; i < 32 ; i++)
724 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
c6e6771b
MN
725#endif /* CONFIG_VSX */
726 /*
727 * force the process to reload the FP registers from
728 * current->thread when it next does FP instructions
729 */
730 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
731
81e7009e
SR
732#ifdef CONFIG_SPE
733 /* force the process to reload the spe registers from
734 current->thread when it next does spe instructions */
735 regs->msr &= ~MSR_SPE;
fab5db97 736 if (msr & MSR_SPE) {
81e7009e
SR
737 /* restore spe registers from the stack */
738 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
739 ELF_NEVRREG * sizeof(u32)))
740 return 1;
741 } else if (current->thread.used_spe)
742 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
743
744 /* Always get SPEFSCR back */
745 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs + ELF_NEVRREG))
746 return 1;
747#endif /* CONFIG_SPE */
748
1da177e4
LT
749 return 0;
750}
751
2b0a576d
MN
752#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
753/*
754 * Restore the current user register values from the user stack, except for
755 * MSR, and recheckpoint the original checkpointed register state for processes
756 * in transactions.
757 */
758static long restore_tm_user_regs(struct pt_regs *regs,
759 struct mcontext __user *sr,
760 struct mcontext __user *tm_sr)
761{
762 long err;
bc8ae522 763 unsigned long msr, msr_hi;
2b0a576d
MN
764#ifdef CONFIG_VSX
765 int i;
766#endif
767
768 /*
769 * restore general registers but not including MSR or SOFTE. Also
770 * take care of keeping r2 (TLS) intact if not a signal.
771 * See comment in signal_64.c:restore_tm_sigcontexts();
772 * TFHAR is restored from the checkpointed NIP; TEXASR and TFIAR
773 * were set by the signal delivery.
774 */
775 err = restore_general_regs(regs, tm_sr);
776 err |= restore_general_regs(&current->thread.ckpt_regs, sr);
777
778 err |= __get_user(current->thread.tm_tfhar, &sr->mc_gregs[PT_NIP]);
779
780 err |= __get_user(msr, &sr->mc_gregs[PT_MSR]);
781 if (err)
782 return 1;
783
784 /* Restore the previous little-endian mode */
785 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
786
787 /*
788 * Do this before updating the thread state in
789 * current->thread.fpr/vr/evr. That way, if we get preempted
790 * and another task grabs the FPU/Altivec/SPE, it won't be
791 * tempted to save the current CPU state into the thread_struct
792 * and corrupt what we are writing there.
793 */
794 discard_lazy_cpu_state();
795
796#ifdef CONFIG_ALTIVEC
797 regs->msr &= ~MSR_VEC;
798 if (msr & MSR_VEC) {
799 /* restore altivec registers from the stack */
800 if (__copy_from_user(current->thread.vr, &sr->mc_vregs,
801 sizeof(sr->mc_vregs)) ||
802 __copy_from_user(current->thread.transact_vr,
803 &tm_sr->mc_vregs,
804 sizeof(sr->mc_vregs)))
805 return 1;
806 } else if (current->thread.used_vr) {
807 memset(current->thread.vr, 0, ELF_NVRREG * sizeof(vector128));
808 memset(current->thread.transact_vr, 0,
809 ELF_NVRREG * sizeof(vector128));
810 }
811
812 /* Always get VRSAVE back */
813 if (__get_user(current->thread.vrsave,
814 (u32 __user *)&sr->mc_vregs[32]) ||
815 __get_user(current->thread.transact_vrsave,
816 (u32 __user *)&tm_sr->mc_vregs[32]))
817 return 1;
818#endif /* CONFIG_ALTIVEC */
819
820 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
821
822 if (copy_fpr_from_user(current, &sr->mc_fregs) ||
823 copy_transact_fpr_from_user(current, &tm_sr->mc_fregs))
824 return 1;
825
826#ifdef CONFIG_VSX
827 regs->msr &= ~MSR_VSX;
828 if (msr & MSR_VSX) {
829 /*
830 * Restore altivec registers from the stack to a local
831 * buffer, then write this out to the thread_struct
832 */
833 if (copy_vsx_from_user(current, &sr->mc_vsregs) ||
834 copy_transact_vsx_from_user(current, &tm_sr->mc_vsregs))
835 return 1;
836 } else if (current->thread.used_vsr)
837 for (i = 0; i < 32 ; i++) {
838 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
839 current->thread.transact_fpr[i][TS_VSRLOWOFFSET] = 0;
840 }
841#endif /* CONFIG_VSX */
842
843#ifdef CONFIG_SPE
844 /* SPE regs are not checkpointed with TM, so this section is
845 * simply the same as in restore_user_regs().
846 */
847 regs->msr &= ~MSR_SPE;
848 if (msr & MSR_SPE) {
849 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
850 ELF_NEVRREG * sizeof(u32)))
851 return 1;
852 } else if (current->thread.used_spe)
853 memset(current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
854
855 /* Always get SPEFSCR back */
856 if (__get_user(current->thread.spefscr, (u32 __user *)&sr->mc_vregs
857 + ELF_NEVRREG))
858 return 1;
859#endif /* CONFIG_SPE */
860
861 /* Now, recheckpoint. This loads up all of the checkpointed (older)
862 * registers, including FP and V[S]Rs. After recheckpointing, the
863 * transactional versions should be loaded.
864 */
865 tm_enable();
b2b708cf
MN
866 /* Make sure the transaction is marked as failed */
867 current->thread.tm_texasr |= TEXASR_FS;
2b0a576d
MN
868 /* This loads the checkpointed FP/VEC state, if used */
869 tm_recheckpoint(&current->thread, msr);
bc8ae522
MN
870 /* Get the top half of the MSR */
871 if (__get_user(msr_hi, &tm_sr->mc_gregs[PT_MSR]))
872 return 1;
873 /* Pull in MSR TM from user context */
874 regs->msr = (regs->msr & ~MSR_TS_MASK) | ((msr_hi<<32) & MSR_TS_MASK);
2b0a576d
MN
875
876 /* This loads the speculative FP/VEC state, if used */
877 if (msr & MSR_FP) {
878 do_load_up_transact_fpu(&current->thread);
879 regs->msr |= (MSR_FP | current->thread.fpexc_mode);
880 }
f110c0c1 881#ifdef CONFIG_ALTIVEC
2b0a576d
MN
882 if (msr & MSR_VEC) {
883 do_load_up_transact_altivec(&current->thread);
884 regs->msr |= MSR_VEC;
885 }
f110c0c1 886#endif
2b0a576d
MN
887
888 return 0;
889}
890#endif
891
81e7009e 892#ifdef CONFIG_PPC64
1da177e4
LT
893int copy_siginfo_to_user32(struct compat_siginfo __user *d, siginfo_t *s)
894{
895 int err;
896
897 if (!access_ok (VERIFY_WRITE, d, sizeof(*d)))
898 return -EFAULT;
899
900 /* If you change siginfo_t structure, please be sure
901 * this code is fixed accordingly.
902 * It should never copy any pad contained in the structure
903 * to avoid security leaks, but must copy the generic
904 * 3 ints plus the relevant union member.
905 * This routine must convert siginfo from 64bit to 32bit as well
906 * at the same time.
907 */
908 err = __put_user(s->si_signo, &d->si_signo);
909 err |= __put_user(s->si_errno, &d->si_errno);
910 err |= __put_user((short)s->si_code, &d->si_code);
911 if (s->si_code < 0)
912 err |= __copy_to_user(&d->_sifields._pad, &s->_sifields._pad,
913 SI_PAD_SIZE32);
914 else switch(s->si_code >> 16) {
915 case __SI_CHLD >> 16:
916 err |= __put_user(s->si_pid, &d->si_pid);
917 err |= __put_user(s->si_uid, &d->si_uid);
918 err |= __put_user(s->si_utime, &d->si_utime);
919 err |= __put_user(s->si_stime, &d->si_stime);
920 err |= __put_user(s->si_status, &d->si_status);
921 break;
922 case __SI_FAULT >> 16:
923 err |= __put_user((unsigned int)(unsigned long)s->si_addr,
924 &d->si_addr);
925 break;
926 case __SI_POLL >> 16:
927 err |= __put_user(s->si_band, &d->si_band);
928 err |= __put_user(s->si_fd, &d->si_fd);
929 break;
930 case __SI_TIMER >> 16:
931 err |= __put_user(s->si_tid, &d->si_tid);
932 err |= __put_user(s->si_overrun, &d->si_overrun);
933 err |= __put_user(s->si_int, &d->si_int);
934 break;
935 case __SI_RT >> 16: /* This is not generated by the kernel as of now. */
936 case __SI_MESGQ >> 16:
937 err |= __put_user(s->si_int, &d->si_int);
938 /* fallthrough */
939 case __SI_KILL >> 16:
940 default:
941 err |= __put_user(s->si_pid, &d->si_pid);
942 err |= __put_user(s->si_uid, &d->si_uid);
943 break;
944 }
945 return err;
946}
947
81e7009e
SR
948#define copy_siginfo_to_user copy_siginfo_to_user32
949
9c0c44db
RM
950int copy_siginfo_from_user32(siginfo_t *to, struct compat_siginfo __user *from)
951{
9c0c44db
RM
952 if (copy_from_user(to, from, 3*sizeof(int)) ||
953 copy_from_user(to->_sifields._pad,
954 from->_sifields._pad, SI_PAD_SIZE32))
955 return -EFAULT;
956
957 return 0;
958}
81e7009e 959#endif /* CONFIG_PPC64 */
1da177e4 960
1da177e4
LT
961/*
962 * Set up a signal frame for a "real-time" signal handler
963 * (one which gets siginfo).
964 */
f478f543 965int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
81e7009e 966 siginfo_t *info, sigset_t *oldset,
a3f61dc0 967 struct pt_regs *regs)
1da177e4 968{
81e7009e
SR
969 struct rt_sigframe __user *rt_sf;
970 struct mcontext __user *frame;
d6ea4422 971 struct mcontext __user *tm_frame = NULL;
d0c3d534 972 void __user *addr;
a3f61dc0 973 unsigned long newsp = 0;
2b0a576d
MN
974 int sigret;
975 unsigned long tramp;
1da177e4
LT
976
977 /* Set up Signal Frame */
978 /* Put a Real Time Context onto stack */
2b3f8e87 979 rt_sf = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*rt_sf), 1);
d0c3d534 980 addr = rt_sf;
a3f61dc0 981 if (unlikely(rt_sf == NULL))
1da177e4
LT
982 goto badframe;
983
1da177e4 984 /* Put the siginfo & fill in most of the ucontext */
81e7009e 985 if (copy_siginfo_to_user(&rt_sf->info, info)
1da177e4 986 || __put_user(0, &rt_sf->uc.uc_flags)
7cce2465 987 || __save_altstack(&rt_sf->uc.uc_stack, regs->gpr[1])
81e7009e
SR
988 || __put_user(to_user_ptr(&rt_sf->uc.uc_mcontext),
989 &rt_sf->uc.uc_regs)
990 || put_sigset_t(&rt_sf->uc.uc_sigmask, oldset))
1da177e4
LT
991 goto badframe;
992
993 /* Save user registers on the stack */
994 frame = &rt_sf->uc.uc_mcontext;
d0c3d534 995 addr = frame;
a5bba930 996 if (vdso32_rt_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
997 sigret = 0;
998 tramp = current->mm->context.vdso_base + vdso32_rt_sigtramp;
a7f290da 999 } else {
2b0a576d
MN
1000 sigret = __NR_rt_sigreturn;
1001 tramp = (unsigned long) frame->tramp;
1002 }
1003
1004#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
d6ea4422 1005 tm_frame = &rt_sf->uc_transact.uc_mcontext;
2b0a576d 1006 if (MSR_TM_ACTIVE(regs->msr)) {
d6ea4422 1007 if (save_tm_user_regs(regs, frame, tm_frame, sigret))
1da177e4 1008 goto badframe;
1da177e4 1009 }
2b0a576d
MN
1010 else
1011#endif
d6ea4422
MN
1012 {
1013 if (save_user_regs(regs, frame, tm_frame, sigret, 1))
2b0a576d 1014 goto badframe;
d6ea4422 1015 }
2b0a576d
MN
1016 regs->link = tramp;
1017
1018#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1019 if (MSR_TM_ACTIVE(regs->msr)) {
1020 if (__put_user((unsigned long)&rt_sf->uc_transact,
1021 &rt_sf->uc.uc_link)
d6ea4422 1022 || __put_user((unsigned long)tm_frame, &rt_sf->uc_transact.uc_regs))
2b0a576d
MN
1023 goto badframe;
1024 }
1025 else
1026#endif
1027 if (__put_user(0, &rt_sf->uc.uc_link))
1028 goto badframe;
cc657f53
PM
1029
1030 current->thread.fpscr.val = 0; /* turn off all fp exceptions */
1031
a3f61dc0
BH
1032 /* create a stack frame for the caller of the handler */
1033 newsp = ((unsigned long)rt_sf) - (__SIGNAL_FRAMESIZE + 16);
d0c3d534 1034 addr = (void __user *)regs->gpr[1];
e2b55306 1035 if (put_user(regs->gpr[1], (u32 __user *)newsp))
81e7009e 1036 goto badframe;
a3f61dc0
BH
1037
1038 /* Fill registers for signal handler */
81e7009e 1039 regs->gpr[1] = newsp;
1da177e4
LT
1040 regs->gpr[3] = sig;
1041 regs->gpr[4] = (unsigned long) &rt_sf->info;
1042 regs->gpr[5] = (unsigned long) &rt_sf->uc;
1043 regs->gpr[6] = (unsigned long) rt_sf;
1044 regs->nip = (unsigned long) ka->sa.sa_handler;
fab5db97
PM
1045 /* enter the signal handler in big-endian mode */
1046 regs->msr &= ~MSR_LE;
2b0a576d
MN
1047#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1048 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1049 * just indicates to userland that we were doing a transaction, but we
1050 * don't want to return in transactional state:
1051 */
1052 regs->msr &= ~MSR_TS_MASK;
1053#endif
1da177e4
LT
1054 return 1;
1055
1056badframe:
81e7009e 1057#ifdef DEBUG_SIG
1da177e4
LT
1058 printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
1059 regs, frame, newsp);
1060#endif
76462232
CD
1061 if (show_unhandled_signals)
1062 printk_ratelimited(KERN_INFO
1063 "%s[%d]: bad frame in handle_rt_signal32: "
1064 "%p nip %08lx lr %08lx\n",
1065 current->comm, current->pid,
1066 addr, regs->nip, regs->link);
d0c3d534 1067
1da177e4
LT
1068 force_sigsegv(sig, current);
1069 return 0;
1070}
1071
81e7009e 1072static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
1da177e4 1073{
1da177e4 1074 sigset_t set;
81e7009e
SR
1075 struct mcontext __user *mcp;
1076
1077 if (get_sigset_t(&set, &ucp->uc_sigmask))
1078 return -EFAULT;
1079#ifdef CONFIG_PPC64
1080 {
1081 u32 cmcp;
1da177e4 1082
81e7009e
SR
1083 if (__get_user(cmcp, &ucp->uc_regs))
1084 return -EFAULT;
1085 mcp = (struct mcontext __user *)(u64)cmcp;
7c85d1f9 1086 /* no need to check access_ok(mcp), since mcp < 4GB */
81e7009e
SR
1087 }
1088#else
1089 if (__get_user(mcp, &ucp->uc_regs))
1da177e4 1090 return -EFAULT;
7c85d1f9
PM
1091 if (!access_ok(VERIFY_READ, mcp, sizeof(*mcp)))
1092 return -EFAULT;
81e7009e 1093#endif
17440f17 1094 set_current_blocked(&set);
81e7009e 1095 if (restore_user_regs(regs, mcp, sig))
1da177e4
LT
1096 return -EFAULT;
1097
1098 return 0;
1099}
1100
2b0a576d
MN
1101#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1102static int do_setcontext_tm(struct ucontext __user *ucp,
1103 struct ucontext __user *tm_ucp,
1104 struct pt_regs *regs)
1105{
1106 sigset_t set;
1107 struct mcontext __user *mcp;
1108 struct mcontext __user *tm_mcp;
1109 u32 cmcp;
1110 u32 tm_cmcp;
1111
1112 if (get_sigset_t(&set, &ucp->uc_sigmask))
1113 return -EFAULT;
1114
1115 if (__get_user(cmcp, &ucp->uc_regs) ||
1116 __get_user(tm_cmcp, &tm_ucp->uc_regs))
1117 return -EFAULT;
1118 mcp = (struct mcontext __user *)(u64)cmcp;
1119 tm_mcp = (struct mcontext __user *)(u64)tm_cmcp;
1120 /* no need to check access_ok(mcp), since mcp < 4GB */
1121
1122 set_current_blocked(&set);
1123 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1124 return -EFAULT;
1125
1126 return 0;
1127}
1128#endif
1129
81e7009e 1130long sys_swapcontext(struct ucontext __user *old_ctx,
1bd79336
PM
1131 struct ucontext __user *new_ctx,
1132 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
1da177e4
LT
1133{
1134 unsigned char tmp;
16c29d18 1135 int ctx_has_vsx_region = 0;
1da177e4 1136
c1cb299e
MN
1137#ifdef CONFIG_PPC64
1138 unsigned long new_msr = 0;
1139
77eb50ae
AS
1140 if (new_ctx) {
1141 struct mcontext __user *mcp;
1142 u32 cmcp;
1143
1144 /*
1145 * Get pointer to the real mcontext. No need for
1146 * access_ok since we are dealing with compat
1147 * pointers.
1148 */
1149 if (__get_user(cmcp, &new_ctx->uc_regs))
1150 return -EFAULT;
1151 mcp = (struct mcontext __user *)(u64)cmcp;
1152 if (__get_user(new_msr, &mcp->mc_gregs[PT_MSR]))
1153 return -EFAULT;
1154 }
c1cb299e
MN
1155 /*
1156 * Check that the context is not smaller than the original
1157 * size (with VMX but without VSX)
1158 */
1159 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
1160 return -EINVAL;
1161 /*
1162 * If the new context state sets the MSR VSX bits but
1163 * it doesn't provide VSX state.
1164 */
1165 if ((ctx_size < sizeof(struct ucontext)) &&
1166 (new_msr & MSR_VSX))
1167 return -EINVAL;
16c29d18
MN
1168 /* Does the context have enough room to store VSX data? */
1169 if (ctx_size >= sizeof(struct ucontext))
1170 ctx_has_vsx_region = 1;
c1cb299e 1171#else
1da177e4
LT
1172 /* Context size is for future use. Right now, we only make sure
1173 * we are passed something we understand
1174 */
81e7009e 1175 if (ctx_size < sizeof(struct ucontext))
1da177e4 1176 return -EINVAL;
c1cb299e 1177#endif
1da177e4 1178 if (old_ctx != NULL) {
1c9bb1a0
PM
1179 struct mcontext __user *mctx;
1180
1181 /*
1182 * old_ctx might not be 16-byte aligned, in which
1183 * case old_ctx->uc_mcontext won't be either.
1184 * Because we have the old_ctx->uc_pad2 field
1185 * before old_ctx->uc_mcontext, we need to round down
1186 * from &old_ctx->uc_mcontext to a 16-byte boundary.
1187 */
1188 mctx = (struct mcontext __user *)
1189 ((unsigned long) &old_ctx->uc_mcontext & ~0xfUL);
16c29d18 1190 if (!access_ok(VERIFY_WRITE, old_ctx, ctx_size)
d6ea4422 1191 || save_user_regs(regs, mctx, NULL, 0, ctx_has_vsx_region)
81e7009e 1192 || put_sigset_t(&old_ctx->uc_sigmask, &current->blocked)
1c9bb1a0 1193 || __put_user(to_user_ptr(mctx), &old_ctx->uc_regs))
1da177e4
LT
1194 return -EFAULT;
1195 }
1196 if (new_ctx == NULL)
1197 return 0;
16c29d18 1198 if (!access_ok(VERIFY_READ, new_ctx, ctx_size)
1da177e4 1199 || __get_user(tmp, (u8 __user *) new_ctx)
16c29d18 1200 || __get_user(tmp, (u8 __user *) new_ctx + ctx_size - 1))
1da177e4
LT
1201 return -EFAULT;
1202
1203 /*
1204 * If we get a fault copying the context into the kernel's
1205 * image of the user's registers, we can't just return -EFAULT
1206 * because the user's registers will be corrupted. For instance
1207 * the NIP value may have been updated but not some of the
1208 * other registers. Given that we have done the access_ok
1209 * and successfully read the first and last bytes of the region
1210 * above, this should only happen in an out-of-memory situation
1211 * or if another thread unmaps the region containing the context.
1212 * We kill the task with a SIGSEGV in this situation.
1213 */
81e7009e 1214 if (do_setcontext(new_ctx, regs, 0))
1da177e4 1215 do_exit(SIGSEGV);
401d1f02
DW
1216
1217 set_thread_flag(TIF_RESTOREALL);
1da177e4
LT
1218 return 0;
1219}
1220
81e7009e 1221long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1222 struct pt_regs *regs)
1223{
81e7009e 1224 struct rt_sigframe __user *rt_sf;
2b0a576d
MN
1225#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1226 struct ucontext __user *uc_transact;
1227 unsigned long msr_hi;
1228 unsigned long tmp;
1229 int tm_restore = 0;
1230#endif
1da177e4
LT
1231 /* Always make any pending restarted system calls return -EINTR */
1232 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1233
81e7009e
SR
1234 rt_sf = (struct rt_sigframe __user *)
1235 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
1da177e4
LT
1236 if (!access_ok(VERIFY_READ, rt_sf, sizeof(*rt_sf)))
1237 goto bad;
2b0a576d
MN
1238#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1239 if (__get_user(tmp, &rt_sf->uc.uc_link))
1240 goto bad;
1241 uc_transact = (struct ucontext __user *)(uintptr_t)tmp;
1242 if (uc_transact) {
1243 u32 cmcp;
1244 struct mcontext __user *mcp;
1245
1246 if (__get_user(cmcp, &uc_transact->uc_regs))
1247 return -EFAULT;
1248 mcp = (struct mcontext __user *)(u64)cmcp;
1249 /* The top 32 bits of the MSR are stashed in the transactional
1250 * ucontext. */
1251 if (__get_user(msr_hi, &mcp->mc_gregs[PT_MSR]))
1252 goto bad;
1253
f6ff89fc 1254 if (MSR_TM_ACTIVE(msr_hi<<32)) {
2b0a576d
MN
1255 /* We only recheckpoint on return if we're
1256 * transaction.
1257 */
1258 tm_restore = 1;
1259 if (do_setcontext_tm(&rt_sf->uc, uc_transact, regs))
1260 goto bad;
1261 }
1262 }
1263 if (!tm_restore)
1264 /* Fall through, for non-TM restore */
1265#endif
81e7009e 1266 if (do_setcontext(&rt_sf->uc, regs, 1))
1da177e4
LT
1267 goto bad;
1268
1269 /*
1270 * It's not clear whether or why it is desirable to save the
1271 * sigaltstack setting on signal delivery and restore it on
1272 * signal return. But other architectures do this and we have
1273 * always done it up until now so it is probably better not to
1274 * change it. -- paulus
81e7009e
SR
1275 */
1276#ifdef CONFIG_PPC64
7cce2465
AV
1277 if (compat_restore_altstack(&rt_sf->uc.uc_stack))
1278 goto bad;
81e7009e 1279#else
7cce2465
AV
1280 if (restore_altstack(&rt_sf->uc.uc_stack))
1281 goto bad;
81e7009e 1282#endif
401d1f02
DW
1283 set_thread_flag(TIF_RESTOREALL);
1284 return 0;
1da177e4
LT
1285
1286 bad:
76462232
CD
1287 if (show_unhandled_signals)
1288 printk_ratelimited(KERN_INFO
1289 "%s[%d]: bad frame in sys_rt_sigreturn: "
1290 "%p nip %08lx lr %08lx\n",
1291 current->comm, current->pid,
1292 rt_sf, regs->nip, regs->link);
d0c3d534 1293
1da177e4
LT
1294 force_sig(SIGSEGV, current);
1295 return 0;
1296}
1297
81e7009e
SR
1298#ifdef CONFIG_PPC32
1299int sys_debug_setcontext(struct ucontext __user *ctx,
1300 int ndbg, struct sig_dbg_op __user *dbg,
1301 int r6, int r7, int r8,
1302 struct pt_regs *regs)
1303{
1304 struct sig_dbg_op op;
1305 int i;
7c85d1f9 1306 unsigned char tmp;
81e7009e 1307 unsigned long new_msr = regs->msr;
172ae2e7 1308#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1309 unsigned long new_dbcr0 = current->thread.dbcr0;
1310#endif
1311
1312 for (i=0; i<ndbg; i++) {
7c85d1f9 1313 if (copy_from_user(&op, dbg + i, sizeof(op)))
81e7009e
SR
1314 return -EFAULT;
1315 switch (op.dbg_type) {
1316 case SIG_DBG_SINGLE_STEPPING:
172ae2e7 1317#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1318 if (op.dbg_value) {
1319 new_msr |= MSR_DE;
1320 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
1321 } else {
3bffb652
DK
1322 new_dbcr0 &= ~DBCR0_IC;
1323 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
1324 current->thread.dbcr1)) {
1325 new_msr &= ~MSR_DE;
1326 new_dbcr0 &= ~DBCR0_IDM;
1327 }
81e7009e
SR
1328 }
1329#else
1330 if (op.dbg_value)
1331 new_msr |= MSR_SE;
1332 else
1333 new_msr &= ~MSR_SE;
1334#endif
1335 break;
1336 case SIG_DBG_BRANCH_TRACING:
172ae2e7 1337#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1338 return -EINVAL;
1339#else
1340 if (op.dbg_value)
1341 new_msr |= MSR_BE;
1342 else
1343 new_msr &= ~MSR_BE;
1344#endif
1345 break;
1346
1347 default:
1348 return -EINVAL;
1349 }
1350 }
1351
1352 /* We wait until here to actually install the values in the
1353 registers so if we fail in the above loop, it will not
1354 affect the contents of these registers. After this point,
1355 failure is a problem, anyway, and it's very unlikely unless
1356 the user is really doing something wrong. */
1357 regs->msr = new_msr;
172ae2e7 1358#ifdef CONFIG_PPC_ADV_DEBUG_REGS
81e7009e
SR
1359 current->thread.dbcr0 = new_dbcr0;
1360#endif
1361
7c85d1f9
PM
1362 if (!access_ok(VERIFY_READ, ctx, sizeof(*ctx))
1363 || __get_user(tmp, (u8 __user *) ctx)
1364 || __get_user(tmp, (u8 __user *) (ctx + 1) - 1))
1365 return -EFAULT;
1366
81e7009e
SR
1367 /*
1368 * If we get a fault copying the context into the kernel's
1369 * image of the user's registers, we can't just return -EFAULT
1370 * because the user's registers will be corrupted. For instance
1371 * the NIP value may have been updated but not some of the
1372 * other registers. Given that we have done the access_ok
1373 * and successfully read the first and last bytes of the region
1374 * above, this should only happen in an out-of-memory situation
1375 * or if another thread unmaps the region containing the context.
1376 * We kill the task with a SIGSEGV in this situation.
1377 */
1378 if (do_setcontext(ctx, regs, 1)) {
76462232
CD
1379 if (show_unhandled_signals)
1380 printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
1381 "sys_debug_setcontext: %p nip %08lx "
1382 "lr %08lx\n",
1383 current->comm, current->pid,
1384 ctx, regs->nip, regs->link);
d0c3d534 1385
81e7009e
SR
1386 force_sig(SIGSEGV, current);
1387 goto out;
1388 }
1389
1390 /*
1391 * It's not clear whether or why it is desirable to save the
1392 * sigaltstack setting on signal delivery and restore it on
1393 * signal return. But other architectures do this and we have
1394 * always done it up until now so it is probably better not to
1395 * change it. -- paulus
1396 */
7cce2465 1397 restore_altstack(&ctx->uc_stack);
81e7009e 1398
401d1f02 1399 set_thread_flag(TIF_RESTOREALL);
81e7009e
SR
1400 out:
1401 return 0;
1402}
1403#endif
1da177e4
LT
1404
1405/*
1406 * OK, we're invoking a handler
1407 */
f478f543 1408int handle_signal32(unsigned long sig, struct k_sigaction *ka,
a3f61dc0 1409 siginfo_t *info, sigset_t *oldset, struct pt_regs *regs)
1da177e4 1410{
81e7009e 1411 struct sigcontext __user *sc;
a3f61dc0 1412 struct sigframe __user *frame;
d6ea4422 1413 struct mcontext __user *tm_mctx = NULL;
a3f61dc0 1414 unsigned long newsp = 0;
2b0a576d
MN
1415 int sigret;
1416 unsigned long tramp;
1da177e4
LT
1417
1418 /* Set up Signal Frame */
2b3f8e87 1419 frame = get_sigframe(ka, get_tm_stackpointer(regs), sizeof(*frame), 1);
a3f61dc0 1420 if (unlikely(frame == NULL))
1da177e4 1421 goto badframe;
a3f61dc0 1422 sc = (struct sigcontext __user *) &frame->sctx;
1da177e4
LT
1423
1424#if _NSIG != 64
81e7009e 1425#error "Please adjust handle_signal()"
1da177e4 1426#endif
81e7009e 1427 if (__put_user(to_user_ptr(ka->sa.sa_handler), &sc->handler)
1da177e4 1428 || __put_user(oldset->sig[0], &sc->oldmask)
81e7009e 1429#ifdef CONFIG_PPC64
1da177e4 1430 || __put_user((oldset->sig[0] >> 32), &sc->_unused[3])
81e7009e
SR
1431#else
1432 || __put_user(oldset->sig[1], &sc->_unused[3])
1433#endif
a3f61dc0 1434 || __put_user(to_user_ptr(&frame->mctx), &sc->regs)
1da177e4
LT
1435 || __put_user(sig, &sc->signal))
1436 goto badframe;
1437
a5bba930 1438 if (vdso32_sigtramp && current->mm->context.vdso_base) {
2b0a576d
MN
1439 sigret = 0;
1440 tramp = current->mm->context.vdso_base + vdso32_sigtramp;
a7f290da 1441 } else {
2b0a576d
MN
1442 sigret = __NR_sigreturn;
1443 tramp = (unsigned long) frame->mctx.tramp;
1444 }
1445
1446#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
d6ea4422 1447 tm_mctx = &frame->mctx_transact;
2b0a576d
MN
1448 if (MSR_TM_ACTIVE(regs->msr)) {
1449 if (save_tm_user_regs(regs, &frame->mctx, &frame->mctx_transact,
1450 sigret))
1da177e4 1451 goto badframe;
1da177e4 1452 }
2b0a576d
MN
1453 else
1454#endif
d6ea4422
MN
1455 {
1456 if (save_user_regs(regs, &frame->mctx, tm_mctx, sigret, 1))
2b0a576d 1457 goto badframe;
d6ea4422 1458 }
2b0a576d
MN
1459
1460 regs->link = tramp;
1da177e4 1461
cc657f53
PM
1462 current->thread.fpscr.val = 0; /* turn off all fp exceptions */
1463
a3f61dc0
BH
1464 /* create a stack frame for the caller of the handler */
1465 newsp = ((unsigned long)frame) - __SIGNAL_FRAMESIZE;
9747dd6f 1466 if (put_user(regs->gpr[1], (u32 __user *)newsp))
1da177e4 1467 goto badframe;
a3f61dc0 1468
81e7009e 1469 regs->gpr[1] = newsp;
1da177e4
LT
1470 regs->gpr[3] = sig;
1471 regs->gpr[4] = (unsigned long) sc;
1472 regs->nip = (unsigned long) ka->sa.sa_handler;
fab5db97
PM
1473 /* enter the signal handler in big-endian mode */
1474 regs->msr &= ~MSR_LE;
2b0a576d
MN
1475#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1476 /* Remove TM bits from thread's MSR. The MSR in the sigcontext
1477 * just indicates to userland that we were doing a transaction, but we
1478 * don't want to return in transactional state:
1479 */
1480 regs->msr &= ~MSR_TS_MASK;
1481#endif
1da177e4
LT
1482 return 1;
1483
1484badframe:
81e7009e
SR
1485#ifdef DEBUG_SIG
1486 printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
1487 regs, frame, newsp);
1da177e4 1488#endif
76462232
CD
1489 if (show_unhandled_signals)
1490 printk_ratelimited(KERN_INFO
1491 "%s[%d]: bad frame in handle_signal32: "
1492 "%p nip %08lx lr %08lx\n",
1493 current->comm, current->pid,
1494 frame, regs->nip, regs->link);
d0c3d534 1495
1da177e4
LT
1496 force_sigsegv(sig, current);
1497 return 0;
1498}
1499
1500/*
1501 * Do a signal return; undo the signal stack.
1502 */
81e7009e 1503long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
1da177e4
LT
1504 struct pt_regs *regs)
1505{
74383413 1506 struct sigframe __user *sf;
81e7009e
SR
1507 struct sigcontext __user *sc;
1508 struct sigcontext sigctx;
1509 struct mcontext __user *sr;
d0c3d534 1510 void __user *addr;
1da177e4 1511 sigset_t set;
74383413
MN
1512#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1513 struct mcontext __user *mcp, *tm_mcp;
1514 unsigned long msr_hi;
1515#endif
1da177e4
LT
1516
1517 /* Always make any pending restarted system calls return -EINTR */
1518 current_thread_info()->restart_block.fn = do_no_restart_syscall;
1519
74383413
MN
1520 sf = (struct sigframe __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
1521 sc = &sf->sctx;
d0c3d534 1522 addr = sc;
1da177e4
LT
1523 if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
1524 goto badframe;
1525
81e7009e 1526#ifdef CONFIG_PPC64
1da177e4
LT
1527 /*
1528 * Note that PPC32 puts the upper 32 bits of the sigmask in the
1529 * unused part of the signal stackframe
1530 */
1531 set.sig[0] = sigctx.oldmask + ((long)(sigctx._unused[3]) << 32);
81e7009e
SR
1532#else
1533 set.sig[0] = sigctx.oldmask;
1534 set.sig[1] = sigctx._unused[3];
1535#endif
17440f17 1536 set_current_blocked(&set);
1da177e4 1537
74383413
MN
1538#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1539 mcp = (struct mcontext __user *)&sf->mctx;
1540 tm_mcp = (struct mcontext __user *)&sf->mctx_transact;
1541 if (__get_user(msr_hi, &tm_mcp->mc_gregs[PT_MSR]))
1da177e4 1542 goto badframe;
74383413
MN
1543 if (MSR_TM_ACTIVE(msr_hi<<32)) {
1544 if (!cpu_has_feature(CPU_FTR_TM))
1545 goto badframe;
1546 if (restore_tm_user_regs(regs, mcp, tm_mcp))
1547 goto badframe;
1548 } else
1549#endif
1550 {
1551 sr = (struct mcontext __user *)from_user_ptr(sigctx.regs);
1552 addr = sr;
1553 if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
1554 || restore_user_regs(regs, sr, 1))
1555 goto badframe;
1556 }
1da177e4 1557
401d1f02 1558 set_thread_flag(TIF_RESTOREALL);
81e7009e 1559 return 0;
1da177e4
LT
1560
1561badframe:
76462232
CD
1562 if (show_unhandled_signals)
1563 printk_ratelimited(KERN_INFO
1564 "%s[%d]: bad frame in sys_sigreturn: "
1565 "%p nip %08lx lr %08lx\n",
1566 current->comm, current->pid,
1567 addr, regs->nip, regs->link);
d0c3d534 1568
1da177e4
LT
1569 force_sig(SIGSEGV, current);
1570 return 0;
1571}