[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / parisc / mm / fault.c

/* $Id: fault.c,v 1.5 2000/01/26 16:20:29 jsm Exp $
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 *
 * Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
 * Copyright 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
 * Copyright 1999 Hewlett Packard Co.
 *
 */

#include <linux/mm.h>
#include <linux/ptrace.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/module.h>

#include <asm/uaccess.h>
#include <asm/traps.h>

#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
			 /*  dumped to the console via printk)          */


/* Various important other fields */
#define bit22set(x)		(x & 0x00000200)
#define bits23_25set(x)		(x & 0x000001c0)
#define isGraphicsFlushRead(x)	((x & 0xfc003fdf) == 0x04001a80)
				/* extended opcode is 0x6a */

#define BITSSET		0x1c0	/* for identifying LDCW */


DEFINE_PER_CPU(struct exception_data, exception_data);

/*
 * parisc_acctyp(unsigned int inst) --
 *    Given a PA-RISC memory access instruction, determine if the
 *    the instruction would perform a memory read or memory write
 *    operation.
 *
 *    This function assumes that the given instruction is a memory access
 *    instruction (i.e. you should really only call it if you know that
 *    the instruction has generated some sort of a memory access fault).
 *
 * Returns:
 *   VM_READ  if read operation
 *   VM_WRITE if write operation
 *   VM_EXEC  if execute operation
 */
static unsigned long
parisc_acctyp(unsigned long code, unsigned int inst)
{
	if (code == 6 || code == 16)
	    return VM_EXEC;

	switch (inst & 0xf0000000) {
	case 0x40000000: /* load */
	case 0x50000000: /* new load */
		return VM_READ;

	case 0x60000000: /* store */
	case 0x70000000: /* new store */
		return VM_WRITE;

	case 0x20000000: /* coproc */
	case 0x30000000: /* coproc2 */
		if (bit22set(inst))
			return VM_WRITE;

	case 0x0: /* indexed/memory management */
		if (bit22set(inst)) {
			/*
			 * Check for the 'Graphics Flush Read' instruction.
			 * It resembles an FDC instruction, except for bits
			 * 20 and 21. Any combination other than zero will
			 * utilize the block mover functionality on some
			 * older PA-RISC platforms.  The case where a block
			 * move is performed from VM to graphics IO space
			 * should be treated as a READ.
			 *
			 * The significance of bits 20,21 in the FDC
			 * instruction is:
			 *
			 *   00  Flush data cache (normal instruction behavior)
			 *   01  Graphics flush write  (IO space -> VM)
			 *   10  Graphics flush read   (VM -> IO space)
			 *   11  Graphics flush read/write (VM <-> IO space)
			 */
			if (isGraphicsFlushRead(inst))
				return VM_READ;
			return VM_WRITE;
		} else {
			/*
			 * Check for LDCWX and LDCWS (semaphore instructions).
			 * If bits 23 through 25 are all 1's it is one of
			 * the above two instructions and is a write.
			 *
			 * Note: With the limited bits we are looking at,
			 * this will also catch PROBEW and PROBEWI. However,
			 * these should never get in here because they don't
			 * generate exceptions of the type:
			 *   Data TLB miss fault/data page fault
			 *   Data memory protection trap
			 */
			if (bits23_25set(inst) == BITSSET)
				return VM_WRITE;
		}
		return VM_READ; /* Default */
	}
	return VM_READ; /* Default */
}

#undef bit22set
#undef bits23_25set
#undef isGraphicsFlushRead
#undef BITSSET


#if 0
/* This is the treewalk to find a vma which is the highest that has
 * a start < addr.  We're using find_vma_prev instead right now, but
 * we might want to use this at some point in the future.  Probably
 * not, but I want it committed to CVS so I don't lose it :-)
 */
			while (tree != vm_avl_empty) {
				if (tree->vm_start > addr) {
					tree = tree->vm_avl_left;
				} else {
					prev = tree;
					if (prev->vm_next == NULL)
						break;
					if (prev->vm_next->vm_start > addr)
						break;
					tree = tree->vm_avl_right;
				}
			}
#endif

void do_page_fault(struct pt_regs *regs, unsigned long code,
			      unsigned long address)
{
	struct vm_area_struct *vma, *prev_vma;
	struct task_struct *tsk = current;
	struct mm_struct *mm = tsk->mm;
	const struct exception_table_entry *fix;
	unsigned long acc_type;
	int fault;

	if (in_atomic() || !mm)
		goto no_context;

	down_read(&mm->mmap_sem);
	vma = find_vma_prev(mm, address, &prev_vma);
	if (!vma || address < vma->vm_start)
		goto check_expansion;
/*
 * Ok, we have a good vm_area for this memory access. We still need to
 * check the access permissions.
 */

good_area:

	acc_type = parisc_acctyp(code,regs->iir);

	if ((vma->vm_flags & acc_type) != acc_type)
		goto bad_area;

	/*
	 * If for any reason at all we couldn't handle the fault, make
	 * sure we exit gracefully rather than endlessly redo the
	 * fault.
	 */

	fault = handle_mm_fault(mm, vma, address, (acc_type & VM_WRITE) != 0);
	if (unlikely(fault & VM_FAULT_ERROR)) {
		/*
		 * We hit a shared mapping outside of the file, or some
		 * other thing happened to us that made us unable to
		 * handle the page fault gracefully.
		 */
		if (fault & VM_FAULT_OOM)
			goto out_of_memory;
		else if (fault & VM_FAULT_SIGBUS)
			goto bad_area;
		BUG();
	}
	if (fault & VM_FAULT_MAJOR)
		current->maj_flt++;
	else
		current->min_flt++;
	up_read(&mm->mmap_sem);
	return;

check_expansion:
	vma = prev_vma;
	if (vma && (expand_stack(vma, address) == 0))
		goto good_area;

/*
 * Something tried to access memory that isn't in our memory map..
 */
bad_area:
	up_read(&mm->mmap_sem);

	if (user_mode(regs)) {
		struct siginfo si;

#ifdef PRINT_USER_FAULTS
		printk(KERN_DEBUG "\n");
		printk(KERN_DEBUG "do_page_fault() pid=%d command='%s' type=%lu address=0x%08lx\n",
		    tsk->pid, tsk->comm, code, address);
		if (vma) {
			printk(KERN_DEBUG "vm_start = 0x%08lx, vm_end = 0x%08lx\n",
					vma->vm_start, vma->vm_end);
		}
		show_regs(regs);
#endif
		/* FIXME: actually we need to get the signo and code correct */
		si.si_signo = SIGSEGV;
		si.si_errno = 0;
		si.si_code = SEGV_MAPERR;
		si.si_addr = (void __user *) address;
		force_sig_info(SIGSEGV, &si, current);
		return;
	}

no_context:

	if (!user_mode(regs)) {
		fix = search_exception_tables(regs->iaoq[0]);

		if (fix) {
			struct exception_data *d;

			d = &__get_cpu_var(exception_data);
			d->fault_ip = regs->iaoq[0];
			d->fault_space = regs->isr;
			d->fault_addr = regs->ior;

			regs->iaoq[0] = ((fix->fixup) & ~3);

			/*
			 * NOTE: In some cases the faulting instruction
			 * may be in the delay slot of a branch. We
			 * don't want to take the branch, so we don't
			 * increment iaoq[1], instead we set it to be
			 * iaoq[0]+4, and clear the B bit in the PSW
			 */

			regs->iaoq[1] = regs->iaoq[0] + 4;
			regs->gr[0] &= ~PSW_B; /* IPSW in gr[0] */

			return;
		}
	}

	parisc_terminate("Bad Address (null pointer deref?)", regs, code, address);

  out_of_memory:
	up_read(&mm->mmap_sem);
	printk(KERN_CRIT "VM: killing process %s\n", current->comm);
	if (user_mode(regs))
		do_group_exit(SIGKILL);
	goto no_context;
}
Commit	Line	Data
1da177e4 LT	1	/* $Id: fault.c,v 1.5 2000/01/26 16:20:29 jsm Exp $
	2	*
	3	* This file is subject to the terms and conditions of the GNU General Public
	4	* License. See the file "COPYING" in the main directory of this archive
	5	* for more details.
	6	*
	7	*
	8	* Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
	9	* Copyright 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
	10	* Copyright 1999 Hewlett Packard Co.
	11	*
	12	*/
	13
	14	#include <linux/mm.h>
	15	#include <linux/ptrace.h>
	16	#include <linux/sched.h>
	17	#include <linux/interrupt.h>
	18	#include <linux/module.h>
	19
	20	#include <asm/uaccess.h>
	21	#include <asm/traps.h>
	22
	23	#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
	24	/* dumped to the console via printk) */
	25
	26
1da177e4 LT	27	/* Various important other fields */
	28	#define bit22set(x) (x & 0x00000200)
	29	#define bits23_25set(x) (x & 0x000001c0)
	30	#define isGraphicsFlushRead(x) ((x & 0xfc003fdf) == 0x04001a80)
	31	/* extended opcode is 0x6a */
	32
	33	#define BITSSET 0x1c0 /* for identifying LDCW */
	34
	35
	36	DEFINE_PER_CPU(struct exception_data, exception_data);
	37
	38	/*
	39	* parisc_acctyp(unsigned int inst) --
	40	* Given a PA-RISC memory access instruction, determine if the
	41	* the instruction would perform a memory read or memory write
	42	* operation.
	43	*
	44	* This function assumes that the given instruction is a memory access
	45	* instruction (i.e. you should really only call it if you know that
	46	* the instruction has generated some sort of a memory access fault).
	47	*
	48	* Returns:
	49	* VM_READ if read operation
	50	* VM_WRITE if write operation
	51	* VM_EXEC if execute operation
	52	*/
	53	static unsigned long
	54	parisc_acctyp(unsigned long code, unsigned int inst)
	55	{
	56	if (code == 6 \|\| code == 16)
	57	return VM_EXEC;
	58
	59	switch (inst & 0xf0000000) {
	60	case 0x40000000: /* load */
	61	case 0x50000000: /* new load */
	62	return VM_READ;
	63
	64	case 0x60000000: /* store */
	65	case 0x70000000: /* new store */
	66	return VM_WRITE;
	67
	68	case 0x20000000: /* coproc */
	69	case 0x30000000: /* coproc2 */
	70	if (bit22set(inst))
	71	return VM_WRITE;
	72
	73	case 0x0: /* indexed/memory management */
	74	if (bit22set(inst)) {
	75	/*
	76	* Check for the 'Graphics Flush Read' instruction.
	77	* It resembles an FDC instruction, except for bits
	78	* 20 and 21. Any combination other than zero will
	79	* utilize the block mover functionality on some
	80	* older PA-RISC platforms. The case where a block
	81	* move is performed from VM to graphics IO space
	82	* should be treated as a READ.
	83	*
	84	* The significance of bits 20,21 in the FDC
	85	* instruction is:
	86	*
	87	* 00 Flush data cache (normal instruction behavior)
	88	* 01 Graphics flush write (IO space -> VM)
	89	* 10 Graphics flush read (VM -> IO space)
	90	* 11 Graphics flush read/write (VM <-> IO space)
91	*/
92	if (isGraphicsFlushRead(inst))
93	return VM_READ;
94	return VM_WRITE;
95	} else {
96	/*
97	* Check for LDCWX and LDCWS (semaphore instructions).
98	* If bits 23 through 25 are all 1's it is one of
99	* the above two instructions and is a write.
100	*
101	* Note: With the limited bits we are looking at,
102	* this will also catch PROBEW and PROBEWI. However,
103	* these should never get in here because they don't
104	* generate exceptions of the type:
105	* Data TLB miss fault/data page fault
106	* Data memory protection trap
107	*/
108	if (bits23_25set(inst) == BITSSET)
109	return VM_WRITE;
110	}
111	return VM_READ; /* Default */
112	}
113	return VM_READ; /* Default */
114	}
115
116	#undef bit22set
117	#undef bits23_25set
118	#undef isGraphicsFlushRead
119	#undef BITSSET
120
121
122	#if 0
123	/* This is the treewalk to find a vma which is the highest that has
124	* a start < addr. We're using find_vma_prev instead right now, but
125	* we might want to use this at some point in the future. Probably
126	* not, but I want it committed to CVS so I don't lose it :-)
127	*/
128	while (tree != vm_avl_empty) {
129	if (tree->vm_start > addr) {
130	tree = tree->vm_avl_left;
131	} else {
132	prev = tree;
133	if (prev->vm_next == NULL)
134	break;
135	if (prev->vm_next->vm_start > addr)
136	break;
137	tree = tree->vm_avl_right;
138	}
139	}
140	#endif
141
142	void do_page_fault(struct pt_regs *regs, unsigned long code,
143	unsigned long address)
144	{
145	struct vm_area_struct vma, prev_vma;
146	struct task_struct *tsk = current;
147	struct mm_struct *mm = tsk->mm;
148	const struct exception_table_entry *fix;
149	unsigned long acc_type;
83c54070	150	int fault;
1da177e4	151
6edaf68a	152	if (in_atomic() \|\| !mm)
1da177e4 LT	153	goto no_context;
	154
	155	down_read(&mm->mmap_sem);
	156	vma = find_vma_prev(mm, address, &prev_vma);
	157	if (!vma \|\| address < vma->vm_start)
	158	goto check_expansion;
	159	/*
	160	* Ok, we have a good vm_area for this memory access. We still need to
	161	* check the access permissions.
	162	*/
	163
	164	good_area:
	165
	166	acc_type = parisc_acctyp(code,regs->iir);
	167
	168	if ((vma->vm_flags & acc_type) != acc_type)
	169	goto bad_area;
	170
	171	/*
	172	* If for any reason at all we couldn't handle the fault, make
	173	* sure we exit gracefully rather than endlessly redo the
	174	* fault.
	175	*/
	176
83c54070 NP	177	fault = handle_mm_fault(mm, vma, address, (acc_type & VM_WRITE) != 0);
83c54070 NP	178	if (unlikely(fault & VM_FAULT_ERROR)) {
1da177e4	179	/*
67a5a59d	180	* We hit a shared mapping outside of the file, or some
6e346228 LT	181	* other thing happened to us that made us unable to
6e346228 LT	182	* handle the page fault gracefully.
1da177e4	183	*/
83c54070 NP	184	if (fault & VM_FAULT_OOM)
	185	goto out_of_memory;
	186	else if (fault & VM_FAULT_SIGBUS)
	187	goto bad_area;
	188	BUG();
1da177e4	189	}
83c54070 NP	190	if (fault & VM_FAULT_MAJOR)
	191	current->maj_flt++;
	192	else
	193	current->min_flt++;
1da177e4 LT	194	up_read(&mm->mmap_sem);
	195	return;
	196
	197	check_expansion:
	198	vma = prev_vma;
	199	if (vma && (expand_stack(vma, address) == 0))
	200	goto good_area;
	201
	202	/*
	203	* Something tried to access memory that isn't in our memory map..
	204	*/
	205	bad_area:
	206	up_read(&mm->mmap_sem);
	207
	208	if (user_mode(regs)) {
	209	struct siginfo si;
	210
	211	#ifdef PRINT_USER_FAULTS
	212	printk(KERN_DEBUG "\n");
	213	printk(KERN_DEBUG "do_page_fault() pid=%d command='%s' type=%lu address=0x%08lx\n",
	214	tsk->pid, tsk->comm, code, address);
	215	if (vma) {
	216	printk(KERN_DEBUG "vm_start = 0x%08lx, vm_end = 0x%08lx\n",
	217	vma->vm_start, vma->vm_end);
	218	}
	219	show_regs(regs);
	220	#endif
	221	/* FIXME: actually we need to get the signo and code correct */
	222	si.si_signo = SIGSEGV;
	223	si.si_errno = 0;
	224	si.si_code = SEGV_MAPERR;
	225	si.si_addr = (void __user *) address;
	226	force_sig_info(SIGSEGV, &si, current);
	227	return;
	228	}
	229
	230	no_context:
	231
	232	if (!user_mode(regs)) {
	233	fix = search_exception_tables(regs->iaoq[0]);
	234
	235	if (fix) {
	236	struct exception_data *d;
	237
	238	d = &__get_cpu_var(exception_data);
	239	d->fault_ip = regs->iaoq[0];
	240	d->fault_space = regs->isr;
	241	d->fault_addr = regs->ior;
	242
	243	regs->iaoq[0] = ((fix->fixup) & ~3);
	244
	245	/*
	246	* NOTE: In some cases the faulting instruction
	247	* may be in the delay slot of a branch. We
	248	* don't want to take the branch, so we don't
	249	* increment iaoq[1], instead we set it to be
	250	* iaoq[0]+4, and clear the B bit in the PSW
	251	*/
	252
	253	regs->iaoq[1] = regs->iaoq[0] + 4;
	254	regs->gr[0] &= ~PSW_B; /* IPSW in gr[0] */
	255
	256	return;
	257	}
258	}
259
260	parisc_terminate("Bad Address (null pointer deref?)", regs, code, address);
261
262	out_of_memory:
263	up_read(&mm->mmap_sem);
264	printk(KERN_CRIT "VM: killing process %s\n", current->comm);
265	if (user_mode(regs))
dcca2bde	266	do_group_exit(SIGKILL);
1da177e4 LT	267	goto no_context;
1da177e4 LT	268	}