[PATCH] mips: nuke trailing whitespace
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / mips / pci / fixup-ddb5477.c
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1/*
2 *
3 * BRIEF MODULE DESCRIPTION
4 * Board specific pci fixups.
5 *
6 * Copyright 2001, 2002, 2003 MontaVista Software Inc.
7 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30#include <linux/types.h>
31#include <linux/pci.h>
32#include <linux/kernel.h>
33#include <linux/init.h>
34
35static void ddb5477_fixup(struct pci_dev *dev)
36{
37 u8 old;
38
39 printk(KERN_NOTICE "Enabling ALI M1533/35 PS2 keyboard/mouse.\n");
40 pci_read_config_byte(dev, 0x41, &old);
41 pci_write_config_byte(dev, 0x41, old | 0xd0);
42}
43
44DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533,
45 ddb5477_fixup);
46DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1535,
47 ddb5477_fixup);
48
49/*
50 * Fixup baseboard AMD chip so that tx does not underflow.
51 * bcr_18 |= 0x0800
52 * This sets NOUFLO bit which makes tx not start until whole pkt
53 * is fetched to the chip.
54 */
55#define PCNET32_WIO_RDP 0x10
56#define PCNET32_WIO_RAP 0x12
57#define PCNET32_WIO_RESET 0x14
58#define PCNET32_WIO_BDP 0x16
59
60static void ddb5477_amd_lance_fixup(struct pci_dev *dev)
61{
62 unsigned long ioaddr;
63 u16 temp;
64
65 ioaddr = pci_resource_start(dev, 0);
66
67 inw(ioaddr + PCNET32_WIO_RESET); /* reset chip */
42a3b4f2 68
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69 /* bcr_18 |= 0x0800 */
70 outw(18, ioaddr + PCNET32_WIO_RAP);
71 temp = inw(ioaddr + PCNET32_WIO_BDP);
72 temp |= 0x0800;
73 outw(18, ioaddr + PCNET32_WIO_RAP);
74 outw(temp, ioaddr + PCNET32_WIO_BDP);
75}
76
77DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE,
78 ddb5477_amd_lance_fixup);