[MIPS] Au1xx0: fix prom_getenv() to handle YAMON style environment
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / mips / kernel / time.c
CommitLineData
1da177e4
LT
1/*
2 * Copyright 2001 MontaVista Software Inc.
3 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
4 * Copyright (c) 2003, 2004 Maciej W. Rozycki
5 *
6 * Common time service routines for MIPS machines. See
7 * Documentation/mips/time.README.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
bdf21b18 14#include <linux/config.h>
1da177e4
LT
15#include <linux/types.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/sched.h>
19#include <linux/param.h>
20#include <linux/time.h>
21#include <linux/timex.h>
22#include <linux/smp.h>
23#include <linux/kernel_stat.h>
24#include <linux/spinlock.h>
25#include <linux/interrupt.h>
26#include <linux/module.h>
27
28#include <asm/bootinfo.h>
ec74e361 29#include <asm/cache.h>
1da177e4
LT
30#include <asm/compiler.h>
31#include <asm/cpu.h>
32#include <asm/cpu-features.h>
33#include <asm/div64.h>
34#include <asm/sections.h>
35#include <asm/time.h>
36
37/*
38 * The integer part of the number of usecs per jiffy is taken from tick,
39 * but the fractional part is not recorded, so we calculate it using the
40 * initial value of HZ. This aids systems where tick isn't really an
41 * integer (e.g. for HZ = 128).
42 */
43#define USECS_PER_JIFFY TICK_SIZE
44#define USECS_PER_JIFFY_FRAC ((unsigned long)(u32)((1000000ULL << 32) / HZ))
45
46#define TICK_SIZE (tick_nsec / 1000)
47
1da177e4
LT
48/*
49 * forward reference
50 */
51extern volatile unsigned long wall_jiffies;
52
53DEFINE_SPINLOCK(rtc_lock);
54
55/*
56 * By default we provide the null RTC ops
57 */
58static unsigned long null_rtc_get_time(void)
59{
60 return mktime(2000, 1, 1, 0, 0, 0);
61}
62
63static int null_rtc_set_time(unsigned long sec)
64{
65 return 0;
66}
67
d23ee8fe
YY
68unsigned long (*rtc_mips_get_time)(void) = null_rtc_get_time;
69int (*rtc_mips_set_time)(unsigned long) = null_rtc_set_time;
70int (*rtc_mips_set_mmss)(unsigned long);
1da177e4
LT
71
72
73/* usecs per counter cycle, shifted to left by 32 bits */
74static unsigned int sll32_usecs_per_cycle;
75
76/* how many counter cycles in a jiffy */
ec74e361 77static unsigned long cycles_per_jiffy __read_mostly;
1da177e4
LT
78
79/* Cycle counter value at the previous timer interrupt.. */
80static unsigned int timerhi, timerlo;
81
82/* expirelo is the count value for next CPU timer interrupt */
83static unsigned int expirelo;
84
85
86/*
87 * Null timer ack for systems not needing one (e.g. i8254).
88 */
89static void null_timer_ack(void) { /* nothing */ }
90
91/*
92 * Null high precision timer functions for systems lacking one.
93 */
94static unsigned int null_hpt_read(void)
95{
96 return 0;
97}
98
ec74e361
RB
99static void null_hpt_init(unsigned int count)
100{
101 /* nothing */
102}
1da177e4
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103
104
105/*
106 * Timer ack for an R4k-compatible timer of a known frequency.
107 */
108static void c0_timer_ack(void)
109{
110 unsigned int count;
111
bdf21b18 112#ifndef CONFIG_SOC_PNX8550 /* pnx8550 resets to zero */
1da177e4
LT
113 /* Ack this timer interrupt and set the next one. */
114 expirelo += cycles_per_jiffy;
bdf21b18 115#endif
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LT
116 write_c0_compare(expirelo);
117
118 /* Check to see if we have missed any timer interrupts. */
41c594ab 119 while (((count = read_c0_count()) - expirelo) < 0x7fffffff) {
1da177e4
LT
120 /* missed_timer_count++; */
121 expirelo = count + cycles_per_jiffy;
122 write_c0_compare(expirelo);
123 }
124}
125
126/*
127 * High precision timer functions for a R4k-compatible timer.
128 */
129static unsigned int c0_hpt_read(void)
130{
131 return read_c0_count();
132}
133
134/* For use solely as a high precision timer. */
135static void c0_hpt_init(unsigned int count)
136{
137 write_c0_count(read_c0_count() - count);
138}
139
140/* For use both as a high precision timer and an interrupt source. */
141static void c0_hpt_timer_init(unsigned int count)
142{
143 count = read_c0_count() - count;
144 expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
145 write_c0_count(expirelo - cycles_per_jiffy);
146 write_c0_compare(expirelo);
147 write_c0_count(count);
148}
149
150int (*mips_timer_state)(void);
151void (*mips_timer_ack)(void);
152unsigned int (*mips_hpt_read)(void);
153void (*mips_hpt_init)(unsigned int);
154
155
156/*
157 * This version of gettimeofday has microsecond resolution and better than
158 * microsecond precision on fast machines with cycle counter.
159 */
160void do_gettimeofday(struct timeval *tv)
161{
162 unsigned long seq;
163 unsigned long lost;
164 unsigned long usec, sec;
800d1142 165 unsigned long max_ntp_tick;
1da177e4
LT
166
167 do {
168 seq = read_seqbegin(&xtime_lock);
169
170 usec = do_gettimeoffset();
171
172 lost = jiffies - wall_jiffies;
173
174 /*
175 * If time_adjust is negative then NTP is slowing the clock
176 * so make sure not to go into next possible interval.
177 * Better to lose some accuracy than have time go backwards..
178 */
179 if (unlikely(time_adjust < 0)) {
800d1142 180 max_ntp_tick = (USEC_PER_SEC / HZ) - tickadj;
1da177e4
LT
181 usec = min(usec, max_ntp_tick);
182
183 if (lost)
184 usec += lost * max_ntp_tick;
185 } else if (unlikely(lost))
800d1142 186 usec += lost * (USEC_PER_SEC / HZ);
1da177e4
LT
187
188 sec = xtime.tv_sec;
189 usec += (xtime.tv_nsec / 1000);
190
191 } while (read_seqretry(&xtime_lock, seq));
192
193 while (usec >= 1000000) {
194 usec -= 1000000;
195 sec++;
196 }
197
198 tv->tv_sec = sec;
199 tv->tv_usec = usec;
200}
201
202EXPORT_SYMBOL(do_gettimeofday);
203
204int do_settimeofday(struct timespec *tv)
205{
206 time_t wtm_sec, sec = tv->tv_sec;
207 long wtm_nsec, nsec = tv->tv_nsec;
208
209 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
210 return -EINVAL;
211
212 write_seqlock_irq(&xtime_lock);
213
214 /*
215 * This is revolting. We need to set "xtime" correctly. However,
216 * the value in this location is the value at the most recent update
217 * of wall time. Discover what correction gettimeofday() would have
218 * made, and then undo it!
219 */
220 nsec -= do_gettimeoffset() * NSEC_PER_USEC;
221 nsec -= (jiffies - wall_jiffies) * tick_nsec;
222
223 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
224 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
225
226 set_normalized_timespec(&xtime, sec, nsec);
227 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
228
b149ee22 229 ntp_clear();
1da177e4
LT
230 write_sequnlock_irq(&xtime_lock);
231 clock_was_set();
232 return 0;
233}
234
235EXPORT_SYMBOL(do_settimeofday);
236
237/*
238 * Gettimeoffset routines. These routines returns the time duration
239 * since last timer interrupt in usecs.
240 *
241 * If the exact CPU counter frequency is known, use fixed_rate_gettimeoffset.
242 * Otherwise use calibrate_gettimeoffset()
243 *
244 * If the CPU does not have the counter register, you can either supply
245 * your own gettimeoffset() routine, or use null_gettimeoffset(), which
246 * gives the same resolution as HZ.
247 */
248
249static unsigned long null_gettimeoffset(void)
250{
251 return 0;
252}
253
254
255/* The function pointer to one of the gettimeoffset funcs. */
256unsigned long (*do_gettimeoffset)(void) = null_gettimeoffset;
257
258
259static unsigned long fixed_rate_gettimeoffset(void)
260{
261 u32 count;
262 unsigned long res;
263
264 /* Get last timer tick in absolute kernel time */
265 count = mips_hpt_read();
266
267 /* .. relative to previous jiffy (32 bits is enough) */
268 count -= timerlo;
269
270 __asm__("multu %1,%2"
271 : "=h" (res)
272 : "r" (count), "r" (sll32_usecs_per_cycle)
273 : "lo", GCC_REG_ACCUM);
274
275 /*
276 * Due to possible jiffies inconsistencies, we need to check
277 * the result so that we'll get a timer that is monotonic.
278 */
279 if (res >= USECS_PER_JIFFY)
280 res = USECS_PER_JIFFY - 1;
281
282 return res;
283}
284
285
286/*
287 * Cached "1/(clocks per usec) * 2^32" value.
288 * It has to be recalculated once each jiffy.
289 */
290static unsigned long cached_quotient;
291
292/* Last jiffy when calibrate_divXX_gettimeoffset() was called. */
293static unsigned long last_jiffies;
294
295/*
296 * This is moved from dec/time.c:do_ioasic_gettimeoffset() by Maciej.
297 */
298static unsigned long calibrate_div32_gettimeoffset(void)
299{
300 u32 count;
301 unsigned long res, tmp;
302 unsigned long quotient;
303
304 tmp = jiffies;
305
306 quotient = cached_quotient;
307
308 if (last_jiffies != tmp) {
309 last_jiffies = tmp;
310 if (last_jiffies != 0) {
311 unsigned long r0;
312 do_div64_32(r0, timerhi, timerlo, tmp);
313 do_div64_32(quotient, USECS_PER_JIFFY,
314 USECS_PER_JIFFY_FRAC, r0);
315 cached_quotient = quotient;
316 }
317 }
318
319 /* Get last timer tick in absolute kernel time */
320 count = mips_hpt_read();
321
322 /* .. relative to previous jiffy (32 bits is enough) */
323 count -= timerlo;
324
325 __asm__("multu %1,%2"
326 : "=h" (res)
327 : "r" (count), "r" (quotient)
328 : "lo", GCC_REG_ACCUM);
329
330 /*
331 * Due to possible jiffies inconsistencies, we need to check
332 * the result so that we'll get a timer that is monotonic.
333 */
334 if (res >= USECS_PER_JIFFY)
335 res = USECS_PER_JIFFY - 1;
336
337 return res;
338}
339
340static unsigned long calibrate_div64_gettimeoffset(void)
341{
342 u32 count;
343 unsigned long res, tmp;
344 unsigned long quotient;
345
346 tmp = jiffies;
347
348 quotient = cached_quotient;
349
350 if (last_jiffies != tmp) {
351 last_jiffies = tmp;
352 if (last_jiffies) {
353 unsigned long r0;
354 __asm__(".set push\n\t"
355 ".set mips3\n\t"
356 "lwu %0,%3\n\t"
357 "dsll32 %1,%2,0\n\t"
358 "or %1,%1,%0\n\t"
359 "ddivu $0,%1,%4\n\t"
360 "mflo %1\n\t"
361 "dsll32 %0,%5,0\n\t"
362 "or %0,%0,%6\n\t"
363 "ddivu $0,%0,%1\n\t"
364 "mflo %0\n\t"
365 ".set pop"
366 : "=&r" (quotient), "=&r" (r0)
367 : "r" (timerhi), "m" (timerlo),
368 "r" (tmp), "r" (USECS_PER_JIFFY),
369 "r" (USECS_PER_JIFFY_FRAC)
370 : "hi", "lo", GCC_REG_ACCUM);
371 cached_quotient = quotient;
372 }
373 }
374
375 /* Get last timer tick in absolute kernel time */
376 count = mips_hpt_read();
377
378 /* .. relative to previous jiffy (32 bits is enough) */
379 count -= timerlo;
380
381 __asm__("multu %1,%2"
382 : "=h" (res)
383 : "r" (count), "r" (quotient)
384 : "lo", GCC_REG_ACCUM);
385
386 /*
387 * Due to possible jiffies inconsistencies, we need to check
388 * the result so that we'll get a timer that is monotonic.
389 */
390 if (res >= USECS_PER_JIFFY)
391 res = USECS_PER_JIFFY - 1;
392
393 return res;
394}
395
396
397/* last time when xtime and rtc are sync'ed up */
398static long last_rtc_update;
399
400/*
401 * local_timer_interrupt() does profiling and process accounting
402 * on a per-CPU basis.
403 *
404 * In UP mode, it is invoked from the (global) timer_interrupt.
405 *
406 * In SMP mode, it might invoked by per-CPU timer interrupt, or
407 * a broadcasted inter-processor interrupt which itself is triggered
408 * by the global timer interrupt.
409 */
410void local_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
411{
412 if (current->pid)
413 profile_tick(CPU_PROFILING, regs);
414 update_process_times(user_mode(regs));
415}
416
417/*
418 * High-level timer interrupt service routines. This function
419 * is set as irqaction->handler and is invoked through do_IRQ.
420 */
421irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
422{
423 unsigned long j;
424 unsigned int count;
425
d6bd0e6b
RB
426 write_seqlock(&xtime_lock);
427
1da177e4
LT
428 count = mips_hpt_read();
429 mips_timer_ack();
430
431 /* Update timerhi/timerlo for intra-jiffy calibration. */
432 timerhi += count < timerlo; /* Wrap around */
433 timerlo = count;
434
435 /*
436 * call the generic timer interrupt handling
437 */
438 do_timer(regs);
439
440 /*
441 * If we have an externally synchronized Linux clock, then update
d23ee8fe 442 * CMOS clock accordingly every ~11 minutes. rtc_mips_set_time() has to be
1da177e4
LT
443 * called as close as possible to 500 ms before the new second starts.
444 */
b149ee22 445 if (ntp_synced() &&
1da177e4
LT
446 xtime.tv_sec > last_rtc_update + 660 &&
447 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
448 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
d23ee8fe 449 if (rtc_mips_set_mmss(xtime.tv_sec) == 0) {
1da177e4
LT
450 last_rtc_update = xtime.tv_sec;
451 } else {
452 /* do it again in 60 s */
453 last_rtc_update = xtime.tv_sec - 600;
454 }
455 }
1da177e4
LT
456
457 /*
458 * If jiffies has overflown in this timer_interrupt, we must
459 * update the timer[hi]/[lo] to make fast gettimeoffset funcs
460 * quotient calc still valid. -arca
461 *
462 * The first timer interrupt comes late as interrupts are
463 * enabled long after timers are initialized. Therefore the
464 * high precision timer is fast, leading to wrong gettimeoffset()
465 * calculations. We deal with it by setting it based on the
466 * number of its ticks between the second and the third interrupt.
467 * That is still somewhat imprecise, but it's a good estimate.
468 * --macro
469 */
470 j = jiffies;
471 if (j < 4) {
472 static unsigned int prev_count;
473 static int hpt_initialized;
474
475 switch (j) {
476 case 0:
477 timerhi = timerlo = 0;
478 mips_hpt_init(count);
479 break;
480 case 2:
481 prev_count = count;
482 break;
483 case 3:
484 if (!hpt_initialized) {
485 unsigned int c3 = 3 * (count - prev_count);
486
487 timerhi = 0;
488 timerlo = c3;
489 mips_hpt_init(count - c3);
490 hpt_initialized = 1;
491 }
492 break;
493 default:
494 break;
495 }
496 }
497
d6bd0e6b
RB
498 write_sequnlock(&xtime_lock);
499
1da177e4
LT
500 /*
501 * In UP mode, we call local_timer_interrupt() to do profiling
502 * and process accouting.
503 *
504 * In SMP mode, local_timer_interrupt() is invoked by appropriate
505 * low-level local timer interrupt handler.
506 */
507 local_timer_interrupt(irq, dev_id, regs);
508
509 return IRQ_HANDLED;
510}
511
ba339c03
RB
512int null_perf_irq(struct pt_regs *regs)
513{
514 return 0;
515}
516
517int (*perf_irq)(struct pt_regs *regs) = null_perf_irq;
518
519EXPORT_SYMBOL(null_perf_irq);
520EXPORT_SYMBOL(perf_irq);
521
1da177e4
LT
522asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs)
523{
ba339c03
RB
524 int r2 = cpu_has_mips_r2;
525
1da177e4
LT
526 irq_enter();
527 kstat_this_cpu.irqs[irq]++;
528
ba339c03
RB
529 /*
530 * Suckage alert:
531 * Before R2 of the architecture there was no way to see if a
532 * performance counter interrupt was pending, so we have to run the
533 * performance counter interrupt handler anyway.
534 */
535 if (!r2 || (read_c0_cause() & (1 << 26)))
536 if (perf_irq(regs))
537 goto out;
538
1da177e4 539 /* we keep interrupt disabled all the time */
ba339c03
RB
540 if (!r2 || (read_c0_cause() & (1 << 30)))
541 timer_interrupt(irq, NULL, regs);
1da177e4 542
ba339c03 543out:
1da177e4
LT
544 irq_exit();
545}
546
547asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
548{
549 irq_enter();
550 if (smp_processor_id() != 0)
551 kstat_this_cpu.irqs[irq]++;
552
553 /* we keep interrupt disabled all the time */
554 local_timer_interrupt(irq, NULL, regs);
555
556 irq_exit();
557}
558
559/*
560 * time_init() - it does the following things.
561 *
562 * 1) board_time_init() -
563 * a) (optional) set up RTC routines,
564 * b) (optional) calibrate and set the mips_hpt_frequency
565 * (only needed if you intended to use fixed_rate_gettimeoffset
566 * or use cpu counter as timer interrupt source)
d23ee8fe 567 * 2) setup xtime based on rtc_mips_get_time().
1da177e4
LT
568 * 3) choose a appropriate gettimeoffset routine.
569 * 4) calculate a couple of cached variables for later usage
570 * 5) board_timer_setup() -
571 * a) (optional) over-write any choices made above by time_init().
572 * b) machine specific code should setup the timer irqaction.
573 * c) enable the timer interrupt
574 */
575
576void (*board_time_init)(void);
577void (*board_timer_setup)(struct irqaction *irq);
578
579unsigned int mips_hpt_frequency;
580
581static struct irqaction timer_irqaction = {
582 .handler = timer_interrupt,
583 .flags = SA_INTERRUPT,
584 .name = "timer",
585};
586
587static unsigned int __init calibrate_hpt(void)
588{
589 u64 frequency;
590 u32 hpt_start, hpt_end, hpt_count, hz;
591
592 const int loops = HZ / 10;
593 int log_2_loops = 0;
594 int i;
595
596 /*
597 * We want to calibrate for 0.1s, but to avoid a 64-bit
598 * division we round the number of loops up to the nearest
599 * power of 2.
600 */
601 while (loops > 1 << log_2_loops)
602 log_2_loops++;
603 i = 1 << log_2_loops;
604
605 /*
606 * Wait for a rising edge of the timer interrupt.
607 */
608 while (mips_timer_state());
609 while (!mips_timer_state());
610
611 /*
612 * Now see how many high precision timer ticks happen
613 * during the calculated number of periods between timer
614 * interrupts.
615 */
616 hpt_start = mips_hpt_read();
617 do {
618 while (mips_timer_state());
619 while (!mips_timer_state());
620 } while (--i);
621 hpt_end = mips_hpt_read();
622
623 hpt_count = hpt_end - hpt_start;
624 hz = HZ;
625 frequency = (u64)hpt_count * (u64)hz;
626
627 return frequency >> log_2_loops;
628}
629
630void __init time_init(void)
631{
632 if (board_time_init)
633 board_time_init();
634
d23ee8fe
YY
635 if (!rtc_mips_set_mmss)
636 rtc_mips_set_mmss = rtc_mips_set_time;
1da177e4 637
d23ee8fe 638 xtime.tv_sec = rtc_mips_get_time();
1da177e4
LT
639 xtime.tv_nsec = 0;
640
641 set_normalized_timespec(&wall_to_monotonic,
642 -xtime.tv_sec, -xtime.tv_nsec);
643
644 /* Choose appropriate high precision timer routines. */
645 if (!cpu_has_counter && !mips_hpt_read) {
646 /* No high precision timer -- sorry. */
647 mips_hpt_read = null_hpt_read;
648 mips_hpt_init = null_hpt_init;
649 } else if (!mips_hpt_frequency && !mips_timer_state) {
650 /* A high precision timer of unknown frequency. */
651 if (!mips_hpt_read) {
652 /* No external high precision timer -- use R4k. */
653 mips_hpt_read = c0_hpt_read;
654 mips_hpt_init = c0_hpt_init;
655 }
656
b4672d37
RB
657 if (cpu_has_mips32r1 || cpu_has_mips32r2 ||
658 (current_cpu_data.isa_level == MIPS_CPU_ISA_I) ||
659 (current_cpu_data.isa_level == MIPS_CPU_ISA_II))
1da177e4
LT
660 /*
661 * We need to calibrate the counter but we don't have
662 * 64-bit division.
663 */
664 do_gettimeoffset = calibrate_div32_gettimeoffset;
665 else
666 /*
667 * We need to calibrate the counter but we *do* have
668 * 64-bit division.
669 */
670 do_gettimeoffset = calibrate_div64_gettimeoffset;
671 } else {
672 /* We know counter frequency. Or we can get it. */
673 if (!mips_hpt_read) {
674 /* No external high precision timer -- use R4k. */
675 mips_hpt_read = c0_hpt_read;
676
677 if (mips_timer_state)
678 mips_hpt_init = c0_hpt_init;
679 else {
680 /* No external timer interrupt -- use R4k. */
681 mips_hpt_init = c0_hpt_timer_init;
682 mips_timer_ack = c0_timer_ack;
683 }
684 }
685 if (!mips_hpt_frequency)
686 mips_hpt_frequency = calibrate_hpt();
687
688 do_gettimeoffset = fixed_rate_gettimeoffset;
689
690 /* Calculate cache parameters. */
691 cycles_per_jiffy = (mips_hpt_frequency + HZ / 2) / HZ;
692
693 /* sll32_usecs_per_cycle = 10^6 * 2^32 / mips_counter_freq */
694 do_div64_32(sll32_usecs_per_cycle,
695 1000000, mips_hpt_frequency / 2,
696 mips_hpt_frequency);
697
698 /* Report the high precision timer rate for a reference. */
699 printk("Using %u.%03u MHz high precision timer.\n",
700 ((mips_hpt_frequency + 500) / 1000) / 1000,
701 ((mips_hpt_frequency + 500) / 1000) % 1000);
702 }
703
704 if (!mips_timer_ack)
705 /* No timer interrupt ack (e.g. i8254). */
706 mips_timer_ack = null_timer_ack;
707
708 /* This sets up the high precision timer for the first interrupt. */
709 mips_hpt_init(mips_hpt_read());
710
711 /*
712 * Call board specific timer interrupt setup.
713 *
714 * this pointer must be setup in machine setup routine.
715 *
716 * Even if a machine chooses to use a low-level timer interrupt,
717 * it still needs to setup the timer_irqaction.
718 * In that case, it might be better to set timer_irqaction.handler
719 * to be NULL function so that we are sure the high-level code
720 * is not invoked accidentally.
721 */
722 board_timer_setup(&timer_irqaction);
723}
724
725#define FEBRUARY 2
726#define STARTOFTIME 1970
727#define SECDAY 86400L
728#define SECYR (SECDAY * 365)
729#define leapyear(y) ((!((y) % 4) && ((y) % 100)) || !((y) % 400))
730#define days_in_year(y) (leapyear(y) ? 366 : 365)
731#define days_in_month(m) (month_days[(m) - 1])
732
733static int month_days[12] = {
734 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
735};
736
737void to_tm(unsigned long tim, struct rtc_time *tm)
738{
739 long hms, day, gday;
740 int i;
741
742 gday = day = tim / SECDAY;
743 hms = tim % SECDAY;
744
745 /* Hours, minutes, seconds are easy */
746 tm->tm_hour = hms / 3600;
747 tm->tm_min = (hms % 3600) / 60;
748 tm->tm_sec = (hms % 3600) % 60;
749
750 /* Number of years in days */
751 for (i = STARTOFTIME; day >= days_in_year(i); i++)
752 day -= days_in_year(i);
753 tm->tm_year = i;
754
755 /* Number of months in days left */
756 if (leapyear(tm->tm_year))
757 days_in_month(FEBRUARY) = 29;
758 for (i = 1; day >= days_in_month(i); i++)
759 day -= days_in_month(i);
760 days_in_month(FEBRUARY) = 28;
761 tm->tm_mon = i - 1; /* tm_mon starts from 0 to 11 */
762
763 /* Days are what is left over (+1) from all that. */
764 tm->tm_mday = day + 1;
765
766 /*
767 * Determine the day of week
768 */
769 tm->tm_wday = (gday + 4) % 7; /* 1970/1/1 was Thursday */
770}
771
772EXPORT_SYMBOL(rtc_lock);
773EXPORT_SYMBOL(to_tm);
d23ee8fe
YY
774EXPORT_SYMBOL(rtc_mips_set_time);
775EXPORT_SYMBOL(rtc_mips_get_time);
1da177e4
LT
776
777unsigned long long sched_clock(void)
778{
779 return (unsigned long long)jiffies*(1000000000/HZ);
780}