[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / m32r / include / asm / pgtable-2level.h

#ifndef _ASM_M32R_PGTABLE_2LEVEL_H
#define _ASM_M32R_PGTABLE_2LEVEL_H
#ifdef __KERNEL__

/*
 * traditional M32R two-level paging structure:
 */

#define PGDIR_SHIFT	22
#define PTRS_PER_PGD	1024

/*
 * the M32R is two-level, so we don't really have any
 * PMD directory physically.
 */
#define PMD_SHIFT	22
#define PTRS_PER_PMD	1

#define PTRS_PER_PTE	1024

#define pte_ERROR(e) \
	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
#define pmd_ERROR(e) \
	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
#define pgd_ERROR(e) \
	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))

/*
 * The "pgd_xxx()" functions here are trivial for a folded two-level
 * setup: the pgd is never bad, and a pmd always exists (as it's folded
 * into the pgd entry)
 */
static inline int pgd_none(pgd_t pgd)	{ return 0; }
static inline int pgd_bad(pgd_t pgd)	{ return 0; }
static inline int pgd_present(pgd_t pgd)	{ return 1; }
#define pgd_clear(xp)				do { } while (0)

/*
 * Certain architectures need to do special things when PTEs
 * within a page table are directly modified.  Thus, the following
 * hook is made available.
 */
#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)

/*
 * (pmds are folded into pgds so this doesn't get actually called,
 * but the define is needed for a generic inline function.)
 */
#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)

#define pgd_page_vaddr(pgd) \
((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))

#ifndef CONFIG_DISCONTIGMEM
#define pgd_page(pgd)	(mem_map + ((pgd_val(pgd) >> PAGE_SHIFT) - PFN_BASE))
#endif /* !CONFIG_DISCONTIGMEM */

static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
{
	return (pmd_t *) dir;
}

#define ptep_get_and_clear(mm,addr,xp)	__pte(xchg(&(xp)->pte, 0))
#define pte_same(a, b)		(pte_val(a) == pte_val(b))
#define pte_page(x)		pfn_to_page(pte_pfn(x))
#define pte_none(x)		(!pte_val(x))
#define pte_pfn(x)		(pte_val(x) >> PAGE_SHIFT)
#define pfn_pte(pfn, prot)	__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
#define pfn_pmd(pfn, prot)	__pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))

#define PTE_FILE_MAX_BITS	29
#define pte_to_pgoff(pte)	(((pte_val(pte) >> 2) & 0x7f) | (((pte_val(pte) >> 10)) << 7))
#define pgoff_to_pte(off)	((pte_t) { (((off) & 0x7f) << 2) | (((off) >> 7) << 10) | _PAGE_FILE })

#endif /* __KERNEL__ */
#endif /* _ASM_M32R_PGTABLE_2LEVEL_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _ASM_M32R_PGTABLE_2LEVEL_H
1da177e4 LT	2	#define _ASM_M32R_PGTABLE_2LEVEL_H
1da177e4 LT	3	#ifdef __KERNEL__
1da177e4 LT	4
1da177e4 LT	5	/*
	6	* traditional M32R two-level paging structure:
	7	*/
	8
	9	#define PGDIR_SHIFT 22
	10	#define PTRS_PER_PGD 1024
	11
	12	/*
	13	* the M32R is two-level, so we don't really have any
	14	* PMD directory physically.
	15	*/
	16	#define PMD_SHIFT 22
	17	#define PTRS_PER_PMD 1
	18
	19	#define PTRS_PER_PTE 1024
	20
	21	#define pte_ERROR(e) \
	22	printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
	23	#define pmd_ERROR(e) \
	24	printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
	25	#define pgd_ERROR(e) \
	26	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
	27
	28	/*
	29	* The "pgd_xxx()" functions here are trivial for a folded two-level
	30	* setup: the pgd is never bad, and a pmd always exists (as it's folded
	31	* into the pgd entry)
	32	*/
	33	static inline int pgd_none(pgd_t pgd) { return 0; }
	34	static inline int pgd_bad(pgd_t pgd) { return 0; }
	35	static inline int pgd_present(pgd_t pgd) { return 1; }
	36	#define pgd_clear(xp) do { } while (0)
	37
	38	/*
	39	* Certain architectures need to do special things when PTEs
	40	* within a page table are directly modified. Thus, the following
	41	* hook is made available.
	42	*/
	43	#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
	44	#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
a93cb055	45
1da177e4	46	/*
25985edc	47	* (pmds are folded into pgds so this doesn't get actually called,
1da177e4 LT	48	* but the define is needed for a generic inline function.)
	49	*/
	50	#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
	51	#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
	52
46a82b2d	53	#define pgd_page_vaddr(pgd) \
1da177e4 LT	54	((unsigned long) __va(pgd_val(pgd) & PAGE_MASK))
1da177e4 LT	55
46a82b2d DM	56	#ifndef CONFIG_DISCONTIGMEM
	57	#define pgd_page(pgd) (mem_map + ((pgd_val(pgd) >> PAGE_SHIFT) - PFN_BASE))
	58	#endif /* !CONFIG_DISCONTIGMEM */
	59
1da177e4 LT	60	static inline pmd_t pmd_offset(pgd_t dir, unsigned long address)
	61	{
	62	return (pmd_t *) dir;
	63	}
	64
	65	#define ptep_get_and_clear(mm,addr,xp) __pte(xchg(&(xp)->pte, 0))
	66	#define pte_same(a, b) (pte_val(a) == pte_val(b))
	67	#define pte_page(x) pfn_to_page(pte_pfn(x))
	68	#define pte_none(x) (!pte_val(x))
	69	#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
	70	#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) \| pgprot_val(prot))
	71	#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) \| pgprot_val(prot))
	72
	73	#define PTE_FILE_MAX_BITS 29
23c9bbba HT	74	#define pte_to_pgoff(pte) (((pte_val(pte) >> 2) & 0x7f) \| (((pte_val(pte) >> 10)) << 7))
23c9bbba HT	75	#define pgoff_to_pte(off) ((pte_t) { (((off) & 0x7f) << 2) \| (((off) >> 7) << 10) \| _PAGE_FILE })
1da177e4 LT	76
1da177e4 LT	77	#endif /* __KERNEL__ */
1da177e4	78	#endif /* _ASM_M32R_PGTABLE_2LEVEL_H */