include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / ia64 / kernel / mca_drv.c
CommitLineData
1da177e4
LT
1/*
2 * File: mca_drv.c
3 * Purpose: Generic MCA handling layer
4 *
5 * Copyright (C) 2004 FUJITSU LIMITED
fe77efb8 6 * Copyright (C) 2004 Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
7f613c7d
KO
7 * Copyright (C) 2005 Silicon Graphics, Inc
8 * Copyright (C) 2005 Keith Owens <kaos@sgi.com>
d2a28ad9 9 * Copyright (C) 2006 Russ Anderson <rja@sgi.com>
1da177e4 10 */
1da177e4
LT
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/sched.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/kallsyms.h>
1da177e4
LT
17#include <linux/bootmem.h>
18#include <linux/acpi.h>
19#include <linux/timer.h>
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/smp.h>
23#include <linux/workqueue.h>
24#include <linux/mm.h>
5a0e3ad6 25#include <linux/slab.h>
1da177e4
LT
26
27#include <asm/delay.h>
28#include <asm/machvec.h>
29#include <asm/page.h>
30#include <asm/ptrace.h>
31#include <asm/system.h>
32#include <asm/sal.h>
33#include <asm/mca.h>
34
35#include <asm/irq.h>
36#include <asm/hw_irq.h>
37
38#include "mca_drv.h"
39
40/* max size of SAL error record (default) */
41static int sal_rec_max = 10000;
42
1da177e4
LT
43/* from mca_drv_asm.S */
44extern void *mca_handler_bhhook(void);
45
46static DEFINE_SPINLOCK(mca_bh_lock);
47
48typedef enum {
49 MCA_IS_LOCAL = 0,
50 MCA_IS_GLOBAL = 1
51} mca_type_t;
52
53#define MAX_PAGE_ISOLATE 1024
54
55static struct page *page_isolate[MAX_PAGE_ISOLATE];
56static int num_page_isolate = 0;
57
58typedef enum {
4881e2cd
HS
59 ISOLATE_NG,
60 ISOLATE_OK,
61 ISOLATE_NONE
1da177e4
LT
62} isolate_status_t;
63
18997961
RA
64typedef enum {
65 MCA_NOT_RECOVERED = 0,
66 MCA_RECOVERED = 1
67} recovery_status_t;
68
1da177e4
LT
69/*
70 * This pool keeps pointers to the section part of SAL error record
71 */
72static struct {
73 slidx_list_t *buffer; /* section pointer list pool */
74 int cur_idx; /* Current index of section pointer list pool */
75 int max_idx; /* Maximum index of section pointer list pool */
76} slidx_pool;
77
18997961
RA
78static int
79fatal_mca(const char *fmt, ...)
80{
81 va_list args;
43ed3baf 82 char buf[256];
18997961
RA
83
84 va_start(args, fmt);
43ed3baf 85 vsnprintf(buf, sizeof(buf), fmt, args);
18997961 86 va_end(args);
43ed3baf 87 ia64_mca_printk(KERN_ALERT "MCA: %s\n", buf);
18997961
RA
88
89 return MCA_NOT_RECOVERED;
90}
91
43ed3baf
HS
92static int
93mca_recovered(const char *fmt, ...)
94{
95 va_list args;
96 char buf[256];
97
98 va_start(args, fmt);
99 vsnprintf(buf, sizeof(buf), fmt, args);
100 va_end(args);
101 ia64_mca_printk(KERN_INFO "MCA: %s\n", buf);
102
103 return MCA_RECOVERED;
104}
105
1da177e4
LT
106/**
107 * mca_page_isolate - isolate a poisoned page in order not to use it later
108 * @paddr: poisoned memory location
109 *
110 * Return value:
4881e2cd 111 * one of isolate_status_t, ISOLATE_OK/NG/NONE.
1da177e4
LT
112 */
113
114static isolate_status_t
115mca_page_isolate(unsigned long paddr)
116{
117 int i;
118 struct page *p;
119
120 /* whether physical address is valid or not */
20305e59 121 if (!ia64_phys_addr_valid(paddr))
4881e2cd
HS
122 return ISOLATE_NONE;
123
56f87b82 124 if (!pfn_valid(paddr >> PAGE_SHIFT))
4881e2cd 125 return ISOLATE_NONE;
1da177e4
LT
126
127 /* convert physical address to physical page number */
128 p = pfn_to_page(paddr>>PAGE_SHIFT);
129
130 /* check whether a page number have been already registered or not */
20305e59
HS
131 for (i = 0; i < num_page_isolate; i++)
132 if (page_isolate[i] == p)
1da177e4
LT
133 return ISOLATE_OK; /* already listed */
134
135 /* limitation check */
20305e59 136 if (num_page_isolate == MAX_PAGE_ISOLATE)
1da177e4
LT
137 return ISOLATE_NG;
138
139 /* kick pages having attribute 'SLAB' or 'Reserved' */
20305e59 140 if (PageSlab(p) || PageReserved(p))
1da177e4
LT
141 return ISOLATE_NG;
142
143 /* add attribute 'Reserved' and register the page */
cbb92144 144 get_page(p);
1da177e4
LT
145 SetPageReserved(p);
146 page_isolate[num_page_isolate++] = p;
147
148 return ISOLATE_OK;
149}
150
151/**
152 * mca_hanlder_bh - Kill the process which occurred memory read error
153 * @paddr: poisoned address received from MCA Handler
154 */
155
156void
d2a28ad9 157mca_handler_bh(unsigned long paddr, void *iip, unsigned long ipsr)
1da177e4 158{
43ed3baf 159 ia64_mlogbuf_dump();
d2a28ad9
RA
160 printk(KERN_ERR "OS_MCA: process [cpu %d, pid: %d, uid: %d, "
161 "iip: %p, psr: 0x%lx,paddr: 0x%lx](%s) encounters MCA.\n",
ef81ee98 162 raw_smp_processor_id(), current->pid, current_uid(),
d2a28ad9 163 iip, ipsr, paddr, current->comm);
1da177e4
LT
164
165 spin_lock(&mca_bh_lock);
4881e2cd
HS
166 switch (mca_page_isolate(paddr)) {
167 case ISOLATE_OK:
1da177e4 168 printk(KERN_DEBUG "Page isolation: ( %lx ) success.\n", paddr);
4881e2cd
HS
169 break;
170 case ISOLATE_NG:
ea0e92a6 171 printk(KERN_CRIT "Page isolation: ( %lx ) failure.\n", paddr);
4881e2cd
HS
172 break;
173 default:
174 break;
1da177e4
LT
175 }
176 spin_unlock(&mca_bh_lock);
177
178 /* This process is about to be killed itself */
b1b901c2 179 do_exit(SIGKILL);
1da177e4
LT
180}
181
182/**
183 * mca_make_peidx - Make index of processor error section
184 * @slpi: pointer to record of processor error section
185 * @peidx: pointer to index of processor error section
186 */
187
20305e59 188static void
1da177e4
LT
189mca_make_peidx(sal_log_processor_info_t *slpi, peidx_table_t *peidx)
190{
20305e59 191 /*
1da177e4
LT
192 * calculate the start address of
193 * "struct cpuid_info" and "sal_processor_static_info_t".
194 */
195 u64 total_check_num = slpi->valid.num_cache_check
196 + slpi->valid.num_tlb_check
197 + slpi->valid.num_bus_check
198 + slpi->valid.num_reg_file_check
199 + slpi->valid.num_ms_check;
200 u64 head_size = sizeof(sal_log_mod_error_info_t) * total_check_num
201 + sizeof(sal_log_processor_info_t);
202 u64 mid_size = slpi->valid.cpuid_info * sizeof(struct sal_cpuid_info);
203
204 peidx_head(peidx) = slpi;
205 peidx_mid(peidx) = (struct sal_cpuid_info *)
206 (slpi->valid.cpuid_info ? ((char*)slpi + head_size) : NULL);
207 peidx_bottom(peidx) = (sal_processor_static_info_t *)
208 (slpi->valid.psi_static_struct ?
209 ((char*)slpi + head_size + mid_size) : NULL);
210}
211
212/**
20305e59 213 * mca_make_slidx - Make index of SAL error record
1da177e4
LT
214 * @buffer: pointer to SAL error record
215 * @slidx: pointer to index of SAL error record
216 *
217 * Return value:
218 * 1 if record has platform error / 0 if not
219 */
220#define LOG_INDEX_ADD_SECT_PTR(sect, ptr) \
20305e59
HS
221 {slidx_list_t *hl = &slidx_pool.buffer[slidx_pool.cur_idx]; \
222 hl->hdr = ptr; \
223 list_add(&hl->list, &(sect)); \
224 slidx_pool.cur_idx = (slidx_pool.cur_idx + 1)%slidx_pool.max_idx; }
1da177e4 225
20305e59 226static int
1da177e4
LT
227mca_make_slidx(void *buffer, slidx_table_t *slidx)
228{
229 int platform_err = 0;
230 int record_len = ((sal_log_record_header_t*)buffer)->len;
231 u32 ercd_pos;
232 int sects;
233 sal_log_section_hdr_t *sp;
234
235 /*
236 * Initialize index referring current record
237 */
238 INIT_LIST_HEAD(&(slidx->proc_err));
239 INIT_LIST_HEAD(&(slidx->mem_dev_err));
240 INIT_LIST_HEAD(&(slidx->sel_dev_err));
241 INIT_LIST_HEAD(&(slidx->pci_bus_err));
242 INIT_LIST_HEAD(&(slidx->smbios_dev_err));
243 INIT_LIST_HEAD(&(slidx->pci_comp_err));
244 INIT_LIST_HEAD(&(slidx->plat_specific_err));
245 INIT_LIST_HEAD(&(slidx->host_ctlr_err));
246 INIT_LIST_HEAD(&(slidx->plat_bus_err));
247 INIT_LIST_HEAD(&(slidx->unsupported));
248
249 /*
250 * Extract a Record Header
251 */
252 slidx->header = buffer;
253
254 /*
255 * Extract each section records
256 * (arranged from "int ia64_log_platform_info_print()")
257 */
258 for (ercd_pos = sizeof(sal_log_record_header_t), sects = 0;
259 ercd_pos < record_len; ercd_pos += sp->len, sects++) {
260 sp = (sal_log_section_hdr_t *)((char*)buffer + ercd_pos);
261 if (!efi_guidcmp(sp->guid, SAL_PROC_DEV_ERR_SECT_GUID)) {
262 LOG_INDEX_ADD_SECT_PTR(slidx->proc_err, sp);
20305e59
HS
263 } else if (!efi_guidcmp(sp->guid,
264 SAL_PLAT_MEM_DEV_ERR_SECT_GUID)) {
1da177e4
LT
265 platform_err = 1;
266 LOG_INDEX_ADD_SECT_PTR(slidx->mem_dev_err, sp);
20305e59
HS
267 } else if (!efi_guidcmp(sp->guid,
268 SAL_PLAT_SEL_DEV_ERR_SECT_GUID)) {
1da177e4
LT
269 platform_err = 1;
270 LOG_INDEX_ADD_SECT_PTR(slidx->sel_dev_err, sp);
20305e59
HS
271 } else if (!efi_guidcmp(sp->guid,
272 SAL_PLAT_PCI_BUS_ERR_SECT_GUID)) {
1da177e4
LT
273 platform_err = 1;
274 LOG_INDEX_ADD_SECT_PTR(slidx->pci_bus_err, sp);
20305e59
HS
275 } else if (!efi_guidcmp(sp->guid,
276 SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID)) {
1da177e4
LT
277 platform_err = 1;
278 LOG_INDEX_ADD_SECT_PTR(slidx->smbios_dev_err, sp);
20305e59
HS
279 } else if (!efi_guidcmp(sp->guid,
280 SAL_PLAT_PCI_COMP_ERR_SECT_GUID)) {
1da177e4
LT
281 platform_err = 1;
282 LOG_INDEX_ADD_SECT_PTR(slidx->pci_comp_err, sp);
20305e59
HS
283 } else if (!efi_guidcmp(sp->guid,
284 SAL_PLAT_SPECIFIC_ERR_SECT_GUID)) {
1da177e4
LT
285 platform_err = 1;
286 LOG_INDEX_ADD_SECT_PTR(slidx->plat_specific_err, sp);
20305e59
HS
287 } else if (!efi_guidcmp(sp->guid,
288 SAL_PLAT_HOST_CTLR_ERR_SECT_GUID)) {
1da177e4
LT
289 platform_err = 1;
290 LOG_INDEX_ADD_SECT_PTR(slidx->host_ctlr_err, sp);
20305e59
HS
291 } else if (!efi_guidcmp(sp->guid,
292 SAL_PLAT_BUS_ERR_SECT_GUID)) {
1da177e4
LT
293 platform_err = 1;
294 LOG_INDEX_ADD_SECT_PTR(slidx->plat_bus_err, sp);
295 } else {
296 LOG_INDEX_ADD_SECT_PTR(slidx->unsupported, sp);
297 }
298 }
299 slidx->n_sections = sects;
300
301 return platform_err;
302}
303
304/**
305 * init_record_index_pools - Initialize pool of lists for SAL record index
306 *
307 * Return value:
308 * 0 on Success / -ENOMEM on Failure
309 */
20305e59 310static int
1da177e4
LT
311init_record_index_pools(void)
312{
313 int i;
314 int rec_max_size; /* Maximum size of SAL error records */
315 int sect_min_size; /* Minimum size of SAL error sections */
316 /* minimum size table of each section */
20305e59
HS
317 static int sal_log_sect_min_sizes[] = {
318 sizeof(sal_log_processor_info_t)
319 + sizeof(sal_processor_static_info_t),
1da177e4
LT
320 sizeof(sal_log_mem_dev_err_info_t),
321 sizeof(sal_log_sel_dev_err_info_t),
322 sizeof(sal_log_pci_bus_err_info_t),
323 sizeof(sal_log_smbios_dev_err_info_t),
324 sizeof(sal_log_pci_comp_err_info_t),
325 sizeof(sal_log_plat_specific_err_info_t),
326 sizeof(sal_log_host_ctlr_err_info_t),
327 sizeof(sal_log_plat_bus_err_info_t),
328 };
329
330 /*
331 * MCA handler cannot allocate new memory on flight,
332 * so we preallocate enough memory to handle a SAL record.
333 *
334 * Initialize a handling set of slidx_pool:
335 * 1. Pick up the max size of SAL error records
336 * 2. Pick up the min size of SAL error sections
337 * 3. Allocate the pool as enough to 2 SAL records
338 * (now we can estimate the maxinum of section in a record.)
339 */
340
341 /* - 1 - */
342 rec_max_size = sal_rec_max;
343
344 /* - 2 - */
345 sect_min_size = sal_log_sect_min_sizes[0];
346 for (i = 1; i < sizeof sal_log_sect_min_sizes/sizeof(size_t); i++)
347 if (sect_min_size > sal_log_sect_min_sizes[i])
348 sect_min_size = sal_log_sect_min_sizes[i];
349
350 /* - 3 - */
351 slidx_pool.max_idx = (rec_max_size/sect_min_size) * 2 + 1;
20305e59
HS
352 slidx_pool.buffer = (slidx_list_t *)
353 kmalloc(slidx_pool.max_idx * sizeof(slidx_list_t), GFP_KERNEL);
1da177e4
LT
354
355 return slidx_pool.buffer ? 0 : -ENOMEM;
356}
357
358
359/*****************************************************************************
360 * Recovery functions *
361 *****************************************************************************/
362
363/**
364 * is_mca_global - Check whether this MCA is global or not
365 * @peidx: pointer of index of processor error section
366 * @pbci: pointer to pal_bus_check_info_t
20305e59 367 * @sos: pointer to hand off struct between SAL and OS
1da177e4
LT
368 *
369 * Return value:
370 * MCA_IS_LOCAL / MCA_IS_GLOBAL
371 */
372
373static mca_type_t
7f613c7d
KO
374is_mca_global(peidx_table_t *peidx, pal_bus_check_info_t *pbci,
375 struct ia64_sal_os_state *sos)
1da177e4 376{
20305e59
HS
377 pal_processor_state_info_t *psp =
378 (pal_processor_state_info_t*)peidx_psp(peidx);
1da177e4 379
20305e59 380 /*
1da177e4 381 * PAL can request a rendezvous, if the MCA has a global scope.
20305e59 382 * If "rz_always" flag is set, SAL requests MCA rendezvous
1da177e4
LT
383 * in spite of global MCA.
384 * Therefore it is local MCA when rendezvous has not been requested.
385 * Failed to rendezvous, the system must be down.
386 */
7f613c7d 387 switch (sos->rv_rc) {
1da177e4
LT
388 case -1: /* SAL rendezvous unsuccessful */
389 return MCA_IS_GLOBAL;
390 case 0: /* SAL rendezvous not required */
391 return MCA_IS_LOCAL;
392 case 1: /* SAL rendezvous successful int */
393 case 2: /* SAL rendezvous successful int with init */
394 default:
395 break;
396 }
397
398 /*
399 * If One or more Cache/TLB/Reg_File/Uarch_Check is here,
400 * it would be a local MCA. (i.e. processor internal error)
401 */
402 if (psp->tc || psp->cc || psp->rc || psp->uc)
403 return MCA_IS_LOCAL;
404
405 /*
406 * Bus_Check structure with Bus_Check.ib (internal bus error) flag set
407 * would be a global MCA. (e.g. a system bus address parity error)
408 */
409 if (!pbci || pbci->ib)
410 return MCA_IS_GLOBAL;
411
412 /*
413 * Bus_Check structure with Bus_Check.eb (external bus error) flag set
414 * could be either a local MCA or a global MCA.
415 *
416 * Referring Bus_Check.bsi:
417 * 0: Unknown/unclassified
418 * 1: BERR#
419 * 2: BINIT#
420 * 3: Hard Fail
421 * (FIXME: Are these SGI specific or generic bsi values?)
422 */
423 if (pbci->eb)
424 switch (pbci->bsi) {
425 case 0:
426 /* e.g. a load from poisoned memory */
427 return MCA_IS_LOCAL;
428 case 1:
429 case 2:
430 case 3:
431 return MCA_IS_GLOBAL;
432 }
433
434 return MCA_IS_GLOBAL;
435}
436
264b0f99
RA
437/**
438 * get_target_identifier - Get the valid Cache or Bus check target identifier.
439 * @peidx: pointer of index of processor error section
440 *
441 * Return value:
72fdbdce 442 * target address on Success / 0 on Failure
264b0f99
RA
443 */
444static u64
445get_target_identifier(peidx_table_t *peidx)
446{
447 u64 target_address = 0;
448 sal_log_mod_error_info_t *smei;
449 pal_cache_check_info_t *pcci;
450 int i, level = 9;
451
452 /*
453 * Look through the cache checks for a valid target identifier
454 * If more than one valid target identifier, return the one
455 * with the lowest cache level.
456 */
457 for (i = 0; i < peidx_cache_check_num(peidx); i++) {
458 smei = (sal_log_mod_error_info_t *)peidx_cache_check(peidx, i);
459 if (smei->valid.target_identifier && smei->target_identifier) {
460 pcci = (pal_cache_check_info_t *)&(smei->check_info);
461 if (!target_address || (pcci->level < level)) {
462 target_address = smei->target_identifier;
463 level = pcci->level;
464 continue;
465 }
466 }
467 }
468 if (target_address)
469 return target_address;
470
471 /*
472 * Look at the bus check for a valid target identifier
473 */
474 smei = peidx_bus_check(peidx, 0);
475 if (smei && smei->valid.target_identifier)
476 return smei->target_identifier;
477
478 return 0;
479}
480
1da177e4
LT
481/**
482 * recover_from_read_error - Try to recover the errors which type are "read"s.
483 * @slidx: pointer of index of SAL error record
484 * @peidx: pointer of index of processor error section
485 * @pbci: pointer of pal_bus_check_info
20305e59 486 * @sos: pointer to hand off struct between SAL and OS
1da177e4
LT
487 *
488 * Return value:
489 * 1 on Success / 0 on Failure
490 */
491
492static int
20305e59
HS
493recover_from_read_error(slidx_table_t *slidx,
494 peidx_table_t *peidx, pal_bus_check_info_t *pbci,
7f613c7d 495 struct ia64_sal_os_state *sos)
1da177e4 496{
264b0f99 497 u64 target_identifier;
1da177e4
LT
498 pal_min_state_area_t *pmsa;
499 struct ia64_psr *psr1, *psr2;
500 ia64_fptr_t *mca_hdlr_bh = (ia64_fptr_t*)mca_handler_bhhook;
501
502 /* Is target address valid? */
264b0f99
RA
503 target_identifier = get_target_identifier(peidx);
504 if (!target_identifier)
43ed3baf 505 return fatal_mca("target address not valid");
1da177e4
LT
506
507 /*
508 * cpu read or memory-mapped io read
509 *
510 * offending process affected process OS MCA do
511 * kernel mode kernel mode down system
512 * kernel mode user mode kill the process
513 * user mode kernel mode down system (*)
514 * user mode user mode kill the process
515 *
516 * (*) You could terminate offending user-mode process
517 * if (pbci->pv && pbci->pl != 0) *and* if you sure
518 * the process not have any locks of kernel.
519 */
520
a9474646
HS
521 /* Is minstate valid? */
522 if (!peidx_bottom(peidx) || !(peidx_bottom(peidx)->valid.minstate))
43ed3baf 523 return fatal_mca("minstate not valid");
1da177e4 524 psr1 =(struct ia64_psr *)&(peidx_minstate_area(peidx)->pmsa_ipsr);
d2a28ad9 525 psr2 =(struct ia64_psr *)&(peidx_minstate_area(peidx)->pmsa_xpsr);
1da177e4
LT
526
527 /*
528 * Check the privilege level of interrupted context.
529 * If it is user-mode, then terminate affected process.
530 */
d2a28ad9
RA
531
532 pmsa = sos->pal_min_state;
533 if (psr1->cpl != 0 ||
534 ((psr2->cpl != 0) && mca_recover_range(pmsa->pmsa_iip))) {
264b0f99
RA
535 /*
536 * setup for resume to bottom half of MCA,
537 * "mca_handler_bhhook"
538 */
539 /* pass to bhhook as argument (gr8, ...) */
540 pmsa->pmsa_gr[8-1] = target_identifier;
541 pmsa->pmsa_gr[9-1] = pmsa->pmsa_iip;
542 pmsa->pmsa_gr[10-1] = pmsa->pmsa_ipsr;
543 /* set interrupted return address (but no use) */
544 pmsa->pmsa_br0 = pmsa->pmsa_iip;
545 /* change resume address to bottom half */
546 pmsa->pmsa_iip = mca_hdlr_bh->fp;
547 pmsa->pmsa_gr[1-1] = mca_hdlr_bh->gp;
548 /* set cpl with kernel mode */
549 psr2 = (struct ia64_psr *)&pmsa->pmsa_ipsr;
550 psr2->cpl = 0;
551 psr2->ri = 0;
552 psr2->bn = 1;
553 psr2->i = 0;
554
555 return mca_recovered("user memory corruption. "
43ed3baf 556 "kill affected process - recovered.");
1da177e4
LT
557 }
558
43ed3baf
HS
559 return fatal_mca("kernel context not recovered, iip 0x%lx\n",
560 pmsa->pmsa_iip);
1da177e4
LT
561}
562
563/**
564 * recover_from_platform_error - Recover from platform error.
565 * @slidx: pointer of index of SAL error record
566 * @peidx: pointer of index of processor error section
567 * @pbci: pointer of pal_bus_check_info
20305e59 568 * @sos: pointer to hand off struct between SAL and OS
1da177e4
LT
569 *
570 * Return value:
571 * 1 on Success / 0 on Failure
572 */
573
574static int
20305e59
HS
575recover_from_platform_error(slidx_table_t *slidx, peidx_table_t *peidx,
576 pal_bus_check_info_t *pbci,
7f613c7d 577 struct ia64_sal_os_state *sos)
1da177e4
LT
578{
579 int status = 0;
20305e59
HS
580 pal_processor_state_info_t *psp =
581 (pal_processor_state_info_t*)peidx_psp(peidx);
1da177e4
LT
582
583 if (psp->bc && pbci->eb && pbci->bsi == 0) {
584 switch(pbci->type) {
585 case 1: /* partial read */
586 case 3: /* full line(cpu) read */
587 case 9: /* I/O space read */
20305e59
HS
588 status = recover_from_read_error(slidx, peidx, pbci,
589 sos);
1da177e4
LT
590 break;
591 case 0: /* unknown */
592 case 2: /* partial write */
593 case 4: /* full line write */
594 case 5: /* implicit or explicit write-back operation */
595 case 6: /* snoop probe */
596 case 7: /* incoming or outgoing ptc.g */
597 case 8: /* write coalescing transactions */
598 case 10: /* I/O space write */
599 case 11: /* inter-processor interrupt message(IPI) */
20305e59
HS
600 case 12: /* interrupt acknowledge or
601 external task priority cycle */
1da177e4
LT
602 default:
603 break;
604 }
396e8e76
RA
605 } else if (psp->cc && !psp->bc) { /* Cache error */
606 status = recover_from_read_error(slidx, peidx, pbci, sos);
1da177e4
LT
607 }
608
609 return status;
610}
611
618b206f
RA
612/*
613 * recover_from_tlb_check
614 * @peidx: pointer of index of processor error section
615 *
616 * Return value:
617 * 1 on Success / 0 on Failure
618 */
619static int
620recover_from_tlb_check(peidx_table_t *peidx)
621{
622 sal_log_mod_error_info_t *smei;
623 pal_tlb_check_info_t *ptci;
624
625 smei = (sal_log_mod_error_info_t *)peidx_tlb_check(peidx, 0);
626 ptci = (pal_tlb_check_info_t *)&(smei->check_info);
627
628 /*
629 * Look for signature of a duplicate TLB DTC entry, which is
630 * a SW bug and always fatal.
631 */
632 if (ptci->op == PAL_TLB_CHECK_OP_PURGE
633 && !(ptci->itr || ptci->dtc || ptci->itc))
634 return fatal_mca("Duplicate TLB entry");
635
636 return mca_recovered("TLB check recovered");
637}
638
1da177e4
LT
639/**
640 * recover_from_processor_error
641 * @platform: whether there are some platform error section or not
642 * @slidx: pointer of index of SAL error record
643 * @peidx: pointer of index of processor error section
644 * @pbci: pointer of pal_bus_check_info
20305e59 645 * @sos: pointer to hand off struct between SAL and OS
1da177e4
LT
646 *
647 * Return value:
648 * 1 on Success / 0 on Failure
649 */
1da177e4
LT
650
651static int
20305e59
HS
652recover_from_processor_error(int platform, slidx_table_t *slidx,
653 peidx_table_t *peidx, pal_bus_check_info_t *pbci,
7f613c7d 654 struct ia64_sal_os_state *sos)
1da177e4 655{
20305e59
HS
656 pal_processor_state_info_t *psp =
657 (pal_processor_state_info_t*)peidx_psp(peidx);
1da177e4 658
20305e59 659 /*
a14f25a0
RA
660 * Processor recovery status must key off of the PAL recovery
661 * status in the Processor State Parameter.
1da177e4 662 */
a14f25a0
RA
663
664 /*
665 * The machine check is corrected.
666 */
667 if (psp->cm == 1)
43ed3baf 668 return mca_recovered("machine check is already corrected.");
a14f25a0
RA
669
670 /*
671 * The error was not contained. Software must be reset.
672 */
673 if (psp->us || psp->ci == 0)
43ed3baf 674 return fatal_mca("error not contained");
1da177e4 675
618b206f
RA
676 /*
677 * Look for recoverable TLB check
678 */
679 if (psp->tc && !(psp->cc || psp->bc || psp->rc || psp->uc))
680 return recover_from_tlb_check(peidx);
681
1da177e4 682 /*
e1c48554
RA
683 * The cache check and bus check bits have four possible states
684 * cc bc
e1c48554 685 * 1 1 Memory error, attempt recovery
396e8e76
RA
686 * 1 0 Cache error, attempt recovery
687 * 0 1 I/O error, attempt recovery
688 * 0 0 Other error type, not recovered
1da177e4 689 */
396e8e76
RA
690 if (psp->cc == 0 && (psp->bc == 0 || pbci == NULL))
691 return fatal_mca("No cache or bus check");
1da177e4
LT
692
693 /*
396e8e76 694 * Cannot handle more than one bus check.
1da177e4
LT
695 */
696 if (peidx_bus_check_num(peidx) > 1)
43ed3baf 697 return fatal_mca("Too many bus checks");
396e8e76 698
18997961 699 if (pbci->ib)
43ed3baf 700 return fatal_mca("Internal Bus error");
1da177e4 701 if (pbci->eb && pbci->bsi > 0)
43ed3baf 702 return fatal_mca("External bus check fatal status");
1da177e4
LT
703
704 /*
72fdbdce 705 * This is a local MCA and estimated as a recoverable error.
1da177e4 706 */
20305e59 707 if (platform)
7f613c7d 708 return recover_from_platform_error(slidx, peidx, pbci, sos);
396e8e76 709
20305e59
HS
710 /*
711 * On account of strange SAL error record, we cannot recover.
1da177e4 712 */
43ed3baf 713 return fatal_mca("Strange SAL record");
1da177e4
LT
714}
715
716/**
717 * mca_try_to_recover - Try to recover from MCA
718 * @rec: pointer to a SAL error record
20305e59 719 * @sos: pointer to hand off struct between SAL and OS
1da177e4
LT
720 *
721 * Return value:
722 * 1 on Success / 0 on Failure
723 */
724
725static int
20305e59 726mca_try_to_recover(void *rec, struct ia64_sal_os_state *sos)
1da177e4
LT
727{
728 int platform_err;
729 int n_proc_err;
730 slidx_table_t slidx;
731 peidx_table_t peidx;
732 pal_bus_check_info_t pbci;
733
1da177e4
LT
734 /* Make index of SAL error record */
735 platform_err = mca_make_slidx(rec, &slidx);
736
737 /* Count processor error sections */
738 n_proc_err = slidx_count(&slidx, proc_err);
739
740 /* Now, OS can recover when there is one processor error section */
741 if (n_proc_err > 1)
43ed3baf 742 return fatal_mca("Too Many Errors");
18997961 743 else if (n_proc_err == 0)
43ed3baf
HS
744 /* Weird SAL record ... We can't do anything */
745 return fatal_mca("Weird SAL record");
1da177e4
LT
746
747 /* Make index of processor error section */
20305e59
HS
748 mca_make_peidx((sal_log_processor_info_t*)
749 slidx_first_entry(&slidx.proc_err)->hdr, &peidx);
1da177e4
LT
750
751 /* Extract Processor BUS_CHECK[0] */
752 *((u64*)&pbci) = peidx_check_info(&peidx, bus_check, 0);
753
754 /* Check whether MCA is global or not */
7f613c7d 755 if (is_mca_global(&peidx, &pbci, sos))
43ed3baf 756 return fatal_mca("global MCA");
1da177e4
LT
757
758 /* Try to recover a processor error */
20305e59
HS
759 return recover_from_processor_error(platform_err, &slidx, &peidx,
760 &pbci, sos);
1da177e4
LT
761}
762
763/*
764 * =============================================================================
765 */
766
767int __init mca_external_handler_init(void)
768{
769 if (init_record_index_pools())
770 return -ENOMEM;
771
772 /* register external mca handlers */
20305e59 773 if (ia64_reg_MCA_extension(mca_try_to_recover)) {
1da177e4
LT
774 printk(KERN_ERR "ia64_reg_MCA_extension failed.\n");
775 kfree(slidx_pool.buffer);
776 return -EFAULT;
777 }
778 return 0;
779}
780
781void __exit mca_external_handler_exit(void)
782{
783 /* unregister external mca handlers */
784 ia64_unreg_MCA_extension();
785 kfree(slidx_pool.buffer);
786}
787
788module_init(mca_external_handler_init);
789module_exit(mca_external_handler_exit);
790
791module_param(sal_rec_max, int, 0644);
792MODULE_PARM_DESC(sal_rec_max, "Max size of SAL error record");
793
794MODULE_DESCRIPTION("ia64 platform dependent mca handler driver");
795MODULE_LICENSE("GPL");