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24a07a12 RH |
1 | /* |
2 | * File: arch/blackfin/mach-bf548/boards/ezkit.c | |
3 | * Based on: arch/blackfin/mach-bf537/boards/ezkit.c | |
4 | * Author: Aidan Williams <aidan@nicta.com.au> | |
5 | * | |
6 | * Created: | |
7 | * Description: | |
8 | * | |
9 | * Modified: | |
10 | * Copyright 2005 National ICT Australia (NICTA) | |
11 | * Copyright 2004-2007 Analog Devices Inc. | |
12 | * | |
13 | * Bugs: Enter bugs at http://blackfin.uclinux.org/ | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License as published by | |
17 | * the Free Software Foundation; either version 2 of the License, or | |
18 | * (at your option) any later version. | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, see the file COPYING, or write | |
27 | * to the Free Software Foundation, Inc., | |
28 | * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
29 | */ | |
30 | ||
31 | #include <linux/device.h> | |
32 | #include <linux/platform_device.h> | |
33 | #include <linux/mtd/mtd.h> | |
34 | #include <linux/mtd/partitions.h> | |
de8c43f2 | 35 | #include <linux/mtd/physmap.h> |
24a07a12 RH |
36 | #include <linux/spi/spi.h> |
37 | #include <linux/spi/flash.h> | |
1f83b8f1 | 38 | #include <linux/irq.h> |
81d9c7f2 | 39 | #include <linux/i2c.h> |
24a07a12 | 40 | #include <linux/interrupt.h> |
c6c4d7bb | 41 | #include <linux/usb/musb.h> |
24a07a12 | 42 | #include <asm/bfin5xx_spi.h> |
c6c4d7bb BW |
43 | #include <asm/dma.h> |
44 | #include <asm/gpio.h> | |
45 | #include <asm/nand.h> | |
14b03204 | 46 | #include <asm/dpmc.h> |
5d448dd5 | 47 | #include <asm/portmux.h> |
501674a5 | 48 | #include <asm/bfin_sdh.h> |
639f6571 | 49 | #include <mach/bf54x_keys.h> |
c6c4d7bb BW |
50 | #include <linux/input.h> |
51 | #include <linux/spi/ad7877.h> | |
24a07a12 RH |
52 | |
53 | /* | |
54 | * Name the Board for the /proc/cpuinfo | |
55 | */ | |
fe85cad2 | 56 | const char bfin_board_name[] = "ADI BF548-EZKIT"; |
24a07a12 RH |
57 | |
58 | /* | |
59 | * Driver needs to know address, irq and flag pin. | |
60 | */ | |
61 | ||
0a6304a9 | 62 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) |
3f375690 MH |
63 | #include <linux/usb/isp1760.h> |
64 | static struct resource bfin_isp1760_resources[] = { | |
0a6304a9 | 65 | [0] = { |
0a6304a9 MH |
66 | .start = 0x2C0C0000, |
67 | .end = 0x2C0C0000 + 0xfffff, | |
68 | .flags = IORESOURCE_MEM, | |
69 | }, | |
70 | [1] = { | |
71 | .start = IRQ_PG7, | |
72 | .end = IRQ_PG7, | |
73 | .flags = IORESOURCE_IRQ, | |
74 | }, | |
75 | }; | |
76 | ||
3f375690 MH |
77 | static struct isp1760_platform_data isp1760_priv = { |
78 | .is_isp1761 = 0, | |
79 | .port1_disable = 0, | |
80 | .bus_width_16 = 1, | |
81 | .port1_otg = 0, | |
82 | .analog_oc = 0, | |
83 | .dack_polarity_high = 0, | |
84 | .dreq_polarity_high = 0, | |
0a6304a9 MH |
85 | }; |
86 | ||
3f375690 MH |
87 | static struct platform_device bfin_isp1760_device = { |
88 | .name = "isp1760-hcd", | |
89 | .id = 0, | |
90 | .dev = { | |
91 | .platform_data = &isp1760_priv, | |
92 | }, | |
93 | .num_resources = ARRAY_SIZE(bfin_isp1760_resources), | |
94 | .resource = bfin_isp1760_resources, | |
0a6304a9 | 95 | }; |
0a6304a9 MH |
96 | #endif |
97 | ||
c6c4d7bb BW |
98 | #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE) |
99 | ||
639f6571 | 100 | #include <mach/bf54x-lq043.h> |
c6c4d7bb BW |
101 | |
102 | static struct bfin_bf54xfb_mach_info bf54x_lq043_data = { | |
103 | .width = 480, | |
104 | .height = 272, | |
105 | .xres = {480, 480, 480}, | |
106 | .yres = {272, 272, 272}, | |
107 | .bpp = {24, 24, 24}, | |
108 | .disp = GPIO_PE3, | |
109 | }; | |
110 | ||
111 | static struct resource bf54x_lq043_resources[] = { | |
112 | { | |
113 | .start = IRQ_EPPI0_ERR, | |
114 | .end = IRQ_EPPI0_ERR, | |
115 | .flags = IORESOURCE_IRQ, | |
116 | }, | |
117 | }; | |
118 | ||
119 | static struct platform_device bf54x_lq043_device = { | |
120 | .name = "bf54x-lq043", | |
121 | .id = -1, | |
122 | .num_resources = ARRAY_SIZE(bf54x_lq043_resources), | |
123 | .resource = bf54x_lq043_resources, | |
124 | .dev = { | |
125 | .platform_data = &bf54x_lq043_data, | |
126 | }, | |
127 | }; | |
128 | #endif | |
129 | ||
130 | #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE) | |
8f740ef3 | 131 | static const unsigned int bf548_keymap[] = { |
c6c4d7bb BW |
132 | KEYVAL(0, 0, KEY_ENTER), |
133 | KEYVAL(0, 1, KEY_HELP), | |
134 | KEYVAL(0, 2, KEY_0), | |
135 | KEYVAL(0, 3, KEY_BACKSPACE), | |
136 | KEYVAL(1, 0, KEY_TAB), | |
137 | KEYVAL(1, 1, KEY_9), | |
138 | KEYVAL(1, 2, KEY_8), | |
139 | KEYVAL(1, 3, KEY_7), | |
140 | KEYVAL(2, 0, KEY_DOWN), | |
141 | KEYVAL(2, 1, KEY_6), | |
142 | KEYVAL(2, 2, KEY_5), | |
143 | KEYVAL(2, 3, KEY_4), | |
144 | KEYVAL(3, 0, KEY_UP), | |
145 | KEYVAL(3, 1, KEY_3), | |
146 | KEYVAL(3, 2, KEY_2), | |
147 | KEYVAL(3, 3, KEY_1), | |
148 | }; | |
149 | ||
150 | static struct bfin_kpad_platform_data bf54x_kpad_data = { | |
151 | .rows = 4, | |
152 | .cols = 4, | |
8f740ef3 MH |
153 | .keymap = bf548_keymap, |
154 | .keymapsize = ARRAY_SIZE(bf548_keymap), | |
c6c4d7bb BW |
155 | .repeat = 0, |
156 | .debounce_time = 5000, /* ns (5ms) */ | |
157 | .coldrive_time = 1000, /* ns (1ms) */ | |
158 | .keyup_test_interval = 50, /* ms (50ms) */ | |
159 | }; | |
160 | ||
161 | static struct resource bf54x_kpad_resources[] = { | |
162 | { | |
163 | .start = IRQ_KEY, | |
164 | .end = IRQ_KEY, | |
165 | .flags = IORESOURCE_IRQ, | |
166 | }, | |
167 | }; | |
168 | ||
169 | static struct platform_device bf54x_kpad_device = { | |
170 | .name = "bf54x-keys", | |
171 | .id = -1, | |
172 | .num_resources = ARRAY_SIZE(bf54x_kpad_resources), | |
173 | .resource = bf54x_kpad_resources, | |
174 | .dev = { | |
175 | .platform_data = &bf54x_kpad_data, | |
176 | }, | |
177 | }; | |
178 | #endif | |
179 | ||
aca5e4aa MH |
180 | #if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE) |
181 | #include <asm/bfin_rotary.h> | |
182 | ||
183 | static struct bfin_rotary_platform_data bfin_rotary_data = { | |
184 | /*.rotary_up_key = KEY_UP,*/ | |
185 | /*.rotary_down_key = KEY_DOWN,*/ | |
186 | .rotary_rel_code = REL_WHEEL, | |
187 | .rotary_button_key = KEY_ENTER, | |
188 | .debounce = 10, /* 0..17 */ | |
189 | .mode = ROT_QUAD_ENC | ROT_DEBE, | |
190 | }; | |
191 | ||
192 | static struct resource bfin_rotary_resources[] = { | |
193 | { | |
194 | .start = IRQ_CNT, | |
195 | .end = IRQ_CNT, | |
196 | .flags = IORESOURCE_IRQ, | |
197 | }, | |
198 | }; | |
199 | ||
200 | static struct platform_device bfin_rotary_device = { | |
201 | .name = "bfin-rotary", | |
202 | .id = -1, | |
203 | .num_resources = ARRAY_SIZE(bfin_rotary_resources), | |
204 | .resource = bfin_rotary_resources, | |
205 | .dev = { | |
206 | .platform_data = &bfin_rotary_data, | |
207 | }, | |
208 | }; | |
209 | #endif | |
210 | ||
ffc4d8bc MH |
211 | #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE) |
212 | #include <linux/input.h> | |
213 | #include <linux/spi/adxl34x.h> | |
214 | static const struct adxl34x_platform_data adxl34x_info = { | |
215 | .x_axis_offset = 0, | |
216 | .y_axis_offset = 0, | |
217 | .z_axis_offset = 0, | |
218 | .tap_threshold = 0x31, | |
219 | .tap_duration = 0x10, | |
220 | .tap_latency = 0x60, | |
221 | .tap_window = 0xF0, | |
222 | .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN, | |
223 | .act_axis_control = 0xFF, | |
224 | .activity_threshold = 5, | |
225 | .inactivity_threshold = 3, | |
226 | .inactivity_time = 4, | |
227 | .free_fall_threshold = 0x7, | |
228 | .free_fall_time = 0x20, | |
229 | .data_rate = 0x8, | |
230 | .data_range = ADXL_FULL_RES, | |
231 | ||
232 | .ev_type = EV_ABS, | |
233 | .ev_code_x = ABS_X, /* EV_REL */ | |
234 | .ev_code_y = ABS_Y, /* EV_REL */ | |
235 | .ev_code_z = ABS_Z, /* EV_REL */ | |
236 | ||
237 | .ev_code_tap_x = BTN_TOUCH, /* EV_KEY */ | |
238 | .ev_code_tap_y = BTN_TOUCH, /* EV_KEY */ | |
239 | .ev_code_tap_z = BTN_TOUCH, /* EV_KEY */ | |
240 | ||
241 | /* .ev_code_ff = KEY_F,*/ /* EV_KEY */ | |
242 | /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */ | |
243 | .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK, | |
244 | .fifo_mode = ADXL_FIFO_STREAM, | |
245 | }; | |
246 | #endif | |
247 | ||
24a07a12 RH |
248 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
249 | static struct platform_device rtc_device = { | |
250 | .name = "rtc-bfin", | |
251 | .id = -1, | |
252 | }; | |
253 | #endif | |
254 | ||
255 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
256 | static struct resource bfin_uart_resources[] = { | |
257 | #ifdef CONFIG_SERIAL_BFIN_UART0 | |
258 | { | |
259 | .start = 0xFFC00400, | |
260 | .end = 0xFFC004FF, | |
261 | .flags = IORESOURCE_MEM, | |
262 | }, | |
263 | #endif | |
264 | #ifdef CONFIG_SERIAL_BFIN_UART1 | |
265 | { | |
266 | .start = 0xFFC02000, | |
267 | .end = 0xFFC020FF, | |
268 | .flags = IORESOURCE_MEM, | |
269 | }, | |
270 | #endif | |
271 | #ifdef CONFIG_SERIAL_BFIN_UART2 | |
272 | { | |
273 | .start = 0xFFC02100, | |
274 | .end = 0xFFC021FF, | |
275 | .flags = IORESOURCE_MEM, | |
276 | }, | |
277 | #endif | |
278 | #ifdef CONFIG_SERIAL_BFIN_UART3 | |
279 | { | |
280 | .start = 0xFFC03100, | |
281 | .end = 0xFFC031FF, | |
cc2e16bd | 282 | .flags = IORESOURCE_MEM, |
24a07a12 RH |
283 | }, |
284 | #endif | |
285 | }; | |
286 | ||
287 | static struct platform_device bfin_uart_device = { | |
288 | .name = "bfin-uart", | |
289 | .id = 1, | |
290 | .num_resources = ARRAY_SIZE(bfin_uart_resources), | |
291 | .resource = bfin_uart_resources, | |
292 | }; | |
293 | #endif | |
294 | ||
5be36d22 | 295 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
5be36d22 | 296 | #ifdef CONFIG_BFIN_SIR0 |
42bd8bcb | 297 | static struct resource bfin_sir0_resources[] = { |
5be36d22 GY |
298 | { |
299 | .start = 0xFFC00400, | |
300 | .end = 0xFFC004FF, | |
301 | .flags = IORESOURCE_MEM, | |
302 | }, | |
42bd8bcb GY |
303 | { |
304 | .start = IRQ_UART0_RX, | |
305 | .end = IRQ_UART0_RX+1, | |
306 | .flags = IORESOURCE_IRQ, | |
307 | }, | |
308 | { | |
309 | .start = CH_UART0_RX, | |
310 | .end = CH_UART0_RX+1, | |
311 | .flags = IORESOURCE_DMA, | |
312 | }, | |
313 | }; | |
314 | static struct platform_device bfin_sir0_device = { | |
315 | .name = "bfin_sir", | |
316 | .id = 0, | |
317 | .num_resources = ARRAY_SIZE(bfin_sir0_resources), | |
318 | .resource = bfin_sir0_resources, | |
319 | }; | |
5be36d22 GY |
320 | #endif |
321 | #ifdef CONFIG_BFIN_SIR1 | |
42bd8bcb | 322 | static struct resource bfin_sir1_resources[] = { |
5be36d22 GY |
323 | { |
324 | .start = 0xFFC02000, | |
325 | .end = 0xFFC020FF, | |
326 | .flags = IORESOURCE_MEM, | |
327 | }, | |
42bd8bcb GY |
328 | { |
329 | .start = IRQ_UART1_RX, | |
330 | .end = IRQ_UART1_RX+1, | |
331 | .flags = IORESOURCE_IRQ, | |
332 | }, | |
333 | { | |
334 | .start = CH_UART1_RX, | |
335 | .end = CH_UART1_RX+1, | |
336 | .flags = IORESOURCE_DMA, | |
337 | }, | |
338 | }; | |
339 | static struct platform_device bfin_sir1_device = { | |
340 | .name = "bfin_sir", | |
341 | .id = 1, | |
342 | .num_resources = ARRAY_SIZE(bfin_sir1_resources), | |
343 | .resource = bfin_sir1_resources, | |
344 | }; | |
5be36d22 GY |
345 | #endif |
346 | #ifdef CONFIG_BFIN_SIR2 | |
42bd8bcb | 347 | static struct resource bfin_sir2_resources[] = { |
5be36d22 GY |
348 | { |
349 | .start = 0xFFC02100, | |
350 | .end = 0xFFC021FF, | |
351 | .flags = IORESOURCE_MEM, | |
352 | }, | |
42bd8bcb GY |
353 | { |
354 | .start = IRQ_UART2_RX, | |
355 | .end = IRQ_UART2_RX+1, | |
356 | .flags = IORESOURCE_IRQ, | |
357 | }, | |
358 | { | |
359 | .start = CH_UART2_RX, | |
360 | .end = CH_UART2_RX+1, | |
361 | .flags = IORESOURCE_DMA, | |
362 | }, | |
363 | }; | |
364 | static struct platform_device bfin_sir2_device = { | |
365 | .name = "bfin_sir", | |
366 | .id = 2, | |
367 | .num_resources = ARRAY_SIZE(bfin_sir2_resources), | |
368 | .resource = bfin_sir2_resources, | |
369 | }; | |
5be36d22 GY |
370 | #endif |
371 | #ifdef CONFIG_BFIN_SIR3 | |
42bd8bcb | 372 | static struct resource bfin_sir3_resources[] = { |
5be36d22 GY |
373 | { |
374 | .start = 0xFFC03100, | |
375 | .end = 0xFFC031FF, | |
376 | .flags = IORESOURCE_MEM, | |
377 | }, | |
42bd8bcb GY |
378 | { |
379 | .start = IRQ_UART3_RX, | |
380 | .end = IRQ_UART3_RX+1, | |
381 | .flags = IORESOURCE_IRQ, | |
382 | }, | |
383 | { | |
384 | .start = CH_UART3_RX, | |
385 | .end = CH_UART3_RX+1, | |
386 | .flags = IORESOURCE_DMA, | |
387 | }, | |
5be36d22 | 388 | }; |
42bd8bcb | 389 | static struct platform_device bfin_sir3_device = { |
5be36d22 | 390 | .name = "bfin_sir", |
42bd8bcb GY |
391 | .id = 3, |
392 | .num_resources = ARRAY_SIZE(bfin_sir3_resources), | |
393 | .resource = bfin_sir3_resources, | |
5be36d22 GY |
394 | }; |
395 | #endif | |
42bd8bcb | 396 | #endif |
5be36d22 | 397 | |
c6c4d7bb BW |
398 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
399 | static struct resource smsc911x_resources[] = { | |
400 | { | |
401 | .name = "smsc911x-memory", | |
402 | .start = 0x24000000, | |
403 | .end = 0x24000000 + 0xFF, | |
404 | .flags = IORESOURCE_MEM, | |
405 | }, | |
406 | { | |
407 | .start = IRQ_PE8, | |
408 | .end = IRQ_PE8, | |
409 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
410 | }, | |
411 | }; | |
412 | static struct platform_device smsc911x_device = { | |
413 | .name = "smsc911x", | |
414 | .id = 0, | |
415 | .num_resources = ARRAY_SIZE(smsc911x_resources), | |
416 | .resource = smsc911x_resources, | |
417 | }; | |
418 | #endif | |
419 | ||
c6c4d7bb BW |
420 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) |
421 | static struct resource musb_resources[] = { | |
422 | [0] = { | |
423 | .start = 0xFFC03C00, | |
424 | .end = 0xFFC040FF, | |
425 | .flags = IORESOURCE_MEM, | |
426 | }, | |
427 | [1] = { /* general IRQ */ | |
428 | .start = IRQ_USB_INT0, | |
429 | .end = IRQ_USB_INT0, | |
430 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
431 | }, | |
432 | [2] = { /* DMA IRQ */ | |
433 | .start = IRQ_USB_DMA, | |
434 | .end = IRQ_USB_DMA, | |
435 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
436 | }, | |
437 | }; | |
438 | ||
50041acb BW |
439 | static struct musb_hdrc_config musb_config = { |
440 | .multipoint = 0, | |
441 | .dyn_fifo = 0, | |
442 | .soft_con = 1, | |
443 | .dma = 1, | |
fea05dac BW |
444 | .num_eps = 8, |
445 | .dma_channels = 8, | |
50041acb BW |
446 | .gpio_vrsel = GPIO_PE7, |
447 | }; | |
448 | ||
c6c4d7bb | 449 | static struct musb_hdrc_platform_data musb_plat = { |
2935077e | 450 | #if defined(CONFIG_USB_MUSB_OTG) |
c6c4d7bb | 451 | .mode = MUSB_OTG, |
2935077e | 452 | #elif defined(CONFIG_USB_MUSB_HDRC_HCD) |
c6c4d7bb | 453 | .mode = MUSB_HOST, |
2935077e | 454 | #elif defined(CONFIG_USB_GADGET_MUSB_HDRC) |
c6c4d7bb BW |
455 | .mode = MUSB_PERIPHERAL, |
456 | #endif | |
50041acb | 457 | .config = &musb_config, |
c6c4d7bb BW |
458 | }; |
459 | ||
460 | static u64 musb_dmamask = ~(u32)0; | |
461 | ||
462 | static struct platform_device musb_device = { | |
463 | .name = "musb_hdrc", | |
464 | .id = 0, | |
465 | .dev = { | |
466 | .dma_mask = &musb_dmamask, | |
467 | .coherent_dma_mask = 0xffffffff, | |
468 | .platform_data = &musb_plat, | |
469 | }, | |
470 | .num_resources = ARRAY_SIZE(musb_resources), | |
471 | .resource = musb_resources, | |
472 | }; | |
473 | #endif | |
474 | ||
475 | #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE) | |
476 | static struct resource bfin_atapi_resources[] = { | |
477 | { | |
478 | .start = 0xFFC03800, | |
479 | .end = 0xFFC0386F, | |
480 | .flags = IORESOURCE_MEM, | |
481 | }, | |
482 | { | |
483 | .start = IRQ_ATAPI_ERR, | |
484 | .end = IRQ_ATAPI_ERR, | |
485 | .flags = IORESOURCE_IRQ, | |
486 | }, | |
487 | }; | |
488 | ||
489 | static struct platform_device bfin_atapi_device = { | |
490 | .name = "pata-bf54x", | |
491 | .id = -1, | |
492 | .num_resources = ARRAY_SIZE(bfin_atapi_resources), | |
493 | .resource = bfin_atapi_resources, | |
494 | }; | |
495 | #endif | |
496 | ||
497 | #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) | |
498 | static struct mtd_partition partition_info[] = { | |
499 | { | |
aa582977 | 500 | .name = "linux kernel(nand)", |
c6c4d7bb | 501 | .offset = 0, |
f4585a08 | 502 | .size = 4 * 1024 * 1024, |
c6c4d7bb BW |
503 | }, |
504 | { | |
aa582977 | 505 | .name = "file system(nand)", |
edf05641 MF |
506 | .offset = MTDPART_OFS_APPEND, |
507 | .size = MTDPART_SIZ_FULL, | |
c6c4d7bb BW |
508 | }, |
509 | }; | |
510 | ||
511 | static struct bf5xx_nand_platform bf5xx_nand_platform = { | |
512 | .page_size = NFC_PG_SIZE_256, | |
513 | .data_width = NFC_NWIDTH_8, | |
514 | .partitions = partition_info, | |
515 | .nr_partitions = ARRAY_SIZE(partition_info), | |
516 | .rd_dly = 3, | |
517 | .wr_dly = 3, | |
518 | }; | |
519 | ||
520 | static struct resource bf5xx_nand_resources[] = { | |
521 | { | |
522 | .start = 0xFFC03B00, | |
523 | .end = 0xFFC03B4F, | |
524 | .flags = IORESOURCE_MEM, | |
525 | }, | |
526 | { | |
527 | .start = CH_NFC, | |
528 | .end = CH_NFC, | |
529 | .flags = IORESOURCE_IRQ, | |
530 | }, | |
531 | }; | |
532 | ||
533 | static struct platform_device bf5xx_nand_device = { | |
534 | .name = "bf5xx-nand", | |
535 | .id = 0, | |
536 | .num_resources = ARRAY_SIZE(bf5xx_nand_resources), | |
537 | .resource = bf5xx_nand_resources, | |
538 | .dev = { | |
539 | .platform_data = &bf5xx_nand_platform, | |
540 | }, | |
541 | }; | |
542 | #endif | |
543 | ||
3d7e6cf8 | 544 | #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE) |
501674a5 CC |
545 | |
546 | static struct bfin_sd_host bfin_sdh_data = { | |
547 | .dma_chan = CH_SDH, | |
548 | .irq_int0 = IRQ_SDH_MASK0, | |
549 | .pin_req = {P_SD_D0, P_SD_D1, P_SD_D2, P_SD_D3, P_SD_CLK, P_SD_CMD, 0}, | |
550 | }; | |
551 | ||
c6c4d7bb BW |
552 | static struct platform_device bf54x_sdh_device = { |
553 | .name = "bfin-sdh", | |
554 | .id = 0, | |
501674a5 CC |
555 | .dev = { |
556 | .platform_data = &bfin_sdh_data, | |
557 | }, | |
c6c4d7bb BW |
558 | }; |
559 | #endif | |
560 | ||
793dc27b | 561 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) |
de8c43f2 MF |
562 | static struct mtd_partition ezkit_partitions[] = { |
563 | { | |
aa582977 | 564 | .name = "bootloader(nor)", |
edf05641 | 565 | .size = 0x40000, |
de8c43f2 MF |
566 | .offset = 0, |
567 | }, { | |
aa582977 | 568 | .name = "linux kernel(nor)", |
664d0403 | 569 | .size = 0x400000, |
de8c43f2 MF |
570 | .offset = MTDPART_OFS_APPEND, |
571 | }, { | |
aa582977 | 572 | .name = "file system(nor)", |
de8c43f2 MF |
573 | .size = MTDPART_SIZ_FULL, |
574 | .offset = MTDPART_OFS_APPEND, | |
575 | } | |
576 | }; | |
577 | ||
578 | static struct physmap_flash_data ezkit_flash_data = { | |
579 | .width = 2, | |
580 | .parts = ezkit_partitions, | |
581 | .nr_parts = ARRAY_SIZE(ezkit_partitions), | |
582 | }; | |
583 | ||
584 | static struct resource ezkit_flash_resource = { | |
585 | .start = 0x20000000, | |
664d0403 | 586 | .end = 0x21ffffff, |
de8c43f2 MF |
587 | .flags = IORESOURCE_MEM, |
588 | }; | |
589 | ||
590 | static struct platform_device ezkit_flash_device = { | |
591 | .name = "physmap-flash", | |
592 | .id = 0, | |
593 | .dev = { | |
594 | .platform_data = &ezkit_flash_data, | |
595 | }, | |
596 | .num_resources = 1, | |
597 | .resource = &ezkit_flash_resource, | |
598 | }; | |
793dc27b | 599 | #endif |
de8c43f2 | 600 | |
c6c4d7bb BW |
601 | #if defined(CONFIG_MTD_M25P80) \ |
602 | || defined(CONFIG_MTD_M25P80_MODULE) | |
603 | /* SPI flash chip (m25p16) */ | |
604 | static struct mtd_partition bfin_spi_flash_partitions[] = { | |
605 | { | |
aa582977 | 606 | .name = "bootloader(spi)", |
c6c4d7bb BW |
607 | .size = 0x00040000, |
608 | .offset = 0, | |
609 | .mask_flags = MTD_CAP_ROM | |
610 | }, { | |
aa582977 | 611 | .name = "linux kernel(spi)", |
edf05641 MF |
612 | .size = MTDPART_SIZ_FULL, |
613 | .offset = MTDPART_OFS_APPEND, | |
c6c4d7bb BW |
614 | } |
615 | }; | |
616 | ||
617 | static struct flash_platform_data bfin_spi_flash_data = { | |
618 | .name = "m25p80", | |
619 | .parts = bfin_spi_flash_partitions, | |
620 | .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions), | |
621 | .type = "m25p16", | |
622 | }; | |
623 | ||
624 | static struct bfin5xx_spi_chip spi_flash_chip_info = { | |
625 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
626 | .bits_per_word = 8, | |
627 | .cs_change_per_word = 0, | |
628 | }; | |
629 | #endif | |
630 | ||
37fa2421 BS |
631 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ |
632 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
633 | static struct bfin5xx_spi_chip ad1836_spi_chip_info = { | |
634 | .enable_dma = 0, | |
635 | .bits_per_word = 16, | |
636 | }; | |
637 | #endif | |
638 | ||
c6c4d7bb BW |
639 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
640 | static struct bfin5xx_spi_chip spi_ad7877_chip_info = { | |
c7d48966 | 641 | .cs_change_per_word = 0, |
c6c4d7bb BW |
642 | .enable_dma = 0, |
643 | .bits_per_word = 16, | |
644 | }; | |
645 | ||
646 | static const struct ad7877_platform_data bfin_ad7877_ts_info = { | |
647 | .model = 7877, | |
648 | .vref_delay_usecs = 50, /* internal, no capacitor */ | |
649 | .x_plate_ohms = 419, | |
650 | .y_plate_ohms = 486, | |
651 | .pressure_max = 1000, | |
652 | .pressure_min = 0, | |
653 | .stopacq_polarity = 1, | |
654 | .first_conversion_delay = 3, | |
655 | .acquisition_time = 1, | |
656 | .averaging = 1, | |
657 | .pen_down_acc_interval = 1, | |
658 | }; | |
659 | #endif | |
660 | ||
6e668936 MH |
661 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
662 | static struct bfin5xx_spi_chip spidev_chip_info = { | |
663 | .enable_dma = 0, | |
664 | .bits_per_word = 8, | |
665 | }; | |
666 | #endif | |
667 | ||
ffc4d8bc MH |
668 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) |
669 | static struct bfin5xx_spi_chip spi_adxl34x_chip_info = { | |
670 | .enable_dma = 0, /* use dma transfer with this chip*/ | |
671 | .bits_per_word = 8, | |
672 | .cs_change_per_word = 0, | |
673 | }; | |
674 | #endif | |
675 | ||
5bda2723 | 676 | static struct spi_board_info bfin_spi_board_info[] __initdata = { |
c6c4d7bb BW |
677 | #if defined(CONFIG_MTD_M25P80) \ |
678 | || defined(CONFIG_MTD_M25P80_MODULE) | |
679 | { | |
680 | /* the modalias must be the same as spi device driver name */ | |
681 | .modalias = "m25p80", /* Name of spi_driver for this device */ | |
682 | .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ | |
683 | .bus_num = 0, /* Framework bus number */ | |
684 | .chip_select = 1, /* SPI_SSEL1*/ | |
685 | .platform_data = &bfin_spi_flash_data, | |
686 | .controller_data = &spi_flash_chip_info, | |
687 | .mode = SPI_MODE_3, | |
688 | }, | |
689 | #endif | |
37fa2421 BS |
690 | #if defined(CONFIG_SND_BLACKFIN_AD1836) \ |
691 | || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE) | |
692 | { | |
693 | .modalias = "ad1836-spi", | |
694 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
695 | .bus_num = 1, | |
696 | .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT, | |
697 | .controller_data = &ad1836_spi_chip_info, | |
698 | }, | |
699 | #endif | |
c6c4d7bb | 700 | #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE) |
ffc4d8bc MH |
701 | { |
702 | .modalias = "ad7877", | |
703 | .platform_data = &bfin_ad7877_ts_info, | |
704 | .irq = IRQ_PB4, /* old boards (<=Rev 1.3) use IRQ_PJ11 */ | |
705 | .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */ | |
706 | .bus_num = 0, | |
707 | .chip_select = 2, | |
708 | .controller_data = &spi_ad7877_chip_info, | |
709 | }, | |
c6c4d7bb | 710 | #endif |
6e668936 MH |
711 | #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) |
712 | { | |
713 | .modalias = "spidev", | |
714 | .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ | |
715 | .bus_num = 0, | |
716 | .chip_select = 1, | |
717 | .controller_data = &spidev_chip_info, | |
718 | }, | |
719 | #endif | |
ffc4d8bc MH |
720 | #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE) |
721 | { | |
722 | .modalias = "adxl34x", | |
723 | .platform_data = &adxl34x_info, | |
724 | .irq = IRQ_PC5, | |
725 | .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */ | |
726 | .bus_num = 1, | |
727 | .chip_select = 2, | |
728 | .controller_data = &spi_adxl34x_chip_info, | |
729 | .mode = SPI_MODE_3, | |
730 | }, | |
731 | #endif | |
c6c4d7bb | 732 | }; |
5bda2723 | 733 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) |
c6c4d7bb BW |
734 | /* SPI (0) */ |
735 | static struct resource bfin_spi0_resource[] = { | |
736 | [0] = { | |
737 | .start = SPI0_REGBASE, | |
738 | .end = SPI0_REGBASE + 0xFF, | |
739 | .flags = IORESOURCE_MEM, | |
740 | }, | |
741 | [1] = { | |
742 | .start = CH_SPI0, | |
743 | .end = CH_SPI0, | |
744 | .flags = IORESOURCE_IRQ, | |
745 | } | |
746 | }; | |
747 | ||
748 | /* SPI (1) */ | |
749 | static struct resource bfin_spi1_resource[] = { | |
750 | [0] = { | |
751 | .start = SPI1_REGBASE, | |
752 | .end = SPI1_REGBASE + 0xFF, | |
753 | .flags = IORESOURCE_MEM, | |
754 | }, | |
755 | [1] = { | |
756 | .start = CH_SPI1, | |
757 | .end = CH_SPI1, | |
758 | .flags = IORESOURCE_IRQ, | |
759 | } | |
760 | }; | |
761 | ||
762 | /* SPI controller data */ | |
5d448dd5 | 763 | static struct bfin5xx_spi_master bf54x_spi_master_info0 = { |
c6c4d7bb BW |
764 | .num_chipselect = 8, |
765 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
5d448dd5 | 766 | .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, |
c6c4d7bb BW |
767 | }; |
768 | ||
769 | static struct platform_device bf54x_spi_master0 = { | |
770 | .name = "bfin-spi", | |
771 | .id = 0, /* Bus number */ | |
772 | .num_resources = ARRAY_SIZE(bfin_spi0_resource), | |
773 | .resource = bfin_spi0_resource, | |
774 | .dev = { | |
5d448dd5 | 775 | .platform_data = &bf54x_spi_master_info0, /* Passed to driver */ |
c6c4d7bb BW |
776 | }, |
777 | }; | |
778 | ||
5d448dd5 BW |
779 | static struct bfin5xx_spi_master bf54x_spi_master_info1 = { |
780 | .num_chipselect = 8, | |
781 | .enable_dma = 1, /* master has the ability to do dma transfer */ | |
782 | .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0}, | |
783 | }; | |
784 | ||
c6c4d7bb BW |
785 | static struct platform_device bf54x_spi_master1 = { |
786 | .name = "bfin-spi", | |
787 | .id = 1, /* Bus number */ | |
788 | .num_resources = ARRAY_SIZE(bfin_spi1_resource), | |
789 | .resource = bfin_spi1_resource, | |
790 | .dev = { | |
5d448dd5 | 791 | .platform_data = &bf54x_spi_master_info1, /* Passed to driver */ |
c6c4d7bb BW |
792 | }, |
793 | }; | |
794 | #endif /* spi master and devices */ | |
795 | ||
796 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) | |
797 | static struct resource bfin_twi0_resource[] = { | |
798 | [0] = { | |
799 | .start = TWI0_REGBASE, | |
800 | .end = TWI0_REGBASE + 0xFF, | |
801 | .flags = IORESOURCE_MEM, | |
802 | }, | |
803 | [1] = { | |
804 | .start = IRQ_TWI0, | |
805 | .end = IRQ_TWI0, | |
806 | .flags = IORESOURCE_IRQ, | |
807 | }, | |
808 | }; | |
809 | ||
810 | static struct platform_device i2c_bfin_twi0_device = { | |
811 | .name = "i2c-bfin-twi", | |
812 | .id = 0, | |
813 | .num_resources = ARRAY_SIZE(bfin_twi0_resource), | |
814 | .resource = bfin_twi0_resource, | |
815 | }; | |
816 | ||
7160e950 | 817 | #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ |
c6c4d7bb BW |
818 | static struct resource bfin_twi1_resource[] = { |
819 | [0] = { | |
820 | .start = TWI1_REGBASE, | |
821 | .end = TWI1_REGBASE + 0xFF, | |
822 | .flags = IORESOURCE_MEM, | |
823 | }, | |
824 | [1] = { | |
825 | .start = IRQ_TWI1, | |
826 | .end = IRQ_TWI1, | |
827 | .flags = IORESOURCE_IRQ, | |
828 | }, | |
829 | }; | |
830 | ||
831 | static struct platform_device i2c_bfin_twi1_device = { | |
832 | .name = "i2c-bfin-twi", | |
833 | .id = 1, | |
834 | .num_resources = ARRAY_SIZE(bfin_twi1_resource), | |
835 | .resource = bfin_twi1_resource, | |
836 | }; | |
837 | #endif | |
7160e950 | 838 | #endif |
c6c4d7bb | 839 | |
81d9c7f2 BW |
840 | static struct i2c_board_info __initdata bfin_i2c_board_info0[] = { |
841 | }; | |
842 | ||
843 | #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ | |
844 | static struct i2c_board_info __initdata bfin_i2c_board_info1[] = { | |
a261eec0 | 845 | #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE) |
81d9c7f2 BW |
846 | { |
847 | I2C_BOARD_INFO("pcf8574_lcd", 0x22), | |
81d9c7f2 BW |
848 | }, |
849 | #endif | |
850 | #if defined(CONFIG_TWI_KEYPAD) || defined(CONFIG_TWI_KEYPAD_MODULE) | |
851 | { | |
852 | I2C_BOARD_INFO("pcf8574_keypad", 0x27), | |
81d9c7f2 BW |
853 | .irq = 212, |
854 | }, | |
855 | #endif | |
ffc4d8bc MH |
856 | #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE) |
857 | { | |
858 | I2C_BOARD_INFO("adxl34x", 0x53), | |
859 | .irq = IRQ_PC5, | |
860 | .platform_data = (void *)&adxl34x_info, | |
861 | }, | |
862 | #endif | |
81d9c7f2 BW |
863 | }; |
864 | #endif | |
81d9c7f2 | 865 | |
2463ef22 MH |
866 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) |
867 | #include <linux/gpio_keys.h> | |
868 | ||
869 | static struct gpio_keys_button bfin_gpio_keys_table[] = { | |
870 | {BTN_0, GPIO_PB8, 1, "gpio-keys: BTN0"}, | |
871 | {BTN_1, GPIO_PB9, 1, "gpio-keys: BTN1"}, | |
872 | {BTN_2, GPIO_PB10, 1, "gpio-keys: BTN2"}, | |
873 | {BTN_3, GPIO_PB11, 1, "gpio-keys: BTN3"}, | |
874 | }; | |
875 | ||
876 | static struct gpio_keys_platform_data bfin_gpio_keys_data = { | |
877 | .buttons = bfin_gpio_keys_table, | |
878 | .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table), | |
879 | }; | |
880 | ||
881 | static struct platform_device bfin_device_gpiokeys = { | |
882 | .name = "gpio-keys", | |
883 | .dev = { | |
884 | .platform_data = &bfin_gpio_keys_data, | |
885 | }, | |
886 | }; | |
887 | #endif | |
888 | ||
cad2ab65 MF |
889 | static struct resource bfin_gpios_resources = { |
890 | .start = 0, | |
891 | .end = MAX_BLACKFIN_GPIOS - 1, | |
892 | .flags = IORESOURCE_IRQ, | |
893 | }; | |
894 | ||
895 | static struct platform_device bfin_gpios_device = { | |
896 | .name = "simple-gpio", | |
897 | .id = -1, | |
898 | .num_resources = 1, | |
899 | .resource = &bfin_gpios_resources, | |
900 | }; | |
901 | ||
14b03204 MH |
902 | static const unsigned int cclk_vlev_datasheet[] = |
903 | { | |
904 | /* | |
905 | * Internal VLEV BF54XSBBC1533 | |
906 | ****temporarily using these values until data sheet is updated | |
907 | */ | |
908 | VRPAIR(VLEV_085, 150000000), | |
909 | VRPAIR(VLEV_090, 250000000), | |
910 | VRPAIR(VLEV_110, 276000000), | |
911 | VRPAIR(VLEV_115, 301000000), | |
912 | VRPAIR(VLEV_120, 525000000), | |
913 | VRPAIR(VLEV_125, 550000000), | |
914 | VRPAIR(VLEV_130, 600000000), | |
915 | }; | |
916 | ||
917 | static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { | |
918 | .tuple_tab = cclk_vlev_datasheet, | |
919 | .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), | |
920 | .vr_settling_time = 25 /* us */, | |
921 | }; | |
922 | ||
923 | static struct platform_device bfin_dpmc = { | |
924 | .name = "bfin dpmc", | |
925 | .dev = { | |
926 | .platform_data = &bfin_dmpc_vreg_data, | |
927 | }, | |
928 | }; | |
929 | ||
24a07a12 | 930 | static struct platform_device *ezkit_devices[] __initdata = { |
14b03204 MH |
931 | |
932 | &bfin_dpmc, | |
933 | ||
24a07a12 RH |
934 | #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) |
935 | &rtc_device, | |
936 | #endif | |
937 | ||
938 | #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) | |
939 | &bfin_uart_device, | |
940 | #endif | |
c6c4d7bb | 941 | |
5be36d22 | 942 | #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE) |
42bd8bcb GY |
943 | #ifdef CONFIG_BFIN_SIR0 |
944 | &bfin_sir0_device, | |
945 | #endif | |
946 | #ifdef CONFIG_BFIN_SIR1 | |
947 | &bfin_sir1_device, | |
948 | #endif | |
949 | #ifdef CONFIG_BFIN_SIR2 | |
950 | &bfin_sir2_device, | |
951 | #endif | |
952 | #ifdef CONFIG_BFIN_SIR3 | |
953 | &bfin_sir3_device, | |
954 | #endif | |
5be36d22 GY |
955 | #endif |
956 | ||
c6c4d7bb BW |
957 | #if defined(CONFIG_FB_BF54X_LQ043) || defined(CONFIG_FB_BF54X_LQ043_MODULE) |
958 | &bf54x_lq043_device, | |
959 | #endif | |
960 | ||
961 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | |
962 | &smsc911x_device, | |
963 | #endif | |
964 | ||
c6c4d7bb BW |
965 | #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) |
966 | &musb_device, | |
967 | #endif | |
968 | ||
3f375690 MH |
969 | #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) |
970 | &bfin_isp1760_device, | |
971 | #endif | |
972 | ||
c6c4d7bb BW |
973 | #if defined(CONFIG_PATA_BF54X) || defined(CONFIG_PATA_BF54X_MODULE) |
974 | &bfin_atapi_device, | |
975 | #endif | |
976 | ||
977 | #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE) | |
978 | &bf5xx_nand_device, | |
979 | #endif | |
980 | ||
3d7e6cf8 | 981 | #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE) |
c6c4d7bb BW |
982 | &bf54x_sdh_device, |
983 | #endif | |
984 | ||
985 | #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) | |
986 | &bf54x_spi_master0, | |
d4b1d273 | 987 | &bf54x_spi_master1, |
c6c4d7bb BW |
988 | #endif |
989 | ||
990 | #if defined(CONFIG_KEYBOARD_BFIN) || defined(CONFIG_KEYBOARD_BFIN_MODULE) | |
991 | &bf54x_kpad_device, | |
992 | #endif | |
993 | ||
aca5e4aa MH |
994 | #if defined(CONFIG_JOYSTICK_BFIN_ROTARY) || defined(CONFIG_JOYSTICK_BFIN_ROTARY_MODULE) |
995 | &bfin_rotary_device, | |
996 | #endif | |
997 | ||
c6c4d7bb BW |
998 | #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) |
999 | &i2c_bfin_twi0_device, | |
7160e950 | 1000 | #if !defined(CONFIG_BF542) |
c6c4d7bb BW |
1001 | &i2c_bfin_twi1_device, |
1002 | #endif | |
7160e950 | 1003 | #endif |
2463ef22 MH |
1004 | |
1005 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | |
1006 | &bfin_device_gpiokeys, | |
1007 | #endif | |
cad2ab65 MF |
1008 | |
1009 | &bfin_gpios_device, | |
793dc27b MF |
1010 | |
1011 | #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) | |
de8c43f2 | 1012 | &ezkit_flash_device, |
793dc27b | 1013 | #endif |
24a07a12 RH |
1014 | }; |
1015 | ||
a01d7a76 | 1016 | static int __init ezkit_init(void) |
24a07a12 | 1017 | { |
b85d858b | 1018 | printk(KERN_INFO "%s(): registering device resources\n", __func__); |
81d9c7f2 | 1019 | |
81d9c7f2 BW |
1020 | i2c_register_board_info(0, bfin_i2c_board_info0, |
1021 | ARRAY_SIZE(bfin_i2c_board_info0)); | |
1022 | #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */ | |
1023 | i2c_register_board_info(1, bfin_i2c_board_info1, | |
1024 | ARRAY_SIZE(bfin_i2c_board_info1)); | |
81d9c7f2 BW |
1025 | #endif |
1026 | ||
24a07a12 | 1027 | platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices)); |
c6c4d7bb | 1028 | |
5bda2723 | 1029 | spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); |
c6c4d7bb | 1030 | |
24a07a12 RH |
1031 | return 0; |
1032 | } | |
1033 | ||
a01d7a76 | 1034 | arch_initcall(ezkit_init); |