[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm64 / kernel / asm-offsets.c

/*
 * Based on arch/arm/kernel/asm-offsets.c
 *
 * Copyright (C) 1995-2003 Russell King
 *               2001-2002 Keith Owens
 * Copyright (C) 2012 ARM Ltd.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <asm/thread_info.h>
#include <asm/memory.h>
#include <asm/cputable.h>
#include <asm/smp_plat.h>
#include <asm/suspend.h>
#include <asm/vdso_datapage.h>
#include <linux/kbuild.h>

int main(void)
{
  DEFINE(TSK_ACTIVE_MM,		offsetof(struct task_struct, active_mm));
  BLANK();
  DEFINE(TI_FLAGS,		offsetof(struct thread_info, flags));
  DEFINE(TI_PREEMPT,		offsetof(struct thread_info, preempt_count));
  DEFINE(TI_ADDR_LIMIT,		offsetof(struct thread_info, addr_limit));
  DEFINE(TI_TASK,		offsetof(struct thread_info, task));
  DEFINE(TI_EXEC_DOMAIN,	offsetof(struct thread_info, exec_domain));
  DEFINE(TI_CPU,		offsetof(struct thread_info, cpu));
  DEFINE(TI_CPU_EXCP,		offsetof(struct thread_info, cpu_excp));
  DEFINE(TI_REGS_ON_EXCP,	offsetof(struct thread_info, regs_on_excp));
  BLANK();
  DEFINE(THREAD_CPU_CONTEXT,	offsetof(struct task_struct, thread.cpu_context));
  BLANK();
  DEFINE(S_X0,			offsetof(struct pt_regs, regs[0]));
  DEFINE(S_X1,			offsetof(struct pt_regs, regs[1]));
  DEFINE(S_X2,			offsetof(struct pt_regs, regs[2]));
  DEFINE(S_X3,			offsetof(struct pt_regs, regs[3]));
  DEFINE(S_X4,			offsetof(struct pt_regs, regs[4]));
  DEFINE(S_X5,			offsetof(struct pt_regs, regs[5]));
  DEFINE(S_X6,			offsetof(struct pt_regs, regs[6]));
  DEFINE(S_X7,			offsetof(struct pt_regs, regs[7]));
  DEFINE(S_X15,			offsetof(struct pt_regs, regs[15]));
  DEFINE(S_X16,			offsetof(struct pt_regs, regs[16]));
  DEFINE(S_X29,			offsetof(struct pt_regs, regs[29]));
  DEFINE(S_LR,			offsetof(struct pt_regs, regs[30]));
  DEFINE(S_SP,			offsetof(struct pt_regs, sp));
#ifdef CONFIG_COMPAT
  DEFINE(S_COMPAT_SP,		offsetof(struct pt_regs, compat_sp));
#endif
  DEFINE(S_PSTATE,		offsetof(struct pt_regs, pstate));
  DEFINE(S_PC,			offsetof(struct pt_regs, pc));
  DEFINE(S_ORIG_X0,		offsetof(struct pt_regs, orig_x0));
  DEFINE(S_SYSCALLNO,		offsetof(struct pt_regs, syscallno));
  DEFINE(S_FRAME_SIZE,		sizeof(struct pt_regs));
  BLANK();
  DEFINE(MM_CONTEXT_ID,		offsetof(struct mm_struct, context.id));
  BLANK();
  DEFINE(VMA_VM_MM,		offsetof(struct vm_area_struct, vm_mm));
  DEFINE(VMA_VM_FLAGS,		offsetof(struct vm_area_struct, vm_flags));
  BLANK();
  DEFINE(VM_EXEC,	       	VM_EXEC);
  BLANK();
  DEFINE(PAGE_SZ,	       	PAGE_SIZE);
  BLANK();
  DEFINE(CPU_INFO_SZ,		sizeof(struct cpu_info));
  DEFINE(CPU_INFO_SETUP,	offsetof(struct cpu_info, cpu_setup));
  BLANK();
  DEFINE(DMA_BIDIRECTIONAL,	DMA_BIDIRECTIONAL);
  DEFINE(DMA_TO_DEVICE,		DMA_TO_DEVICE);
  DEFINE(DMA_FROM_DEVICE,	DMA_FROM_DEVICE);
  BLANK();
  DEFINE(CLOCK_REALTIME,	CLOCK_REALTIME);
  DEFINE(CLOCK_MONOTONIC,	CLOCK_MONOTONIC);
  DEFINE(CLOCK_REALTIME_RES,	MONOTONIC_RES_NSEC);
  DEFINE(CLOCK_REALTIME_COARSE,	CLOCK_REALTIME_COARSE);
  DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
  DEFINE(CLOCK_COARSE_RES,	LOW_RES_NSEC);
  DEFINE(NSEC_PER_SEC,		NSEC_PER_SEC);
  BLANK();
  DEFINE(VDSO_CS_CYCLE_LAST,	offsetof(struct vdso_data, cs_cycle_last));
  DEFINE(VDSO_XTIME_CLK_SEC,	offsetof(struct vdso_data, xtime_clock_sec));
  DEFINE(VDSO_XTIME_CLK_NSEC,	offsetof(struct vdso_data, xtime_clock_nsec));
  DEFINE(VDSO_XTIME_CRS_SEC,	offsetof(struct vdso_data, xtime_coarse_sec));
  DEFINE(VDSO_XTIME_CRS_NSEC,	offsetof(struct vdso_data, xtime_coarse_nsec));
  DEFINE(VDSO_WTM_CLK_SEC,	offsetof(struct vdso_data, wtm_clock_sec));
  DEFINE(VDSO_WTM_CLK_NSEC,	offsetof(struct vdso_data, wtm_clock_nsec));
  DEFINE(VDSO_TB_SEQ_COUNT,	offsetof(struct vdso_data, tb_seq_count));
  DEFINE(VDSO_CS_MULT,		offsetof(struct vdso_data, cs_mult));
  DEFINE(VDSO_CS_SHIFT,		offsetof(struct vdso_data, cs_shift));
  DEFINE(VDSO_TZ_MINWEST,	offsetof(struct vdso_data, tz_minuteswest));
  DEFINE(VDSO_TZ_DSTTIME,	offsetof(struct vdso_data, tz_dsttime));
  DEFINE(VDSO_USE_SYSCALL,	offsetof(struct vdso_data, use_syscall));
  BLANK();
  DEFINE(TVAL_TV_SEC,		offsetof(struct timeval, tv_sec));
  DEFINE(TVAL_TV_USEC,		offsetof(struct timeval, tv_usec));
  DEFINE(TSPEC_TV_SEC,		offsetof(struct timespec, tv_sec));
  DEFINE(TSPEC_TV_NSEC,		offsetof(struct timespec, tv_nsec));
  BLANK();
  DEFINE(TZ_MINWEST,		offsetof(struct timezone, tz_minuteswest));
  DEFINE(TZ_DSTTIME,		offsetof(struct timezone, tz_dsttime));
  BLANK();
#ifdef CONFIG_KVM_ARM_HOST
  DEFINE(VCPU_CONTEXT,		offsetof(struct kvm_vcpu, arch.ctxt));
  DEFINE(CPU_GP_REGS,		offsetof(struct kvm_cpu_context, gp_regs));
  DEFINE(CPU_USER_PT_REGS,	offsetof(struct kvm_regs, regs));
  DEFINE(CPU_FP_REGS,		offsetof(struct kvm_regs, fp_regs));
  DEFINE(CPU_SP_EL1,		offsetof(struct kvm_regs, sp_el1));
  DEFINE(CPU_ELR_EL1,		offsetof(struct kvm_regs, elr_el1));
  DEFINE(CPU_SPSR,		offsetof(struct kvm_regs, spsr));
  DEFINE(CPU_SYSREGS,		offsetof(struct kvm_cpu_context, sys_regs));
  DEFINE(VCPU_ESR_EL2,		offsetof(struct kvm_vcpu, arch.fault.esr_el2));
  DEFINE(VCPU_FAR_EL2,		offsetof(struct kvm_vcpu, arch.fault.far_el2));
  DEFINE(VCPU_HPFAR_EL2,	offsetof(struct kvm_vcpu, arch.fault.hpfar_el2));
  DEFINE(VCPU_HCR_EL2,		offsetof(struct kvm_vcpu, arch.hcr_el2));
  DEFINE(VCPU_IRQ_LINES,	offsetof(struct kvm_vcpu, arch.irq_lines));
  DEFINE(VCPU_HOST_CONTEXT,	offsetof(struct kvm_vcpu, arch.host_cpu_context));
  DEFINE(VCPU_TIMER_CNTV_CTL,	offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
  DEFINE(VCPU_TIMER_CNTV_CVAL,	offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
  DEFINE(KVM_TIMER_CNTVOFF,	offsetof(struct kvm, arch.timer.cntvoff));
  DEFINE(KVM_TIMER_ENABLED,	offsetof(struct kvm, arch.timer.enabled));
  DEFINE(VCPU_KVM,		offsetof(struct kvm_vcpu, kvm));
  DEFINE(VCPU_VGIC_CPU,		offsetof(struct kvm_vcpu, arch.vgic_cpu));
  DEFINE(VGIC_CPU_HCR,		offsetof(struct vgic_cpu, vgic_hcr));
  DEFINE(VGIC_CPU_VMCR,		offsetof(struct vgic_cpu, vgic_vmcr));
  DEFINE(VGIC_CPU_MISR,		offsetof(struct vgic_cpu, vgic_misr));
  DEFINE(VGIC_CPU_EISR,		offsetof(struct vgic_cpu, vgic_eisr));
  DEFINE(VGIC_CPU_ELRSR,	offsetof(struct vgic_cpu, vgic_elrsr));
  DEFINE(VGIC_CPU_APR,		offsetof(struct vgic_cpu, vgic_apr));
  DEFINE(VGIC_CPU_LR,		offsetof(struct vgic_cpu, vgic_lr));
  DEFINE(VGIC_CPU_NR_LR,	offsetof(struct vgic_cpu, nr_lr));
  DEFINE(KVM_VTTBR,		offsetof(struct kvm, arch.vttbr));
  DEFINE(KVM_VGIC_VCTRL,	offsetof(struct kvm, arch.vgic.vctrl_base));
#endif
#ifdef CONFIG_ARM64_CPU_SUSPEND
  DEFINE(CPU_SUSPEND_SZ,	sizeof(struct cpu_suspend_ctx));
  DEFINE(CPU_CTX_SP,		offsetof(struct cpu_suspend_ctx, sp));
  DEFINE(MPIDR_HASH_MASK,	offsetof(struct mpidr_hash, mask));
  DEFINE(MPIDR_HASH_SHIFTS,	offsetof(struct mpidr_hash, shift_aff));
  DEFINE(SLEEP_SAVE_SP_SZ,	sizeof(struct sleep_save_sp));
  DEFINE(SLEEP_SAVE_SP_PHYS,	offsetof(struct sleep_save_sp, save_ptr_stash_phys));
  DEFINE(SLEEP_SAVE_SP_VIRT,	offsetof(struct sleep_save_sp, save_ptr_stash));
#endif
  return 0;
}
Commit	Line	Data
0be7320a CM	1	/*
	2	* Based on arch/arm/kernel/asm-offsets.c
	3	*
	4	* Copyright (C) 1995-2003 Russell King
	5	* 2001-2002 Keith Owens
	6	* Copyright (C) 2012 ARM Ltd.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
	21	#include <linux/sched.h>
	22	#include <linux/mm.h>
	23	#include <linux/dma-mapping.h>
	24	#include <asm/thread_info.h>
	25	#include <asm/memory.h>
	26	#include <asm/cputable.h>
6fa3eb70 S	27	#include <asm/smp_plat.h>
6fa3eb70 S	28	#include <asm/suspend.h>
0be7320a CM	29	#include <asm/vdso_datapage.h>
	30	#include <linux/kbuild.h>
	31
	32	int main(void)
	33	{
	34	DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
	35	BLANK();
	36	DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
	37	DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
	38	DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
	39	DEFINE(TI_TASK, offsetof(struct thread_info, task));
	40	DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
	41	DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
6fa3eb70 S	42	DEFINE(TI_CPU_EXCP, offsetof(struct thread_info, cpu_excp));
6fa3eb70 S	43	DEFINE(TI_REGS_ON_EXCP, offsetof(struct thread_info, regs_on_excp));
0be7320a CM	44	BLANK();
	45	DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
	46	BLANK();
	47	DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
	48	DEFINE(S_X1, offsetof(struct pt_regs, regs[1]));
	49	DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
	50	DEFINE(S_X3, offsetof(struct pt_regs, regs[3]));
	51	DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
	52	DEFINE(S_X5, offsetof(struct pt_regs, regs[5]));
	53	DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
	54	DEFINE(S_X7, offsetof(struct pt_regs, regs[7]));
6fa3eb70 S	55	DEFINE(S_X15, offsetof(struct pt_regs, regs[15]));
	56	DEFINE(S_X16, offsetof(struct pt_regs, regs[16]));
	57	DEFINE(S_X29, offsetof(struct pt_regs, regs[29]));
0be7320a CM	58	DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
	59	DEFINE(S_SP, offsetof(struct pt_regs, sp));
	60	#ifdef CONFIG_COMPAT
	61	DEFINE(S_COMPAT_SP, offsetof(struct pt_regs, compat_sp));
	62	#endif
	63	DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
	64	DEFINE(S_PC, offsetof(struct pt_regs, pc));
	65	DEFINE(S_ORIG_X0, offsetof(struct pt_regs, orig_x0));
	66	DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
	67	DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
	68	BLANK();
	69	DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id));
	70	BLANK();
	71	DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
	72	DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
	73	BLANK();
	74	DEFINE(VM_EXEC, VM_EXEC);
	75	BLANK();
	76	DEFINE(PAGE_SZ, PAGE_SIZE);
	77	BLANK();
	78	DEFINE(CPU_INFO_SZ, sizeof(struct cpu_info));
	79	DEFINE(CPU_INFO_SETUP, offsetof(struct cpu_info, cpu_setup));
	80	BLANK();
	81	DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
	82	DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
	83	DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
	84	BLANK();
	85	DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
	86	DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
	87	DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
	88	DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
	89	DEFINE(CLOCK_MONOTONIC_COARSE,CLOCK_MONOTONIC_COARSE);
	90	DEFINE(CLOCK_COARSE_RES, LOW_RES_NSEC);
	91	DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
	92	BLANK();
	93	DEFINE(VDSO_CS_CYCLE_LAST, offsetof(struct vdso_data, cs_cycle_last));
	94	DEFINE(VDSO_XTIME_CLK_SEC, offsetof(struct vdso_data, xtime_clock_sec));
	95	DEFINE(VDSO_XTIME_CLK_NSEC, offsetof(struct vdso_data, xtime_clock_nsec));
	96	DEFINE(VDSO_XTIME_CRS_SEC, offsetof(struct vdso_data, xtime_coarse_sec));
	97	DEFINE(VDSO_XTIME_CRS_NSEC, offsetof(struct vdso_data, xtime_coarse_nsec));
	98	DEFINE(VDSO_WTM_CLK_SEC, offsetof(struct vdso_data, wtm_clock_sec));
	99	DEFINE(VDSO_WTM_CLK_NSEC, offsetof(struct vdso_data, wtm_clock_nsec));
	100	DEFINE(VDSO_TB_SEQ_COUNT, offsetof(struct vdso_data, tb_seq_count));
	101	DEFINE(VDSO_CS_MULT, offsetof(struct vdso_data, cs_mult));
	102	DEFINE(VDSO_CS_SHIFT, offsetof(struct vdso_data, cs_shift));
	103	DEFINE(VDSO_TZ_MINWEST, offsetof(struct vdso_data, tz_minuteswest));
	104	DEFINE(VDSO_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
	105	DEFINE(VDSO_USE_SYSCALL, offsetof(struct vdso_data, use_syscall));
	106	BLANK();
	107	DEFINE(TVAL_TV_SEC, offsetof(struct timeval, tv_sec));
	108	DEFINE(TVAL_TV_USEC, offsetof(struct timeval, tv_usec));
	109	DEFINE(TSPEC_TV_SEC, offsetof(struct timespec, tv_sec));
	110	DEFINE(TSPEC_TV_NSEC, offsetof(struct timespec, tv_nsec));
	111	BLANK();
	112	DEFINE(TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
	113	DEFINE(TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
6fa3eb70 S	114	BLANK();
	115	#ifdef CONFIG_KVM_ARM_HOST
	116	DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
	117	DEFINE(CPU_GP_REGS, offsetof(struct kvm_cpu_context, gp_regs));
	118	DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_regs, regs));
	119	DEFINE(CPU_FP_REGS, offsetof(struct kvm_regs, fp_regs));
	120	DEFINE(CPU_SP_EL1, offsetof(struct kvm_regs, sp_el1));
	121	DEFINE(CPU_ELR_EL1, offsetof(struct kvm_regs, elr_el1));
	122	DEFINE(CPU_SPSR, offsetof(struct kvm_regs, spsr));
	123	DEFINE(CPU_SYSREGS, offsetof(struct kvm_cpu_context, sys_regs));
	124	DEFINE(VCPU_ESR_EL2, offsetof(struct kvm_vcpu, arch.fault.esr_el2));
	125	DEFINE(VCPU_FAR_EL2, offsetof(struct kvm_vcpu, arch.fault.far_el2));
	126	DEFINE(VCPU_HPFAR_EL2, offsetof(struct kvm_vcpu, arch.fault.hpfar_el2));
	127	DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2));
	128	DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
	129	DEFINE(VCPU_HOST_CONTEXT, offsetof(struct kvm_vcpu, arch.host_cpu_context));
	130	DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
	131	DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
	132	DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
	133	DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
	134	DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
	135	DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
	136	DEFINE(VGIC_CPU_HCR, offsetof(struct vgic_cpu, vgic_hcr));
	137	DEFINE(VGIC_CPU_VMCR, offsetof(struct vgic_cpu, vgic_vmcr));
	138	DEFINE(VGIC_CPU_MISR, offsetof(struct vgic_cpu, vgic_misr));
	139	DEFINE(VGIC_CPU_EISR, offsetof(struct vgic_cpu, vgic_eisr));
	140	DEFINE(VGIC_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_elrsr));
	141	DEFINE(VGIC_CPU_APR, offsetof(struct vgic_cpu, vgic_apr));
	142	DEFINE(VGIC_CPU_LR, offsetof(struct vgic_cpu, vgic_lr));
	143	DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
	144	DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
	145	DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
	146	#endif
	147	#ifdef CONFIG_ARM64_CPU_SUSPEND
	148	DEFINE(CPU_SUSPEND_SZ, sizeof(struct cpu_suspend_ctx));
	149	DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
	150	DEFINE(MPIDR_HASH_MASK, offsetof(struct mpidr_hash, mask));
	151	DEFINE(MPIDR_HASH_SHIFTS, offsetof(struct mpidr_hash, shift_aff));
	152	DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
	153	DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
	154	DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
	155	#endif
0be7320a CM	156	return 0;
0be7320a CM	157	}