[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm64 / include / asm / smp_plat.h

/*
 * Definitions specific to SMP platforms.
 *
 * Copyright (C) 2013 ARM Ltd.
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef __ASM_SMP_PLAT_H
#define __ASM_SMP_PLAT_H

#include <asm/types.h>

struct mpidr_hash {
	u64	mask;
	u32	shift_aff[4];
	u32	bits;
};

extern struct mpidr_hash mpidr_hash;

static inline u32 mpidr_hash_size(void)
{
	return 1 << mpidr_hash.bits;
}

/*
 * Logical CPU mapping.
 */
extern u64 __cpu_logical_map[NR_CPUS];
#define cpu_logical_map(cpu)    __cpu_logical_map[cpu]

#endif /* __ASM_SMP_PLAT_H */
Commit	Line	Data
4c7aa002 JM	1	/*
	2	* Definitions specific to SMP platforms.
	3	*
	4	* Copyright (C) 2013 ARM Ltd.
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	17	*/
	18
	19	#ifndef __ASM_SMP_PLAT_H
	20	#define __ASM_SMP_PLAT_H
	21
	22	#include <asm/types.h>
	23
6fa3eb70 S	24	struct mpidr_hash {
	25	u64 mask;
	26	u32 shift_aff[4];
	27	u32 bits;
	28	};
	29
	30	extern struct mpidr_hash mpidr_hash;
	31
	32	static inline u32 mpidr_hash_size(void)
	33	{
	34	return 1 << mpidr_hash.bits;
	35	}
	36
4c7aa002 JM	37	/*
	38	* Logical CPU mapping.
	39	*/
	40	extern u64 __cpu_logical_map[NR_CPUS];
	41	#define cpu_logical_map(cpu) __cpu_logical_map[cpu]
	42
	43	#endif /* __ASM_SMP_PLAT_H */