[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / plat-samsung / include / plat / clock.h

/* linux/arch/arm/plat-s3c/include/plat/clock.h
 *
 * Copyright (c) 2004-2005 Simtec Electronics
 *	http://www.simtec.co.uk/products/SWLINUX/
 *	Written by Ben Dooks, <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/spinlock.h>

struct clk;

/**
 * struct clk_ops - standard clock operations
 * @set_rate: set the clock rate, see clk_set_rate().
 * @get_rate: get the clock rate, see clk_get_rate().
 * @round_rate: round a given clock rate, see clk_round_rate().
 * @set_parent: set the clock's parent, see clk_set_parent().
 *
 * Group the common clock implementations together so that we
 * don't have to keep setting the same fields again. We leave
 * enable in struct clk.
 *
 * Adding an extra layer of indirection into the process should
 * not be a problem as it is unlikely these operations are going
 * to need to be called quickly.
 */
struct clk_ops {
	int		    (*set_rate)(struct clk *c, unsigned long rate);
	unsigned long	    (*get_rate)(struct clk *c);
	unsigned long	    (*round_rate)(struct clk *c, unsigned long rate);
	int		    (*set_parent)(struct clk *c, struct clk *parent);
};

struct clk {
	struct list_head      list;
	struct module        *owner;
	struct clk           *parent;
	const char           *name;
	int		      id;
	int		      usage;
	unsigned long         rate;
	unsigned long         ctrlbit;

	struct clk_ops		*ops;
	int		    (*enable)(struct clk *, int enable);
#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
	struct dentry		*dent;	/* For visible tree hierarchy */
#endif
};

/* other clocks which may be registered by board support */

extern struct clk s3c24xx_dclk0;
extern struct clk s3c24xx_dclk1;
extern struct clk s3c24xx_clkout0;
extern struct clk s3c24xx_clkout1;
extern struct clk s3c24xx_uclk;

extern struct clk clk_usb_bus;

/* core clock support */

extern struct clk clk_f;
extern struct clk clk_h;
extern struct clk clk_p;
extern struct clk clk_mpll;
extern struct clk clk_upll;
extern struct clk clk_epll;
extern struct clk clk_xtal;
extern struct clk clk_ext;

/* S3C64XX specific clocks */
extern struct clk clk_h2;
extern struct clk clk_27m;
extern struct clk clk_48m;
extern struct clk clk_xusbxti;

extern int clk_default_setrate(struct clk *clk, unsigned long rate);
extern struct clk_ops clk_ops_def_setrate;

/* exports for arch/arm/mach-s3c2410
 *
 * Please DO NOT use these outside of arch/arm/mach-s3c2410
*/

extern spinlock_t clocks_lock;

extern int s3c2410_clkcon_enable(struct clk *clk, int enable);

extern int s3c24xx_register_clock(struct clk *clk);
extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);

extern void s3c_register_clocks(struct clk *clk, int nr_clks);
extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);

extern int s3c24xx_register_baseclocks(unsigned long xtal);

extern void s5p_register_clocks(unsigned long xtal_freq);

extern void s3c24xx_setup_clocks(unsigned long fclk,
				 unsigned long hclk,
				 unsigned long pclk);

extern void s3c2410_setup_clocks(void);
extern void s3c2412_setup_clocks(void);
extern void s3c244x_setup_clocks(void);
extern void s3c2443_setup_clocks(void);

/* S3C64XX specific functions and clocks */

extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);

/* Init for pwm clock code */

extern void s3c_pwmclk_init(void);
Commit	Line	Data
a503059c	1	/* linux/arch/arm/plat-s3c/include/plat/clock.h
1da177e4 LT	2	*
	3	* Copyright (c) 2004-2005 Simtec Electronics
	4	* http://www.simtec.co.uk/products/SWLINUX/
	5	* Written by Ben Dooks, <ben@simtec.co.uk>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
c3391e36 BD	12	#include <linux/spinlock.h>
c3391e36 BD	13
b3bf41be BD	14	struct clk;
	15
	16	/**
	17	* struct clk_ops - standard clock operations
	18	* @set_rate: set the clock rate, see clk_set_rate().
	19	* @get_rate: get the clock rate, see clk_get_rate().
	20	* @round_rate: round a given clock rate, see clk_round_rate().
	21	* @set_parent: set the clock's parent, see clk_set_parent().
	22	*
	23	* Group the common clock implementations together so that we
25985edc	24	* don't have to keep setting the same fields again. We leave
b3bf41be BD	25	* enable in struct clk.
	26	*
	27	* Adding an extra layer of indirection into the process should
	28	* not be a problem as it is unlikely these operations are going
	29	* to need to be called quickly.
	30	*/
	31	struct clk_ops {
	32	int (set_rate)(struct clk c, unsigned long rate);
	33	unsigned long (get_rate)(struct clk c);
	34	unsigned long (round_rate)(struct clk c, unsigned long rate);
	35	int (set_parent)(struct clk c, struct clk *parent);
	36	};
	37
1da177e4 LT	38	struct clk {
	39	struct list_head list;
	40	struct module *owner;
	41	struct clk *parent;
	42	const char *name;
	43	int id;
2a513ce7	44	int usage;
1da177e4 LT	45	unsigned long rate;
1da177e4 LT	46	unsigned long ctrlbit;
d3468daa	47
b3bf41be	48	struct clk_ops *ops;
1da177e4	49	int (enable)(struct clk , int enable);
436c3878 ADK	50	#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
	51	struct dentry dent; / For visible tree hierarchy */
	52	#endif
1da177e4 LT	53	};
	54
	55	/* other clocks which may be registered by board support */
	56
	57	extern struct clk s3c24xx_dclk0;
	58	extern struct clk s3c24xx_dclk1;
	59	extern struct clk s3c24xx_clkout0;
	60	extern struct clk s3c24xx_clkout1;
	61	extern struct clk s3c24xx_uclk;
	62
36c64af4 BD	63	extern struct clk clk_usb_bus;
36c64af4 BD	64
99c13853 BD	65	/* core clock support */
	66
	67	extern struct clk clk_f;
	68	extern struct clk clk_h;
	69	extern struct clk clk_p;
513846f8	70	extern struct clk clk_mpll;
99c13853	71	extern struct clk clk_upll;
4b31d8b2	72	extern struct clk clk_epll;
513846f8	73	extern struct clk clk_xtal;
4b31d8b2 BD	74	extern struct clk clk_ext;
	75
	76	/* S3C64XX specific clocks */
a03f7daf	77	extern struct clk clk_h2;
4b31d8b2 BD	78	extern struct clk clk_27m;
4b31d8b2 BD	79	extern struct clk clk_48m;
05e021f0	80	extern struct clk clk_xusbxti;
99c13853	81
ed276849 KK	82	extern int clk_default_setrate(struct clk *clk, unsigned long rate);
	83	extern struct clk_ops clk_ops_def_setrate;
	84
1da177e4 LT	85	/* exports for arch/arm/mach-s3c2410
	86	*
	87	* Please DO NOT use these outside of arch/arm/mach-s3c2410
	88	*/
	89
c3391e36	90	extern spinlock_t clocks_lock;
36c64af4	91
99c13853 BD	92	extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
99c13853 BD	93
1da177e4	94	extern int s3c24xx_register_clock(struct clk *clk);
ce89c206	95	extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
1da177e4	96
1d9f13c4	97	extern void s3c_register_clocks(struct clk *clk, int nr_clks);
4e04691b	98	extern void s3c_disable_clocks(struct clk *clkp, int nr_clks);
1d9f13c4	99
e425382e BD	100	extern int s3c24xx_register_baseclocks(unsigned long xtal);
e425382e BD	101
1a0e8a52	102	extern void s5p_register_clocks(unsigned long xtal_freq);
4b31d8b2	103
e425382e BD	104	extern void s3c24xx_setup_clocks(unsigned long fclk,
	105	unsigned long hclk,
	106	unsigned long pclk);
	107
	108	extern void s3c2410_setup_clocks(void);
	109	extern void s3c2412_setup_clocks(void);
	110	extern void s3c244x_setup_clocks(void);
	111	extern void s3c2443_setup_clocks(void);
	112
cf18acf0 BD	113	/* S3C64XX specific functions and clocks */
	114
	115	extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
9d325f23 BD	116
	117	/* Init for pwm clock code */
	118
	119	extern void s3c_pwmclk_init(void);
	120