ARM: 5910/1: ARM: Add tmp register for addruart and loadsp
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / plat-mxc / include / mach / debug-macro.S
CommitLineData
a09e64fb 1/* arch/arm/mach-imx/include/mach/debug-macro.S
4bc25650
SH
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
ccc1a6f8
SH
14#ifdef CONFIG_ARCH_MX1
15#include <mach/mx1.h>
16#define UART_PADDR UART1_BASE_ADDR
17#define UART_VADDR IO_ADDRESS(UART1_BASE_ADDR)
1553a1ec 18#endif
ccc1a6f8 19
8c25c36f
SH
20#ifdef CONFIG_ARCH_MX25
21#ifdef UART_PADDR
22#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
23#endif
24#include <mach/mx25.h>
25#define UART_PADDR UART1_BASE_ADDR
26#define UART_VADDR MX25_AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
27#endif
28
ccc1a6f8
SH
29#ifdef CONFIG_ARCH_MX2
30#ifdef UART_PADDR
31#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
5e9145ed 32#endif
ccc1a6f8
SH
33#include <mach/mx2x.h>
34#define UART_PADDR UART1_BASE_ADDR
35#define UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR)
aefa1c6e 36#endif
ccc1a6f8
SH
37
38#ifdef CONFIG_ARCH_MX3
39#ifdef UART_PADDR
40#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
8c032ec3 41#endif
ccc1a6f8
SH
42#include <mach/mx3x.h>
43#define UART_PADDR UART1_BASE_ADDR
44#define UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
80eedae6 45#endif
ccc1a6f8 46
fd6ac7bb
DT
47#ifdef CONFIG_ARCH_MXC91231
48#ifdef UART_PADDR
49#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
50#endif
51#include <mach/mxc91231.h>
52#define UART_PADDR MXC91231_UART2_BASE_ADDR
53#define UART_VADDR MXC91231_AIPS1_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
54#endif
4e6d488a 55 .macro addruart, rx, tmp
4bc25650
SH
56 mrc p15, 0, \rx, c1, c0
57 tst \rx, #1 @ MMU enabled?
ccc1a6f8
SH
58 ldreq \rx, =UART_PADDR @ physical
59 ldrne \rx, =UART_VADDR @ virtual
4bc25650
SH
60 .endm
61
62 .macro senduart,rd,rx
63 str \rd, [\rx, #0x40] @ TXDATA
64 .endm
65
66 .macro waituart,rd,rx
67 .endm
68
69 .macro busyuart,rd,rx
701002: ldr \rd, [\rx, #0x98] @ SR2
71 tst \rd, #1 << 3 @ TXDC
72 beq 1002b @ wait until transmit done
73 .endm