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Merge branch 'i2c-embedded/for-next' of git://git.pengutronix.de/git/wsa/linux
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-omap2 / board-cm-t35.c
CommitLineData
2886d128 1/*
c3146974 2 * CompuLab CM-T35/CM-T3730 modules support
2886d128 3 *
d12c2e28
IG		 4 * Copyright (C) 2009-2011 CompuLab, Ltd.
5 * Authors: Mike Rapoport <mike@compulab.co.il>
6 * Igor Grinberg <grinberg@compulab.co.il>
2886d128
MR		 7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
2886d128
MR		 17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/input.h>
23#include <linux/input/matrix_keypad.h>
24#include <linux/delay.h>
25#include <linux/gpio.h>
4b25408f 26#include <linux/platform_data/gpio-omap.h>
2886d128
MR		 27
28#include <linux/i2c/at24.h>
ebeb53e1 29#include <linux/i2c/twl.h>
5b3689f4 30#include <linux/regulator/fixed.h>
2886d128 31#include <linux/regulator/machine.h>
3a63833e 32#include <linux/mmc/host.h>
2886d128 33
7f049ad1
MR		 34#include <linux/spi/spi.h>
35#include <linux/spi/tdo24m.h>
36
2886d128
MR		 37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/mach/map.h>
40
2203747c 41#include <linux/platform_data/mtd-nand-omap2.h>
a0b38cc4 42#include <video/omapdss.h>
f8ae2f08 43#include <video/omap-panel-generic-dpi.h>
dac8eb5f 44#include <video/omap-panel-tfp410.h>
2203747c 45#include <linux/platform_data/spi-omap2-mcspi.h>
2886d128 46
6d02643d 47#include "common.h"
ca5742bd 48#include "mux.h"
2886d128 49#include "sdram-micron-mt46h32m32lf-6.h"
d02a900b 50#include "hsmmc.h"
96974a24 51#include "common-board-devices.h"
6d02643d 52#include "gpmc.h"
bc3668ea 53#include "gpmc-nand.h"
2886d128 54
039401f3
IG		 55#define CM_T35_GPIO_PENDOWN 57
56#define SB_T35_USB_HUB_RESET_GPIO 167
2886d128
MR		 57
58#define CM_T35_SMSC911X_CS 5
59#define CM_T35_SMSC911X_GPIO 163
60#define SB_T35_SMSC911X_CS 4
61#define SB_T35_SMSC911X_GPIO 65
62
2886d128
MR		 63#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
64#include <linux/smsc911x.h>
ac839b3c 65#include "gpmc-smsc911x.h"
2886d128 66
21b42731 67static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
2886d128 68 .id = 0,
21b42731
MR		 69 .cs = CM_T35_SMSC911X_CS,
70 .gpio_irq = CM_T35_SMSC911X_GPIO,
71 .gpio_reset = -EINVAL,
72 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 73};
74
21b42731 75static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
2886d128 76 .id = 1,
21b42731
MR		 77 .cs = SB_T35_SMSC911X_CS,
78 .gpio_irq = SB_T35_SMSC911X_GPIO,
79 .gpio_reset = -EINVAL,
80 .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
2886d128
MR		 81};
82
5b3689f4
RD		 83static struct regulator_consumer_supply cm_t35_smsc911x_supplies[] = {
84 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
85 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
86};
87
88static struct regulator_consumer_supply sb_t35_smsc911x_supplies[] = {
89 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
90 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
91};
92
2886d128
MR		 93static void __init cm_t35_init_ethernet(void)
94{
5b3689f4
RD		 95 regulator_register_fixed(0, cm_t35_smsc911x_supplies,
96 ARRAY_SIZE(cm_t35_smsc911x_supplies));
97 regulator_register_fixed(1, sb_t35_smsc911x_supplies,
98 ARRAY_SIZE(sb_t35_smsc911x_supplies));
99
21b42731
MR		 100 gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
101 gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
2886d128
MR		 102}
103#else
104static inline void __init cm_t35_init_ethernet(void) { return; }
105#endif
106
107#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
108#include <linux/leds.h>
109
110static struct gpio_led cm_t35_leds[] = {
111 [0] = {
112 .gpio = 186,
113 .name = "cm-t35:green",
114 .default_trigger = "heartbeat",
115 .active_low = 0,
116 },
117};
118
119static struct gpio_led_platform_data cm_t35_led_pdata = {
120 .num_leds = ARRAY_SIZE(cm_t35_leds),
121 .leds = cm_t35_leds,
122};
123
124static struct platform_device cm_t35_led_device = {
125 .name = "leds-gpio",
126 .id = -1,
127 .dev = {
128 .platform_data = &cm_t35_led_pdata,
129 },
130};
131
132static void __init cm_t35_init_led(void)
133{
134 platform_device_register(&cm_t35_led_device);
135}
136#else
137static inline void cm_t35_init_led(void) {}
138#endif
139
140#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
141#include <linux/mtd/mtd.h>
142#include <linux/mtd/nand.h>
143#include <linux/mtd/partitions.h>
144
145static struct mtd_partition cm_t35_nand_partitions[] = {
146 {
147 .name = "xloader",
148 .offset = 0, /* Offset = 0x00000 */
149 .size = 4 * NAND_BLOCK_SIZE,
150 .mask_flags = MTD_WRITEABLE
151 },
152 {
153 .name = "uboot",
154 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
155 .size = 15 * NAND_BLOCK_SIZE,
156 },
157 {
158 .name = "uboot environment",
159 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
160 .size = 2 * NAND_BLOCK_SIZE,
161 },
162 {
163 .name = "linux",
d12c2e28 164 .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
2886d128
MR		 165 .size = 32 * NAND_BLOCK_SIZE,
166 },
167 {
168 .name = "rootfs",
d12c2e28 169 .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
2886d128
MR		 170 .size = MTDPART_SIZ_FULL,
171 },
172};
173
174static struct omap_nand_platform_data cm_t35_nand_data = {
175 .parts = cm_t35_nand_partitions,
176 .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
2886d128 177 .cs = 0,
2886d128
MR		 178};
179
2886d128
MR		 180static void __init cm_t35_init_nand(void)
181{
bc3668ea 182 if (gpmc_nand_init(&cm_t35_nand_data, NULL) < 0)
2886d128
MR		 183 pr_err("CM-T35: Unable to register NAND device\n");
184}
185#else
186static inline void cm_t35_init_nand(void) {}
187#endif
188
7f049ad1
MR		 189#define CM_T35_LCD_EN_GPIO 157
190#define CM_T35_LCD_BL_GPIO 58
191#define CM_T35_DVI_EN_GPIO 54
192
7f049ad1
MR		 193static int lcd_enabled;
194static int dvi_enabled;
195
196static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
197{
198 if (dvi_enabled) {
199 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
200 return -EINVAL;
201 }
202
bc593f5d
IG		 203 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
204 gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
7f049ad1
MR		 205
206 lcd_enabled = 1;
207
208 return 0;
209}
210
211static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
212{
213 lcd_enabled = 0;
214
bc593f5d
IG		 215 gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
216 gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
7f049ad1
MR		 217}
218
7f049ad1
MR		 219static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
220{
221 return 0;
222}
223
224static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
225{
226}
227
89747c91
BW		 228static struct panel_generic_dpi_data lcd_panel = {
229 .name = "toppoly_tdo35s",
230 .platform_enable = cm_t35_panel_enable_lcd,
231 .platform_disable = cm_t35_panel_disable_lcd,
232};
233
7f049ad1
MR		 234static struct omap_dss_device cm_t35_lcd_device = {
235 .name = "lcd",
7f049ad1 236 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 237 .driver_name = "generic_dpi_panel",
238 .data = &lcd_panel,
7f049ad1 239 .phy.dpi.data_lines = 18,
89747c91
BW		 240};
241
2e6f2ee7 242static struct tfp410_platform_data dvi_panel = {
e813a55e 243 .power_down_gpio = CM_T35_DVI_EN_GPIO,
7f049ad1
MR		 244};
245
246static struct omap_dss_device cm_t35_dvi_device = {
247 .name = "dvi",
7f049ad1 248 .type = OMAP_DISPLAY_TYPE_DPI,
2e6f2ee7 249 .driver_name = "tfp410",
89747c91 250 .data = &dvi_panel,
7f049ad1 251 .phy.dpi.data_lines = 24,
7f049ad1
MR		 252};
253
254static struct omap_dss_device cm_t35_tv_device = {
255 .name = "tv",
256 .driver_name = "venc",
257 .type = OMAP_DISPLAY_TYPE_VENC,
258 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
259 .platform_enable = cm_t35_panel_enable_tv,
260 .platform_disable = cm_t35_panel_disable_tv,
261};
262
263static struct omap_dss_device *cm_t35_dss_devices[] = {
264 &cm_t35_lcd_device,
265 &cm_t35_dvi_device,
266 &cm_t35_tv_device,
267};
268
269static struct omap_dss_board_info cm_t35_dss_data = {
270 .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
271 .devices = cm_t35_dss_devices,
272 .default_device = &cm_t35_dvi_device,
273};
274
7f049ad1
MR		 275static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
276 .turbo_mode = 0,
7f049ad1
MR		 277};
278
279static struct tdo24m_platform_data tdo24m_config = {
280 .model = TDO35S,
281};
282
283static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
284 {
285 .modalias = "tdo24m",
286 .bus_num = 4,
287 .chip_select = 0,
288 .max_speed_hz = 1000000,
289 .controller_data = &tdo24m_mcspi_config,
290 .platform_data = &tdo24m_config,
291 },
292};
293
bc593f5d
IG		 294static struct gpio cm_t35_dss_gpios[] __initdata = {
295 { CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
296 { CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
bc593f5d
IG		 297};
298
7f049ad1
MR		 299static void __init cm_t35_init_display(void)
300{
301 int err;
302
7f049ad1
MR		 303 spi_register_board_info(cm_t35_lcd_spi_board_info,
304 ARRAY_SIZE(cm_t35_lcd_spi_board_info));
305
bc593f5d
IG		 306 err = gpio_request_array(cm_t35_dss_gpios,
307 ARRAY_SIZE(cm_t35_dss_gpios));
7f049ad1 308 if (err) {
bc593f5d
IG		 309 pr_err("CM-T35: failed to request DSS control GPIOs\n");
310 return;
7f049ad1
MR		 311 }
312
bc593f5d
IG		 313 gpio_export(CM_T35_LCD_EN_GPIO, 0);
314 gpio_export(CM_T35_LCD_BL_GPIO, 0);
7f049ad1
MR		 315
316 msleep(50);
bc593f5d 317 gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
7f049ad1 318
d5e13227 319 err = omap_display_init(&cm_t35_dss_data);
7f049ad1
MR		 320 if (err) {
321 pr_err("CM-T35: failed to register DSS device\n");
bc593f5d 322 gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios));
7f049ad1 323 }
7f049ad1
MR		 324}
325
786b01a8
OD		 326static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
327 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
2886d128
MR		 328};
329
786b01a8
OD		 330static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
331 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
2886d128
MR		 332};
333
b74f149c
IG		 334static struct regulator_consumer_supply cm_t35_vio_supplies[] = {
335 REGULATOR_SUPPLY("vcc", "spi1.0"),
cd1c683c
IG		 336 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
337 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
b74f149c
IG		 338};
339
2886d128
MR		 340/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
341static struct regulator_init_data cm_t35_vmmc1 = {
342 .constraints = {
343 .min_uV = 1850000,
344 .max_uV = 3150000,
345 .valid_modes_mask = REGULATOR_MODE_NORMAL
346 | REGULATOR_MODE_STANDBY,
347 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
348 | REGULATOR_CHANGE_MODE
349 | REGULATOR_CHANGE_STATUS,
350 },
786b01a8
OD		 351 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
352 .consumer_supplies = cm_t35_vmmc1_supply,
2886d128
MR		 353};
354
355/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
356static struct regulator_init_data cm_t35_vsim = {
357 .constraints = {
358 .min_uV = 1800000,
359 .max_uV = 3000000,
360 .valid_modes_mask = REGULATOR_MODE_NORMAL
361 | REGULATOR_MODE_STANDBY,
362 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
363 | REGULATOR_CHANGE_MODE
364 | REGULATOR_CHANGE_STATUS,
365 },
786b01a8
OD		 366 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
367 .consumer_supplies = cm_t35_vsim_supply,
2886d128
MR		 368};
369
b74f149c
IG		 370static struct regulator_init_data cm_t35_vio = {
371 .constraints = {
372 .min_uV = 1800000,
373 .max_uV = 1800000,
374 .apply_uV = true,
375 .valid_modes_mask = REGULATOR_MODE_NORMAL
376 | REGULATOR_MODE_STANDBY,
377 .valid_ops_mask = REGULATOR_CHANGE_MODE,
378 },
379 .num_consumer_supplies = ARRAY_SIZE(cm_t35_vio_supplies),
380 .consumer_supplies = cm_t35_vio_supplies,
381};
382
bead4375 383static uint32_t cm_t35_keymap[] = {
2886d128
MR		 384 KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
385 KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
386 KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
387};
388
389static struct matrix_keymap_data cm_t35_keymap_data = {
390 .keymap = cm_t35_keymap,
391 .keymap_size = ARRAY_SIZE(cm_t35_keymap),
392};
393
394static struct twl4030_keypad_data cm_t35_kp_data = {
395 .keymap_data = &cm_t35_keymap_data,
396 .rows = 3,
397 .cols = 3,
398 .rep = 1,
399};
400
68ff0423 401static struct omap2_hsmmc_info mmc[] = {
2886d128
MR		 402 {
403 .mmc = 1,
3a63833e 404 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 405 .gpio_cd = -EINVAL,
406 .gpio_wp = -EINVAL,
3b972bf0 407 .deferred = true,
2886d128
MR		 408 },
409 {
410 .mmc = 2,
3a63833e 411 .caps = MMC_CAP_4_BIT_DATA,
2886d128
MR		 412 .transceiver = 1,
413 .gpio_cd = -EINVAL,
414 .gpio_wp = -EINVAL,
415 .ocr_mask = 0x00100000, /* 3.3V */
416 },
417 {} /* Terminator */
418};
419
181b250c
KM		 420static struct usbhs_omap_board_data usbhs_bdata __initdata = {
421 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
422 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
423 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
2886d128
MR		 424
425 .phy_reset = true,
1a6b5923
BW		 426 .reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
427 .reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
2886d128
MR		 428 .reset_gpio_port[2] = -EINVAL
429};
430
36863964 431static void __init cm_t35_init_usbh(void)
039401f3
IG		 432{
433 int err;
434
435 err = gpio_request_one(SB_T35_USB_HUB_RESET_GPIO,
436 GPIOF_OUT_INIT_LOW, "usb hub rst");
437 if (err) {
438 pr_err("SB-T35: usb hub rst gpio request failed: %d\n", err);
439 } else {
440 udelay(10);
441 gpio_set_value(SB_T35_USB_HUB_RESET_GPIO, 1);
442 msleep(1);
443 }
444
445 usbhs_init(&usbhs_bdata);
446}
447
2886d128
MR		 448static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
449 unsigned ngpio)
450{
451 int wlan_rst = gpio + 2;
452
bc593f5d 453 if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
2886d128 454 gpio_export(wlan_rst, 0);
2886d128 455 udelay(10);
be741de1 456 gpio_set_value_cansleep(wlan_rst, 0);
2886d128 457 udelay(10);
be741de1 458 gpio_set_value_cansleep(wlan_rst, 1);
2886d128
MR		 459 } else {
460 pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
461 }
462
463 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
464 mmc[0].gpio_cd = gpio + 0;
3b972bf0 465 omap_hsmmc_late_init(mmc);
2886d128 466
2886d128
MR		 467 return 0;
468}
469
470static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
2886d128
MR		 471 .setup = cm_t35_twl_gpio_setup,
472};
473
d61676b8
IG		 474static struct twl4030_power_data cm_t35_power_data = {
475 .use_poweroff = true,
476};
477
2886d128 478static struct twl4030_platform_data cm_t35_twldata = {
2886d128
MR		 479 /* platform_data for children goes here */
480 .keypad = &cm_t35_kp_data,
2886d128
MR		 481 .gpio = &cm_t35_gpio_data,
482 .vmmc1 = &cm_t35_vmmc1,
483 .vsim = &cm_t35_vsim,
b74f149c 484 .vio = &cm_t35_vio,
d61676b8 485 .power = &cm_t35_power_data,
2886d128
MR		 486};
487
d396be47
DL		 488#if defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
489#include <media/omap3isp.h>
490#include "devices.h"
491
492static struct i2c_board_info cm_t35_isp_i2c_boardinfo[] = {
493 {
494 I2C_BOARD_INFO("mt9t001", 0x5d),
495 },
3d6bbca9
DL		 496 {
497 I2C_BOARD_INFO("tvp5150", 0x5c),
498 },
d396be47
DL		 499};
500
501static struct isp_subdev_i2c_board_info cm_t35_isp_primary_subdevs[] = {
502 {
503 .board_info = &cm_t35_isp_i2c_boardinfo[0],
504 .i2c_adapter_id = 3,
505 },
506 { NULL, 0, },
507};
508
3d6bbca9
DL		 509static struct isp_subdev_i2c_board_info cm_t35_isp_secondary_subdevs[] = {
510 {
511 .board_info = &cm_t35_isp_i2c_boardinfo[1],
512 .i2c_adapter_id = 3,
513 },
514 { NULL, 0, },
515};
516
d396be47
DL		 517static struct isp_v4l2_subdevs_group cm_t35_isp_subdevs[] = {
518 {
519 .subdevs = cm_t35_isp_primary_subdevs,
520 .interface = ISP_INTERFACE_PARALLEL,
521 .bus = {
522 .parallel = {
523 .clk_pol = 1,
524 },
525 },
526 },
3d6bbca9
DL		 527 {
528 .subdevs = cm_t35_isp_secondary_subdevs,
529 .interface = ISP_INTERFACE_PARALLEL,
530 .bus = {
531 .parallel = {
532 .clk_pol = 0,
533 },
534 },
535 },
d396be47
DL		 536 { NULL, 0, },
537};
538
539static struct isp_platform_data cm_t35_isp_pdata = {
540 .subdevs = cm_t35_isp_subdevs,
541};
542
543static void __init cm_t35_init_camera(void)
544{
545 if (omap3_init_camera(&cm_t35_isp_pdata) < 0)
546 pr_warn("CM-T3x: Failed registering camera device!\n");
547}
548
549#else
550static inline void cm_t35_init_camera(void) {}
551#endif /* CONFIG_VIDEO_OMAP3 */
552
2886d128
MR		 553static void __init cm_t35_init_i2c(void)
554{
b252b0ef 555 omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
19ce6439
IG		 556 TWL_COMMON_REGULATOR_VDAC |
557 TWL_COMMON_PDATA_AUDIO);
b252b0ef 558
fbd8071c 559 omap3_pmic_init("tps65930", &cm_t35_twldata);
d396be47
DL		 560
561 omap_register_i2c_bus(3, 400, NULL, 0);
2886d128
MR		 562}
563
c7ecea24 564#ifdef CONFIG_OMAP_MUX
ca5742bd 565static struct omap_board_mux board_mux[] __initdata = {
edc961a2
MR		 566 /* nCS and IRQ for CM-T35 ethernet */
567 OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
568 OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
569
570 /* nCS and IRQ for SB-T35 ethernet */
571 OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
572 OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
573
574 /* PENDOWN GPIO */
575 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
576
577 /* mUSB */
578 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
579 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
580 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
581 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
582 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
583 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
584 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
585 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
586 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
587 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
588 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
589 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
590
591 /* MMC 2 */
592 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
593 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
594 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
595 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
596
597 /* McSPI 1 */
598 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
599 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
600 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
601 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
602
603 /* McSPI 4 */
604 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
605 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
606 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
607 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
608
609 /* McBSP 2 */
610 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
611 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
612 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
613 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
614
615 /* serial ports */
616 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
617 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
618 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
619 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
620
c3146974 621 /* common DSS */
edc961a2
MR		 622 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
623 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
624 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
625 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2
MR		 626 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
627 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
628 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
629 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
630 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
631 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
632 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
633 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
634 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
635 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
636 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
637 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
edc961a2 638
d396be47
DL		 639 /* Camera */
640 OMAP3_MUX(CAM_HS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
641 OMAP3_MUX(CAM_VS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
642 OMAP3_MUX(CAM_XCLKA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
643 OMAP3_MUX(CAM_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
644 OMAP3_MUX(CAM_FLD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
645 OMAP3_MUX(CAM_D0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
646 OMAP3_MUX(CAM_D1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
647 OMAP3_MUX(CAM_D2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
648 OMAP3_MUX(CAM_D3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
649 OMAP3_MUX(CAM_D4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
650 OMAP3_MUX(CAM_D5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
651 OMAP3_MUX(CAM_D6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
652 OMAP3_MUX(CAM_D7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
653 OMAP3_MUX(CAM_D8, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
654 OMAP3_MUX(CAM_D9, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
655 OMAP3_MUX(CAM_STROBE, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
656
657 OMAP3_MUX(CAM_D10, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN),
658 OMAP3_MUX(CAM_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLDOWN),
659
7f049ad1
MR		 660 /* display controls */
661 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
662 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
663 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
664
edc961a2
MR		 665 /* TPS IRQ */
666 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
667 OMAP_PIN_INPUT_PULLUP),
668
ca5742bd
TL		 669 { .reg_offset = OMAP_MUX_TERMINATOR },
670};
c3146974
IG		 671
672static void __init cm_t3x_common_dss_mux_init(int mux_mode)
673{
674 omap_mux_init_signal("dss_data18", mux_mode);
675 omap_mux_init_signal("dss_data19", mux_mode);
676 omap_mux_init_signal("dss_data20", mux_mode);
677 omap_mux_init_signal("dss_data21", mux_mode);
678 omap_mux_init_signal("dss_data22", mux_mode);
679 omap_mux_init_signal("dss_data23", mux_mode);
680}
681
682static void __init cm_t35_init_mux(void)
683{
b2404f42
IG		 684 int mux_mode = OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT;
685
686 omap_mux_init_signal("dss_data0.dss_data0", mux_mode);
687 omap_mux_init_signal("dss_data1.dss_data1", mux_mode);
688 omap_mux_init_signal("dss_data2.dss_data2", mux_mode);
689 omap_mux_init_signal("dss_data3.dss_data3", mux_mode);
690 omap_mux_init_signal("dss_data4.dss_data4", mux_mode);
691 omap_mux_init_signal("dss_data5.dss_data5", mux_mode);
692 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 693}
694
695static void __init cm_t3730_init_mux(void)
696{
b2404f42
IG		 697 int mux_mode = OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT;
698
699 omap_mux_init_signal("sys_boot0", mux_mode);
700 omap_mux_init_signal("sys_boot1", mux_mode);
701 omap_mux_init_signal("sys_boot3", mux_mode);
702 omap_mux_init_signal("sys_boot4", mux_mode);
703 omap_mux_init_signal("sys_boot5", mux_mode);
704 omap_mux_init_signal("sys_boot6", mux_mode);
705 cm_t3x_common_dss_mux_init(mux_mode);
c3146974
IG		 706}
707#else
708static inline void cm_t35_init_mux(void) {}
709static inline void cm_t3730_init_mux(void) {}
c7ecea24 710#endif
ca5742bd 711
c3146974 712static void __init cm_t3x_common_init(void)
2886d128 713{
ca5742bd 714 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
2886d128 715 omap_serial_init();
a4ca9dbe
TL		 716 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
717 mt46h32m32lf6_sdrc_params);
3b972bf0 718 omap_hsmmc_init(mmc);
2886d128 719 cm_t35_init_i2c();
96974a24 720 omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
2886d128
MR		 721 cm_t35_init_ethernet();
722 cm_t35_init_led();
7f049ad1 723 cm_t35_init_display();
ac51c90f 724 omap_twl4030_audio_init("cm-t3x");
2886d128 725
9e18630b 726 usb_musb_init(NULL);
039401f3 727 cm_t35_init_usbh();
d396be47 728 cm_t35_init_camera();
2886d128
MR		 729}
730
c3146974
IG		 731static void __init cm_t35_init(void)
732{
733 cm_t3x_common_init();
734 cm_t35_init_mux();
735 cm_t35_init_nand();
736}
737
738static void __init cm_t3730_init(void)
739{
740 cm_t3x_common_init();
741 cm_t3730_init_mux();
742}
743
2886d128 744MACHINE_START(CM_T35, "Compulab CM-T35")
5e52b435 745 .atag_offset = 0x100,
71ee7dad 746 .reserve = omap_reserve,
3dc3bad6 747 .map_io = omap3_map_io,
8f5b5a41 748 .init_early = omap35xx_init_early,
741e3a89 749 .init_irq = omap3_init_irq,
6b2f55d7 750 .handle_irq = omap3_intc_handle_irq,
2886d128 751 .init_machine = cm_t35_init,
bbd707ac 752 .init_late = omap35xx_init_late,
e74984e4 753 .timer = &omap3_timer,
187e3e06 754 .restart = omap3xxx_restart,
2886d128 755MACHINE_END
c3146974
IG		 756
757MACHINE_START(CM_T3730, "Compulab CM-T3730")
187e3e06
PW		 758 .atag_offset = 0x100,
759 .reserve = omap_reserve,
760 .map_io = omap3_map_io,
761 .init_early = omap3630_init_early,
762 .init_irq = omap3_init_irq,
6b2f55d7 763 .handle_irq = omap3_intc_handle_irq,
187e3e06 764 .init_machine = cm_t3730_init,
bbd707ac 765 .init_late = omap3630_init_late,
187e3e06
PW		 766 .timer = &omap3_timer,
767 .restart = omap3xxx_restart,
c3146974 768MACHINE_END
kernel source for telekom puls (alcatel/mediatek)