projects / GitHub / mt8127 / android_kernel_alcatel_ttab.git / blame
| Commit | Line | Data |
|---|---|---|
| 6fa3eb70 S |
1 | #ifndef __WDT_HW_H__ |
| 2 | #define __WDT_HW_H__ | |
| 3 | ||
| 4 | #include <mach/mt_reg_base.h> | |
| 5 | #define MTK_WDT_BASE AP_RGU_BASE | |
| 6 | ||
| 7 | #define MTK_WDT_MODE (MTK_WDT_BASE+0x0000) | |
| 8 | #define MTK_WDT_LENGTH (MTK_WDT_BASE+0x0004) | |
| 9 | #define MTK_WDT_RESTART (MTK_WDT_BASE+0x0008) | |
| 10 | #define MTK_WDT_STATUS (MTK_WDT_BASE+0x000C) | |
| 11 | #define MTK_WDT_INTERVAL (MTK_WDT_BASE+0x0010) | |
| 12 | #define MTK_WDT_SWRST (MTK_WDT_BASE+0x0014) | |
| 13 | #define MTK_WDT_SWSYSRST (MTK_WDT_BASE+0x0018) | |
| 14 | #define MTK_WDT_NONRST_REG (MTK_WDT_BASE+0x0020) | |
| 15 | #define MTK_WDT_NONRST_REG2 (MTK_WDT_BASE+0x0024) | |
| 16 | #define MTK_WDT_REQ_MODE (MTK_WDT_BASE+0x0030) | |
| 17 | #define MTK_WDT_REQ_IRQ_EN (MTK_WDT_BASE+0x0034) | |
| 18 | #define MTK_WDT_DRAMC_CTL (MTK_WDT_BASE+0x0040) | |
| 19 | #define MTK_WDT_DEGLITCH_EN (0xF0000000+0x0310) | |
| 20 | ||
| 21 | ||
| 22 | #define MTK_WDT_DEGLITCH_KEY 0x67D2A357 | |
| 23 | /*WDT_MODE*/ | |
| 24 | #define MTK_WDT_MODE_KEYMASK (0xff00) | |
| 25 | #define MTK_WDT_MODE_KEY (0x22000000) | |
| 26 | ||
| 27 | #define MTK_WDT_MODE_DUAL_MODE (0x0040) | |
| 28 | #define MTK_WDT_MODE_IN_DIS (0x0020) /* Reserved */ | |
| 29 | #define MTK_WDT_MODE_AUTO_RESTART (0x0010) /* Reserved */ | |
| 30 | #define MTK_WDT_MODE_IRQ (0x0008) | |
| 31 | #define MTK_WDT_MODE_EXTEN (0x0004) | |
| 32 | #define MTK_WDT_MODE_EXT_POL (0x0002) | |
| 33 | #define MTK_WDT_MODE_ENABLE (0x0001) | |
| 34 | ||
| 35 | ||
| 36 | /*WDT_LENGTH*/ | |
| 37 | #define MTK_WDT_LENGTH_TIME_OUT (0xffe0) | |
| 38 | #define MTK_WDT_LENGTH_KEYMASK (0x001f) | |
| 39 | #define MTK_WDT_LENGTH_KEY (0x0008) | |
| 40 | ||
| 41 | /*WDT_RESTART*/ | |
| 42 | #define MTK_WDT_RESTART_KEY (0x1971) | |
| 43 | ||
| 44 | /*WDT_STATUS*/ | |
| 45 | #define MTK_WDT_STATUS_HWWDT_RST (0x80000000) | |
| 46 | #define MTK_WDT_STATUS_SWWDT_RST (0x40000000) | |
| 47 | #define MTK_WDT_STATUS_IRQWDT_RST (0x20000000) | |
| 48 | #define MTK_WDT_STATUS_DEBUGWDT_RST (0x00080000) | |
| 49 | #define MTK_WDT_STATUS_SPMWDT_RST (0x0001) | |
| 50 | ||
| 51 | ||
| 52 | /*WDT_INTERVAL*/ | |
| 53 | #define MTK_WDT_INTERVAL_MASK (0x0fff) | |
| 54 | ||
| 55 | /*WDT_SWRST*/ | |
| 56 | #define MTK_WDT_SWRST_KEY (0x1209) | |
| 57 | ||
| 58 | /*WDT_SWSYSRST*/ | |
| 59 | #define MTK_WDT_SWSYS_RST_PWRAP_SPI_CTL_RST (0x0800) | |
| 60 | #define MTK_WDT_SWSYS_RST_APMIXED_RST (0x0400) | |
| 61 | #define MTK_WDT_SWSYS_RST_MD_LITE_RST (0x0200) | |
| 62 | #define MTK_WDT_SWSYS_RST_INFRA_AO_RST (0x0100) | |
| 63 | #define MTK_WDT_SWSYS_RST_MD_RST (0x0080) | |
| 64 | #define MTK_WDT_SWSYS_RST_DDRPHY_RST (0x0040) | |
| 65 | #define MTK_WDT_SWSYS_RST_IMG_RST (0x0020) | |
| 66 | #define MTK_WDT_SWSYS_RST_VDEC_RST (0x0010) | |
| 67 | #define MTK_WDT_SWSYS_RST_VENC_RST (0x0008) | |
| 68 | #define MTK_WDT_SWSYS_RST_MFG_RST (0x0004) | |
| 69 | #define MTK_WDT_SWSYS_RST_DISP_RST (0x0002) | |
| 70 | #define MTK_WDT_SWSYS_RST_INFRA_RST (0x0001) | |
| 71 | ||
| 72 | ||
| 73 | //#define MTK_WDT_SWSYS_RST_KEY (0x1500) | |
| 74 | #define MTK_WDT_SWSYS_RST_KEY (0x88000000) | |
| 75 | ||
| 76 | /*MTK_WDT_REQ_IRQ*/ | |
| 77 | #define MTK_WDT_REQ_IRQ_KEY (0x44000000) | |
| 78 | #define MTK_WDT_REQ_IRQ_DEBUG_EN (0x80000) | |
| 79 | #define MTK_WDT_REQ_IRQ_SPM_THERMAL_EN (0x0001) | |
| 80 | #define MTK_WDT_REQ_IRQ_SPM_SCPSYS_EN (0x0002) | |
| 81 | ||
| 82 | ||
| 83 | /*MTK_WDT_REQ_MODE*/ | |
| 84 | #define MTK_WDT_REQ_MODE_KEY (0x33000000) | |
| 85 | #define MTK_WDT_REQ_MODE_DEBUG_EN (0x80000) | |
| 86 | #define MTK_WDT_REQ_MODE_SPM_THERMAL (0x0001) | |
| 87 | #define MTK_WDT_REQ_MODE_SPM_SCPSYS (0x0002) | |
| 88 | ||
| 89 | ||
| 90 | ||
| 91 | ||
| 92 | #endif /*__WDT_HW_H__*/ |