[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-mt8127 / include / mach / mt_reg_dump.h

#ifndef __MT_REG_DUMP_H
#define __MT_REG_DUMP_H

#define CORE0_PC (MCUSYS_CFGREG_BASE + 0x300)
#define CORE0_FP (MCUSYS_CFGREG_BASE + 0x304)
#define CORE0_SP (MCUSYS_CFGREG_BASE + 0x308)
#define CORE1_PC (MCUSYS_CFGREG_BASE + 0x310)
#define CORE1_FP (MCUSYS_CFGREG_BASE + 0x314)
#define CORE1_SP (MCUSYS_CFGREG_BASE + 0x318)
#define CORE2_PC (MCUSYS_CFGREG_BASE + 0x320)
#define CORE2_FP (MCUSYS_CFGREG_BASE + 0x324)
#define CORE2_SP (MCUSYS_CFGREG_BASE + 0x328)
#define CORE3_PC (MCUSYS_CFGREG_BASE + 0x330)
#define CORE3_FP (MCUSYS_CFGREG_BASE + 0x334)
#define CORE3_SP (MCUSYS_CFGREG_BASE + 0x338)

struct mt_reg_dump {
	unsigned int pc;
	unsigned int fp;
	unsigned int sp;
	unsigned int core_id;
};

extern int mt_reg_dump(char *buf);

#endif
Commit	Line	Data
6fa3eb70 S	1	#ifndef __MT_REG_DUMP_H
	2	#define __MT_REG_DUMP_H
	3
	4	#define CORE0_PC (MCUSYS_CFGREG_BASE + 0x300)
	5	#define CORE0_FP (MCUSYS_CFGREG_BASE + 0x304)
	6	#define CORE0_SP (MCUSYS_CFGREG_BASE + 0x308)
	7	#define CORE1_PC (MCUSYS_CFGREG_BASE + 0x310)
	8	#define CORE1_FP (MCUSYS_CFGREG_BASE + 0x314)
	9	#define CORE1_SP (MCUSYS_CFGREG_BASE + 0x318)
	10	#define CORE2_PC (MCUSYS_CFGREG_BASE + 0x320)
	11	#define CORE2_FP (MCUSYS_CFGREG_BASE + 0x324)
	12	#define CORE2_SP (MCUSYS_CFGREG_BASE + 0x328)
	13	#define CORE3_PC (MCUSYS_CFGREG_BASE + 0x330)
	14	#define CORE3_FP (MCUSYS_CFGREG_BASE + 0x334)
	15	#define CORE3_SP (MCUSYS_CFGREG_BASE + 0x338)
	16
	17	struct mt_reg_dump {
	18	unsigned int pc;
	19	unsigned int fp;
	20	unsigned int sp;
	21	unsigned int core_id;
	22	};
	23
	24	extern int mt_reg_dump(char *buf);
	25
	26	#endif
	27