import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-mt8127 / include / mach / mt_ptp.h
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6fa3eb70
S
1#ifndef _MT_PTP_
2#define _MT_PTP_
3
4#include <linux/kernel.h>
5#include <mach/sync_write.h>
6
7/* PTP Register Definition */
8#define PTP_BASEADDR (0xF100B000)
9#define PTP_DESCHAR (PTP_BASEADDR + 0x200)
10#define PTP_TEMPCHAR (PTP_BASEADDR + 0x204)
11#define PTP_DETCHAR (PTP_BASEADDR + 0x208)
12#define PTP_AGECHAR (PTP_BASEADDR + 0x20C)
13#define PTP_DCCONFIG (PTP_BASEADDR + 0x210)
14#define PTP_AGECONFIG (PTP_BASEADDR + 0x214)
15#define PTP_FREQPCT30 (PTP_BASEADDR + 0x218)
16#define PTP_FREQPCT74 (PTP_BASEADDR + 0x21C)
17#define PTP_LIMITVALS (PTP_BASEADDR + 0x220)
18#define PTP_VBOOT (PTP_BASEADDR + 0x224)
19#define PTP_DETWINDOW (PTP_BASEADDR + 0x228)
20#define PTP_PTPCONFIG (PTP_BASEADDR + 0x22C)
21#define PTP_TSCALCS (PTP_BASEADDR + 0x230)
22#define PTP_RUNCONFIG (PTP_BASEADDR + 0x234)
23#define PTP_PTPEN (PTP_BASEADDR + 0x238)
24#define PTP_INIT2VALS (PTP_BASEADDR + 0x23C)
25#define PTP_DCVALUES (PTP_BASEADDR + 0x240)
26#define PTP_AGEVALUES (PTP_BASEADDR + 0x244)
27#define PTP_VOP30 (PTP_BASEADDR + 0x248)
28#define PTP_VOP74 (PTP_BASEADDR + 0x24C)
29#define PTP_TEMP (PTP_BASEADDR + 0x250)
30#define PTP_PTPINTSTS (PTP_BASEADDR + 0x254)
31#define PTP_PTPINTSTSRAW (PTP_BASEADDR + 0x258)
32#define PTP_PTPINTEN (PTP_BASEADDR + 0x25C)
33#define PTP_PTPCHKSHIFT (PTP_BASEADDR + 0x264)
34#define PTP_SMSTATE0 (PTP_BASEADDR + 0x280)
35#define PTP_SMSTATE1 (PTP_BASEADDR + 0x284)
36
37/* Thermal Register Definition */
38#define PTP_TEMPMONCTL0 (THERMAL_BASE + 0x000)
39#define PTP_TEMPMONCTL1 (THERMAL_BASE + 0x004)
40#define PTP_TEMPMONCTL2 (THERMAL_BASE + 0x008)
41#define PTP_TEMPMONINT (THERMAL_BASE + 0x00C)
42#define PTP_TEMPMONINTSTS (THERMAL_BASE + 0x010)
43#define PTP_TEMPMONIDET0 (THERMAL_BASE + 0x014)
44#define PTP_TEMPMONIDET1 (THERMAL_BASE + 0x018)
45#define PTP_TEMPMONIDET2 (THERMAL_BASE + 0x01C)
46#define PTP_TEMPH2NTHRE (THERMAL_BASE + 0x024)
47#define PTP_TEMPHTHRE (THERMAL_BASE + 0x028)
48#define PTP_TEMPCTHRE (THERMAL_BASE + 0x02C)
49#define PTP_TEMPOFFSETH (THERMAL_BASE + 0x030)
50#define PTP_TEMPOFFSETL (THERMAL_BASE + 0x034)
51#define PTP_TEMPMSRCTL0 (THERMAL_BASE + 0x038)
52#define PTP_TEMPMSRCTL1 (THERMAL_BASE + 0x03C)
53#define PTP_TEMPAHBPOLL (THERMAL_BASE + 0x040)
54#define PTP_TEMPAHBTO (THERMAL_BASE + 0x044)
55#define PTP_TEMPADCPNP0 (THERMAL_BASE + 0x048)
56#define PTP_TEMPADCPNP1 (THERMAL_BASE + 0x04C)
57#define PTP_TEMPADCPNP2 (THERMAL_BASE + 0x050)
58#define PTP_TEMPADCMUX (THERMAL_BASE + 0x054)
59#define PTP_TEMPADCEXT (THERMAL_BASE + 0x058)
60#define PTP_TEMPADCEXT1 (THERMAL_BASE + 0x05C)
61#define PTP_TEMPADCEN (THERMAL_BASE + 0x060)
62#define PTP_TEMPPNPMUXADDR (THERMAL_BASE + 0x064)
63#define PTP_TEMPADCMUXADDR (THERMAL_BASE + 0x068)
64#define PTP_TEMPADCEXTADDR (THERMAL_BASE + 0x06C)
65#define PTP_TEMPADCEXT1ADDR (THERMAL_BASE + 0x070)
66#define PTP_TEMPADCENADDR (THERMAL_BASE + 0x074)
67#define PTP_TEMPADCVALIDADDR (THERMAL_BASE + 0x078)
68#define PTP_TEMPADCVOLTADDR (THERMAL_BASE + 0x07C)
69#define PTP_TEMPRDCTRL (THERMAL_BASE + 0x080)
70#define PTP_TEMPADCVALIDMASK (THERMAL_BASE + 0x084)
71#define PTP_TEMPADCVOLTAGESHIFT (THERMAL_BASE + 0x088)
72#define PTP_TEMPADCWRITECTRL (THERMAL_BASE + 0x08C)
73#define PTP_TEMPMSR0 (THERMAL_BASE + 0x090)
74#define PTP_TEMPMSR1 (THERMAL_BASE + 0x094)
75#define PTP_TEMPMSR2 (THERMAL_BASE + 0x098)
76#define PTP_TEMPIMMD0 (THERMAL_BASE + 0x0A0)
77#define PTP_TEMPIMMD1 (THERMAL_BASE + 0x0A4)
78#define PTP_TEMPIMMD2 (THERMAL_BASE + 0x0A8)
79#define PTP_TEMPPROTCTL (THERMAL_BASE + 0x0C0)
80#define PTP_TEMPPROTTA (THERMAL_BASE + 0x0C4)
81#define PTP_TEMPPROTTB (THERMAL_BASE + 0x0C8)
82#define PTP_TEMPPROTTC (THERMAL_BASE + 0x0CC)
83#define PTP_TEMPSPARE0 (THERMAL_BASE + 0x0F0)
84#define PTP_TEMPSPARE1 (THERMAL_BASE + 0x0F4)
85#define PTP_TEMPSPARE2 (THERMAL_BASE + 0x0F8)
86#define PTP_TEMPSPARE3 (THERMAL_BASE + 0x0FC)
87
88/* PTP Macro Definition */
89#define EN_PTP_OD (1)
90#define EN_ISR_LOG (0)
91
92#define PTP_GET_REAL_VAL (1)
93#define SET_PMIC_VOLT (1)
94
95#define ptp_read(addr) (*(volatile u32 *)(addr))
96#define ptp_write(addr, val) mt65xx_reg_sync_writel(val, addr)
97
98#define ptp_emerg(fmt, args...) printk(KERN_EMERG "[PTP] " fmt, ##args)
99#define ptp_alert(fmt, args...) printk(KERN_ALERT "[PTP] " fmt, ##args)
100#define ptp_crit(fmt, args...) printk(KERN_CRIT "[PTP] " fmt, ##args)
101#define ptp_error(fmt, args...) printk(KERN_ERR "[PTP] " fmt, ##args)
102#define ptp_warning(fmt, args...) printk(KERN_WARNING "[PTP] " fmt, ##args)
103#define ptp_notice(fmt, args...) printk(KERN_NOTICE "[PTP] " fmt, ##args)
104#define ptp_info(fmt, args...) printk(KERN_INFO "[PTP] " fmt, ##args)
105#define ptp_debug(fmt, args...) printk(KERN_DEBUG "[PTP] " fmt, ##args)
106
107#if EN_ISR_LOG
108#define ptp_isr_info(fmt, args...) ptp_notice( fmt, ##args)
109#else
110#define ptp_isr_info(fmt, args...) ptp_debug( fmt, ##args)
111#endif
112
113/* PTP Structure */
114typedef struct {
115 unsigned int ADC_CALI_EN;
116 unsigned int PTPINITEN;
117 unsigned int PTPMONEN;
118
119 unsigned int MDES;
120 unsigned int BDES;
121 unsigned int DCCONFIG;
122 unsigned int DCMDET;
123 unsigned int DCBDET;
124 unsigned int AGECONFIG;
125 unsigned int AGEM;
126 unsigned int AGEDELTA;
127 unsigned int DVTFIXED;
128 unsigned int VCO;
129 unsigned int MTDES;
130 unsigned int MTS;
131 unsigned int BTS;
132
133 unsigned char FREQPCT0;
134 unsigned char FREQPCT1;
135 unsigned char FREQPCT2;
136 unsigned char FREQPCT3;
137 unsigned char FREQPCT4;
138 unsigned char FREQPCT5;
139 unsigned char FREQPCT6;
140 unsigned char FREQPCT7;
141
142 unsigned int DETWINDOW;
143 unsigned int VMAX;
144 unsigned int VMIN;
145 unsigned int DTHI;
146 unsigned int DTLO;
147 unsigned int VBOOT;
148 unsigned int DETMAX;
149
150 unsigned int PTPCHKSHIFT;
151
152 unsigned int DCVOFFSETIN;
153 unsigned int AGEVOFFSETIN;
154} PTP_INIT_T;
155
156/* PTP Extern Function */
157extern unsigned int PTP_get_ptp_level(void);
158
159#endif