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import PULS_20160108
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-mt8127 / core.c
CommitLineData
6fa3eb70
S		 1#include <linux/pm.h>
2#include <linux/bug.h>
3#if defined(CONFIG_TRUSTONIC_TEE_SUPPORT) || defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
4#include <linux/memblock.h>
5#include <linux/bootmem.h>
6#include <mach/mtk_boot_share_page.h>
7#endif
8#include <asm/mach/arch.h>
9#include <asm/mach/time.h>
10#include <asm/mach/map.h>
11#include <asm/mach-types.h>
12#include <asm/hardware/cache-l2x0.h>
13#include <asm/smp_scu.h>
14#include <asm/page.h>
15#include <mach/mt_reg_base.h>
16#include <mach/irqs.h>
17#include <linux/version.h>
18
19extern void arm_machine_restart(char mode, const char *cmd);
20extern struct sys_timer mt6582_timer;
21extern void mt6582_timer_init(void);
22#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0)
23extern struct smp_operations mt65xx_smp_ops;
24#endif
25extern void mt_fixup(struct tag *tags, char **cmdline, struct meminfo *mi);
26extern void mt_reserve(void);
27
28void __init mt_init(void)
29{
30 /* enable bus out of order command queue to enhance boot time */
31#if 1
32 volatile unsigned int opt;
33 opt = readl(IOMEM(MCU_BIU_BASE));
34 opt |= 0x1;
35 writel(opt, IOMEM(MCU_BIU_BASE));
36 dsb();
37#endif
38}
39
40#if defined(CONFIG_TRUSTONIC_TEE_SUPPORT) || defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
41void __init mt_init_early(void)
42{
43 int ret;
44
45 ret = reserve_bootmem(__pa(BOOT_SHARE_BASE), 0x1000, BOOTMEM_EXCLUSIVE);
46 if (ret < 0)
47 {
48 printk(KERN_WARNING "reserve_bootmem BOOT_SHARE_BASE failed %d\n", ret);
49 }
50}
51#endif
52
53static struct map_desc mt_io_desc[] __initdata =
54{
55#if !defined(CONFIG_MT8127_FPGA)
56 {
57 .virtual = INFRA_BASE,
58 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(INFRA_BASE)),
59 .length = (SZ_1M - SZ_4K),
60 .type = MT_DEVICE
61 },
62 /* Skip the mapping of 0xF0130000~0xF013FFFF to protect access from APMCU */
63 {
64 .virtual = (DEBUGTOP_BASE - SZ_4K),
65 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS((DEBUGTOP_BASE - SZ_4K))),
66 .length = (0x30000 + SZ_4K),
67 .type = MT_DEVICE
68 },
69 {
70 .virtual = (DEBUGTOP_BASE + 0x40000),
71 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(DEBUGTOP_BASE + 0x40000)),
72 .length = 0xC0000,
73 .type = MT_DEVICE
74 },
75 {
76 .virtual = MCUSYS_CFGREG_BASE,
77 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(MCUSYS_CFGREG_BASE)),
78 .length = SZ_2M,
79 .type = MT_DEVICE
80 },
81 /* //// */
82 {
83 .virtual = AP_DMA_BASE,
84 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(AP_DMA_BASE)),
85 .length = SZ_2M + SZ_1M,
86 .type = MT_DEVICE
87 },
88 {
89 /* virtual 0xF2000000, physical 0x00200000 */
90 .virtual = SYSRAM_BASE,
91 .pfn = __phys_to_pfn(0x00200000),
92 .length = SZ_128K,
93 .type = MT_MEMORY_NONCACHED
94 },
95 {
96 .virtual = G3D_CONFIG_BASE,
97 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(G3D_CONFIG_BASE)),
98 .length = SZ_128K,
99 .type = MT_DEVICE
100 },
101 {
102 .virtual = DISPSYS_BASE,
103 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(DISPSYS_BASE)),
104 .length = SZ_16M,
105 .type = MT_DEVICE
106 },
107 {
108 .virtual = IMGSYS_CONFG_BASE,
109 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(IMGSYS_CONFG_BASE)),
110 .length = SZ_16M,
111 .type = MT_DEVICE
112 },
113 {
114 .virtual = VDEC_GCON_BASE,
115 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(VDEC_GCON_BASE)),
116 .length = SZ_16M,
117 .type = MT_DEVICE
118 },
119 {
120 /* virtual 0xF7000000, physical 0x08000000 */
121 .virtual = DEVINFO_BASE,
122 .pfn = __phys_to_pfn(0x08000000),
123 .length = SZ_64K,
124 .type = MT_DEVICE
125 },
126 {
127 .virtual = CONN_BTSYS_PKV_BASE,
128 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(CONN_BTSYS_PKV_BASE)),
129 .length = SZ_1M,
130 .type = MT_DEVICE
131 },
132 {
133 /* virtual 0xF9000000, physical 0x00100000 */
134 .virtual = INTER_SRAM,
135 .pfn = __phys_to_pfn(0x00100000),
136 .length = SZ_64K,
137 .type = MT_MEMORY_NONCACHED
138 },
139#else
140 {
141 .virtual = INFRA_BASE,
142 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(INFRA_BASE)),
143 .length = SZ_4M,
144 .type = MT_DEVICE
145 },
146 {
147 .virtual = AP_DMA_BASE,
148 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(AP_DMA_BASE)),
149 .length = SZ_2M + SZ_1M,
150 .type = MT_DEVICE
151 },
152 #if 0
153 {
154 .virtual = MMSYS1_CONFIG_BASE,
155 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(MMSYS1_CONFIG_BASE)),
156 .length = SZ_16M,
157 .type = MT_DEVICE
158 },
159 #endif
160 {
161 /* From: 0xF2000000 to 0xF2020000*/
162 .virtual = SYSRAM_BASE,
163 .pfn = __phys_to_pfn(0x00200000),
164 .length = SZ_128K,
165 .type = MT_MEMORY_NONCACHED
166 },
167 {
168 .virtual = DISPSYS_BASE,
169 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(DISPSYS_BASE)),
170 .length = SZ_16M,
171 .type = MT_DEVICE
172 },
173 {
174 .virtual = IMGSYS_CONFG_BASE,
175 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(IMGSYS_CONFG_BASE)),
176 .length = SZ_16M,
177 .type = MT_DEVICE
178 },
179 /* G3DSYS */
180 {
181 .virtual = G3D_CONFIG_BASE,
182 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(G3D_CONFIG_BASE)),
183 .length = SZ_4K,
184 .type = MT_DEVICE
185 },
186 {
187 .virtual = DEVINFO_BASE,
188 .pfn = __phys_to_pfn(0x08000000),
189 .length = SZ_64K,
190 .type = MT_DEVICE
191 },
192 {
193 .virtual = MALI_BASE,
194 .pfn = __phys_to_pfn(IO_VIRT_TO_PHYS(MALI_BASE)),
195 .length = SZ_64K,
196 .type = MT_DEVICE
197 },
198 {
199 .virtual = INTER_SRAM,
200 .pfn = __phys_to_pfn(0x00100000),
201 .length = SZ_64K,
202 .type = MT_MEMORY_NONCACHED
203 },
204#endif
205};
206
207void __init mt_map_io(void)
208{
209 iotable_init(mt_io_desc, ARRAY_SIZE(mt_io_desc));
210}
211
212#ifdef CONFIG_MTK_TABLET_HARDWARE
213MACHINE_START(MT8127, "MT8117")
214#else
215MACHINE_START(MT8127, "MT8127")
216#endif
217 .atag_offset = 0x00000100,
218 .map_io = mt_map_io,
219 .init_irq = mt_init_irq,
220#if LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0)
221 .timer = &mt6582_timer,
222#else
223 .smp = smp_ops(mt65xx_smp_ops),
224 .init_time = mt6582_timer_init,
225#endif
226#if defined(CONFIG_TRUSTONIC_TEE_SUPPORT) || defined(CONFIG_MTK_IN_HOUSE_TEE_SUPPORT)
227 .init_early = mt_init_early,
228#endif
229 .init_machine = mt_init,
230 .fixup = mt_fixup,
231 .restart = arm_machine_restart,
232 .reserve = mt_reserve,
233MACHINE_END
kernel source for telekom puls (alcatel/mediatek)