[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / mach-clps711x / Kconfig

if ARCH_CLPS711X

menu "CLPS711X/EP721X Implementations"

config ARCH_AUTCPU12
	bool "AUTCPU12"
	help
	  Say Y if you intend to run the kernel on the autronix autcpu12
	  board. This board is based on a Cirrus Logic CS89712.

config ARCH_CDB89712
	bool "CDB89712"
	select ISA
	help
	  This is an evaluation board from Cirrus for the CS89712 processor.
	  The board includes 2 serial ports, Ethernet, IRDA, and expansion
	  headers.  It comes with 16 MB SDRAM and 8 MB flash ROM.

config ARCH_CEIVA
	bool "CEIVA"
	help
	  Say Y here if you intend to run this kernel on the Ceiva/Polaroid
	  PhotoMax Digital Picture Frame.

config ARCH_CLEP7312
	bool "CLEP7312"

config ARCH_EDB7211
	bool "EDB7211"
	select ISA
	select DISCONTIGMEM
	help
	  Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
	  evaluation board.

config ARCH_P720T
	bool "P720T"
	help
	  Say Y here if you intend to run this kernel on the ARM Prospector
	  720T.

config ARCH_FORTUNET
	bool "FORTUNET"

# XXX Maybe these should indicate register compatibility
# instead of being mutually exclusive.
config ARCH_EP7211
	bool
	depends on ARCH_EDB7211
	default y

config ARCH_EP7212
	bool
	depends on ARCH_P720T || ARCH_CEIVA
	default y

config EP72XX_ROM_BOOT
	bool "EP72xx ROM boot"
	depends on ARCH_EP7211 || ARCH_EP7212
	---help---
	  If you say Y here, your CLPS711x-based kernel will use the bootstrap
	  mode memory map instead of the normal memory map.

	  Processors derived from the Cirrus CLPS-711X core support two boot
	  modes.  Normal mode boots from the external memory device at CS0.
	  Bootstrap mode rearranges parts of the memory map, placing an
	  internal 128 byte bootstrap ROM at CS0.  This option performs the
	  address map changes required to support booting in this mode.

	  You almost surely want to say N here.

endmenu

endif
Commit	Line	Data
1da177e4 LT	1	if ARCH_CLPS711X
	2
	3	menu "CLPS711X/EP721X Implementations"
	4
	5	config ARCH_AUTCPU12
	6	bool "AUTCPU12"
	7	help
	8	Say Y if you intend to run the kernel on the autronix autcpu12
	9	board. This board is based on a Cirrus Logic CS89712.
	10
	11	config ARCH_CDB89712
	12	bool "CDB89712"
f7e68bbf	13	select ISA
1da177e4 LT	14	help
	15	This is an evaluation board from Cirrus for the CS89712 processor.
	16	The board includes 2 serial ports, Ethernet, IRDA, and expansion
	17	headers. It comes with 16 MB SDRAM and 8 MB flash ROM.
	18
	19	config ARCH_CEIVA
	20	bool "CEIVA"
	21	help
	22	Say Y here if you intend to run this kernel on the Ceiva/Polaroid
	23	PhotoMax Digital Picture Frame.
	24
	25	config ARCH_CLEP7312
	26	bool "CLEP7312"
	27
	28	config ARCH_EDB7211
	29	bool "EDB7211"
f7e68bbf RK	30	select ISA
f7e68bbf RK	31	select DISCONTIGMEM
1da177e4 LT	32	help
	33	Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
	34	evaluation board.
	35
	36	config ARCH_P720T
	37	bool "P720T"
	38	help
	39	Say Y here if you intend to run this kernel on the ARM Prospector
	40	720T.
	41
	42	config ARCH_FORTUNET
	43	bool "FORTUNET"
	44
	45	# XXX Maybe these should indicate register compatibility
	46	# instead of being mutually exclusive.
	47	config ARCH_EP7211
	48	bool
	49	depends on ARCH_EDB7211
	50	default y
	51
	52	config ARCH_EP7212
	53	bool
	54	depends on ARCH_P720T \|\| ARCH_CEIVA
	55	default y
	56
	57	config EP72XX_ROM_BOOT
	58	bool "EP72xx ROM boot"
	59	depends on ARCH_EP7211 \|\| ARCH_EP7212
	60	---help---
	61	If you say Y here, your CLPS711x-based kernel will use the bootstrap
	62	mode memory map instead of the normal memory map.
	63
	64	Processors derived from the Cirrus CLPS-711X core support two boot
	65	modes. Normal mode boots from the external memory device at CS0.
	66	Bootstrap mode rearranges parts of the memory map, placing an
	67	internal 128 byte bootstrap ROM at CS0. This option performs the
	68	address map changes required to support booting in this mode.
	69
	70	You almost surely want to say N here.
	71
	72	endmenu
	73
	74	endif