ARM: 6866/1: Do not restrict HIGHPTE to !OUTER_CACHE
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / kernel / process.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/kernel/process.c
3 *
4 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
5 * Original Copyright (C) 1995 Linus Torvalds
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#include <stdarg.h>
12
1da177e4
LT
13#include <linux/module.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
1da177e4 19#include <linux/user.h>
1da177e4
LT
20#include <linux/delay.h>
21#include <linux/reboot.h>
22#include <linux/interrupt.h>
23#include <linux/kallsyms.h>
24#include <linux/init.h>
a054a811 25#include <linux/cpu.h>
84dff1a7 26#include <linux/elfcore.h>
74617fb6 27#include <linux/pm.h>
9e4559dd 28#include <linux/tick.h>
154c772e 29#include <linux/utsname.h>
33fa9b13 30#include <linux/uaccess.h>
990cb8ac 31#include <linux/random.h>
864232fa 32#include <linux/hw_breakpoint.h>
1da177e4 33
9ca03a21 34#include <asm/cacheflush.h>
1da177e4
LT
35#include <asm/leds.h>
36#include <asm/processor.h>
78ff18a4 37#include <asm/system.h>
d6551e88 38#include <asm/thread_notify.h>
2d7c11bf 39#include <asm/stacktrace.h>
2ea83398 40#include <asm/mach/time.h>
1da177e4 41
c743f380
NP
42#ifdef CONFIG_CC_STACKPROTECTOR
43#include <linux/stackprotector.h>
44unsigned long __stack_chk_guard __read_mostly;
45EXPORT_SYMBOL(__stack_chk_guard);
46#endif
47
ae0a846e
RK
48static const char *processor_modes[] = {
49 "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
50 "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
51 "USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" ,
52 "UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
53};
54
909d6c6c
GD
55static const char *isa_modes[] = {
56 "ARM" , "Thumb" , "Jazelle", "ThumbEE"
57};
58
1da177e4
LT
59extern void setup_mm_for_reboot(char mode);
60
61static volatile int hlt_counter;
62
a09e64fb 63#include <mach/system.h>
1da177e4
LT
64
65void disable_hlt(void)
66{
67 hlt_counter++;
68}
69
70EXPORT_SYMBOL(disable_hlt);
71
72void enable_hlt(void)
73{
74 hlt_counter--;
75}
76
77EXPORT_SYMBOL(enable_hlt);
78
79static int __init nohlt_setup(char *__unused)
80{
81 hlt_counter = 1;
82 return 1;
83}
84
85static int __init hlt_setup(char *__unused)
86{
87 hlt_counter = 0;
88 return 1;
89}
90
91__setup("nohlt", nohlt_setup);
92__setup("hlt", hlt_setup);
93
be093beb 94void arm_machine_restart(char mode, const char *cmd)
74617fb6 95{
9ca03a21
RK
96 /* Disable interrupts first */
97 local_irq_disable();
98 local_fiq_disable();
74617fb6
RP
99
100 /*
101 * Tell the mm system that we are going to reboot -
102 * we may need it to insert some 1:1 mappings so that
103 * soft boot works.
104 */
105 setup_mm_for_reboot(mode);
106
9ca03a21
RK
107 /* Clean and invalidate caches */
108 flush_cache_all();
109
110 /* Turn off caching */
111 cpu_proc_fin();
112
113 /* Push out any further dirty data, and ensure cache is empty */
114 flush_cache_all();
115
74617fb6
RP
116 /*
117 * Now call the architecture specific reboot code.
118 */
be093beb 119 arch_reset(mode, cmd);
74617fb6
RP
120
121 /*
122 * Whoops - the architecture was unable to reboot.
123 * Tell the user!
124 */
125 mdelay(1000);
126 printk("Reboot failed -- System halted\n");
127 while (1);
128}
129
1da177e4 130/*
74617fb6 131 * Function pointers to optional machine specific functions
1da177e4 132 */
1da177e4
LT
133void (*pm_power_off)(void);
134EXPORT_SYMBOL(pm_power_off);
135
be093beb 136void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart;
74617fb6
RP
137EXPORT_SYMBOL_GPL(arm_pm_restart);
138
c7b0aff4
KH
139static void do_nothing(void *unused)
140{
141}
142
143/*
144 * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
145 * pm_idle and update to new pm_idle value. Required while changing pm_idle
146 * handler on SMP systems.
147 *
148 * Caller must have changed pm_idle to the new value before the call. Old
149 * pm_idle value will not be used by any CPU after the return of this function.
150 */
151void cpu_idle_wait(void)
152{
153 smp_mb();
154 /* kick all the CPUs so that they exit out of pm_idle */
155 smp_call_function(do_nothing, NULL, 1);
156}
157EXPORT_SYMBOL_GPL(cpu_idle_wait);
74617fb6 158
1da177e4
LT
159/*
160 * This is our default idle handler. We need to disable
161 * interrupts here to ensure we don't miss a wakeup call.
162 */
84dff1a7 163static void default_idle(void)
1da177e4 164{
9ccdac36
RK
165 if (!need_resched())
166 arch_idle();
167 local_irq_enable();
1da177e4
LT
168}
169
9ccdac36
RK
170void (*pm_idle)(void) = default_idle;
171EXPORT_SYMBOL(pm_idle);
172
1da177e4 173/*
9ccdac36
RK
174 * The idle thread, has rather strange semantics for calling pm_idle,
175 * but this is what x86 does and we need to do the same, so that
176 * things like cpuidle get called in the same way. The only difference
177 * is that we always respect 'hlt_counter' to prevent low power idle.
1da177e4
LT
178 */
179void cpu_idle(void)
180{
181 local_fiq_enable();
182
183 /* endless idle loop with no priority at all */
184 while (1) {
9ccdac36
RK
185 tick_nohz_stop_sched_tick(1);
186 leds_event(led_idle_start);
187 while (!need_resched()) {
a054a811 188#ifdef CONFIG_HOTPLUG_CPU
9ccdac36
RK
189 if (cpu_is_offline(smp_processor_id()))
190 cpu_die();
a054a811
RK
191#endif
192
9ccdac36
RK
193 local_irq_disable();
194 if (hlt_counter) {
195 local_irq_enable();
196 cpu_relax();
197 } else {
198 stop_critical_timings();
199 pm_idle();
200 start_critical_timings();
201 /*
202 * This will eventually be removed - pm_idle
203 * functions should always return with IRQs
204 * enabled.
205 */
206 WARN_ON(irqs_disabled());
207 local_irq_enable();
208 }
209 }
1da177e4 210 leds_event(led_idle_end);
9e4559dd 211 tick_nohz_restart_sched_tick();
5bfb5d69 212 preempt_enable_no_resched();
1da177e4 213 schedule();
5bfb5d69 214 preempt_disable();
1da177e4
LT
215 }
216}
217
218static char reboot_mode = 'h';
219
220int __init reboot_setup(char *str)
221{
222 reboot_mode = str[0];
223 return 1;
224}
225
226__setup("reboot=", reboot_setup);
227
3d3f78d7 228void machine_shutdown(void)
1da177e4 229{
3d3f78d7
RK
230#ifdef CONFIG_SMP
231 smp_send_stop();
232#endif
1da177e4
LT
233}
234
3d3f78d7
RK
235void machine_halt(void)
236{
237 machine_shutdown();
238 while (1);
239}
1da177e4
LT
240
241void machine_power_off(void)
242{
3d3f78d7 243 machine_shutdown();
1da177e4
LT
244 if (pm_power_off)
245 pm_power_off();
246}
247
be093beb 248void machine_restart(char *cmd)
1da177e4 249{
3d3f78d7 250 machine_shutdown();
be093beb 251 arm_pm_restart(reboot_mode, cmd);
1da177e4
LT
252}
253
652a12ef 254void __show_regs(struct pt_regs *regs)
1da177e4 255{
154c772e
RK
256 unsigned long flags;
257 char buf[64];
1da177e4 258
154c772e 259 printk("CPU: %d %s (%s %.*s)\n",
22325525
RV
260 raw_smp_processor_id(), print_tainted(),
261 init_utsname()->release,
154c772e
RK
262 (int)strcspn(init_utsname()->version, " "),
263 init_utsname()->version);
1da177e4
LT
264 print_symbol("PC is at %s\n", instruction_pointer(regs));
265 print_symbol("LR is at %s\n", regs->ARM_lr);
154c772e 266 printk("pc : [<%08lx>] lr : [<%08lx>] psr: %08lx\n"
1da177e4 267 "sp : %08lx ip : %08lx fp : %08lx\n",
154c772e
RK
268 regs->ARM_pc, regs->ARM_lr, regs->ARM_cpsr,
269 regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
1da177e4
LT
270 printk("r10: %08lx r9 : %08lx r8 : %08lx\n",
271 regs->ARM_r10, regs->ARM_r9,
272 regs->ARM_r8);
273 printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
274 regs->ARM_r7, regs->ARM_r6,
275 regs->ARM_r5, regs->ARM_r4);
276 printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
277 regs->ARM_r3, regs->ARM_r2,
278 regs->ARM_r1, regs->ARM_r0);
154c772e
RK
279
280 flags = regs->ARM_cpsr;
281 buf[0] = flags & PSR_N_BIT ? 'N' : 'n';
282 buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
283 buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
284 buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
285 buf[4] = '\0';
286
909d6c6c 287 printk("Flags: %s IRQs o%s FIQs o%s Mode %s ISA %s Segment %s\n",
154c772e 288 buf, interrupts_enabled(regs) ? "n" : "ff",
1da177e4
LT
289 fast_interrupts_enabled(regs) ? "n" : "ff",
290 processor_modes[processor_mode(regs)],
909d6c6c 291 isa_modes[isa_mode(regs)],
1da177e4 292 get_fs() == get_ds() ? "kernel" : "user");
154c772e 293#ifdef CONFIG_CPU_CP15
1da177e4 294 {
f12d0d7c 295 unsigned int ctrl;
154c772e
RK
296
297 buf[0] = '\0';
f12d0d7c 298#ifdef CONFIG_CPU_CP15_MMU
154c772e
RK
299 {
300 unsigned int transbase, dac;
301 asm("mrc p15, 0, %0, c2, c0\n\t"
302 "mrc p15, 0, %1, c3, c0\n"
303 : "=r" (transbase), "=r" (dac));
304 snprintf(buf, sizeof(buf), " Table: %08x DAC: %08x",
305 transbase, dac);
306 }
f12d0d7c 307#endif
154c772e
RK
308 asm("mrc p15, 0, %0, c1, c0\n" : "=r" (ctrl));
309
310 printk("Control: %08x%s\n", ctrl, buf);
311 }
f12d0d7c 312#endif
1da177e4
LT
313}
314
652a12ef
RK
315void show_regs(struct pt_regs * regs)
316{
317 printk("\n");
19c5870c 318 printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm);
652a12ef
RK
319 __show_regs(regs);
320 __backtrace();
321}
322
797245f5
RK
323ATOMIC_NOTIFIER_HEAD(thread_notify_head);
324
325EXPORT_SYMBOL_GPL(thread_notify_head);
326
1da177e4
LT
327/*
328 * Free current thread data structures etc..
329 */
330void exit_thread(void)
331{
797245f5 332 thread_notify(THREAD_NOTIFY_EXIT, current_thread_info());
1da177e4
LT
333}
334
1da177e4
LT
335void flush_thread(void)
336{
337 struct thread_info *thread = current_thread_info();
338 struct task_struct *tsk = current;
339
864232fa
WD
340 flush_ptrace_hw_breakpoint(tsk);
341
1da177e4
LT
342 memset(thread->used_cp, 0, sizeof(thread->used_cp));
343 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
d6551e88
RK
344 memset(&thread->fpstate, 0, sizeof(union fp_state));
345
346 thread_notify(THREAD_NOTIFY_FLUSH, thread);
1da177e4
LT
347}
348
349void release_thread(struct task_struct *dead_task)
350{
1da177e4
LT
351}
352
353asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
354
355int
6f2c55b8 356copy_thread(unsigned long clone_flags, unsigned long stack_start,
1da177e4
LT
357 unsigned long stk_sz, struct task_struct *p, struct pt_regs *regs)
358{
815d5ec8
AV
359 struct thread_info *thread = task_thread_info(p);
360 struct pt_regs *childregs = task_pt_regs(p);
1da177e4 361
1da177e4
LT
362 *childregs = *regs;
363 childregs->ARM_r0 = 0;
364 childregs->ARM_sp = stack_start;
365
366 memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
367 thread->cpu_context.sp = (unsigned long)childregs;
368 thread->cpu_context.pc = (unsigned long)ret_from_fork;
369
864232fa
WD
370 clear_ptrace_hw_breakpoint(p);
371
1da177e4
LT
372 if (clone_flags & CLONE_SETTLS)
373 thread->tp_value = regs->ARM_r3;
374
375 return 0;
376}
377
cde3f860
AB
378/*
379 * Fill in the task's elfregs structure for a core dump.
380 */
381int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
382{
383 elf_core_copy_regs(elfregs, task_pt_regs(t));
384 return 1;
385}
386
1da177e4
LT
387/*
388 * fill in the fpe structure for a core dump...
389 */
390int dump_fpu (struct pt_regs *regs, struct user_fp *fp)
391{
392 struct thread_info *thread = current_thread_info();
393 int used_math = thread->used_cp[1] | thread->used_cp[2];
394
395 if (used_math)
396 memcpy(fp, &thread->fpstate.soft, sizeof (*fp));
397
398 return used_math != 0;
399}
400EXPORT_SYMBOL(dump_fpu);
401
1da177e4
LT
402/*
403 * Shuffle the argument into the correct register before calling the
ac78884e
RK
404 * thread function. r4 is the thread argument, r5 is the pointer to
405 * the thread function, and r6 points to the exit function.
1da177e4
LT
406 */
407extern void kernel_thread_helper(void);
4260415f 408asm( ".pushsection .text\n"
1da177e4
LT
409" .align\n"
410" .type kernel_thread_helper, #function\n"
411"kernel_thread_helper:\n"
ac78884e
RK
412#ifdef CONFIG_TRACE_IRQFLAGS
413" bl trace_hardirqs_on\n"
414#endif
415" msr cpsr_c, r7\n"
416" mov r0, r4\n"
417" mov lr, r6\n"
418" mov pc, r5\n"
1da177e4 419" .size kernel_thread_helper, . - kernel_thread_helper\n"
4260415f 420" .popsection");
1da177e4 421
feb97c36
CM
422#ifdef CONFIG_ARM_UNWIND
423extern void kernel_thread_exit(long code);
4260415f 424asm( ".pushsection .text\n"
feb97c36
CM
425" .align\n"
426" .type kernel_thread_exit, #function\n"
427"kernel_thread_exit:\n"
428" .fnstart\n"
429" .cantunwind\n"
430" bl do_exit\n"
431" nop\n"
432" .fnend\n"
433" .size kernel_thread_exit, . - kernel_thread_exit\n"
4260415f 434" .popsection");
feb97c36
CM
435#else
436#define kernel_thread_exit do_exit
437#endif
438
1da177e4
LT
439/*
440 * Create a kernel thread.
441 */
442pid_t kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
443{
444 struct pt_regs regs;
445
446 memset(&regs, 0, sizeof(regs));
447
ac78884e
RK
448 regs.ARM_r4 = (unsigned long)arg;
449 regs.ARM_r5 = (unsigned long)fn;
450 regs.ARM_r6 = (unsigned long)kernel_thread_exit;
451 regs.ARM_r7 = SVC_MODE | PSR_ENDSTATE | PSR_ISETSTATE;
1da177e4 452 regs.ARM_pc = (unsigned long)kernel_thread_helper;
ac78884e 453 regs.ARM_cpsr = regs.ARM_r7 | PSR_I_BIT;
1da177e4
LT
454
455 return do_fork(flags|CLONE_VM|CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
456}
457EXPORT_SYMBOL(kernel_thread);
458
459unsigned long get_wchan(struct task_struct *p)
460{
2d7c11bf 461 struct stackframe frame;
1da177e4
LT
462 int count = 0;
463 if (!p || p == current || p->state == TASK_RUNNING)
464 return 0;
465
2d7c11bf
CM
466 frame.fp = thread_saved_fp(p);
467 frame.sp = thread_saved_sp(p);
468 frame.lr = 0; /* recovered from the stack */
469 frame.pc = thread_saved_pc(p);
1da177e4 470 do {
2d7c11bf
CM
471 int ret = unwind_frame(&frame);
472 if (ret < 0)
1da177e4 473 return 0;
2d7c11bf
CM
474 if (!in_sched_functions(frame.pc))
475 return frame.pc;
1da177e4
LT
476 } while (count ++ < 16);
477 return 0;
478}
990cb8ac
NP
479
480unsigned long arch_randomize_brk(struct mm_struct *mm)
481{
482 unsigned long range_end = mm->brk + 0x02000000;
483 return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
484}
ec706dab 485
6cde6d42 486#ifdef CONFIG_MMU
ec706dab
NP
487/*
488 * The vectors page is always readable from user space for the
489 * atomic helpers and the signal restart code. Let's declare a mapping
490 * for it so it is visible through ptrace and /proc/<pid>/mem.
491 */
492
493int vectors_user_mapping(void)
494{
495 struct mm_struct *mm = current->mm;
496 return install_special_mapping(mm, 0xffff0000, PAGE_SIZE,
497 VM_READ | VM_EXEC |
498 VM_MAYREAD | VM_MAYEXEC |
499 VM_ALWAYSDUMP | VM_RESERVED,
500 NULL);
501}
502
503const char *arch_vma_name(struct vm_area_struct *vma)
504{
505 return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL;
506}
6cde6d42 507#endif