ARM: 6190/1: Remove dummy loads from the original relocation address
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / kernel / module.c
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/arm/kernel/module.c
3 *
4 * Copyright (C) 2002 Russell King.
6a570b28 5 * Modified for nommu by Hyok S. Choi
1da177e4
LT
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Module allocation method suggested by Andi Kleen.
12 */
1da177e4 13#include <linux/module.h>
f339ab3d 14#include <linux/moduleloader.h>
1da177e4 15#include <linux/kernel.h>
27ac792c 16#include <linux/mm.h>
1da177e4
LT
17#include <linux/elf.h>
18#include <linux/vmalloc.h>
1da177e4
LT
19#include <linux/fs.h>
20#include <linux/string.h>
5a0e3ad6 21#include <linux/gfp.h>
1da177e4
LT
22
23#include <asm/pgtable.h>
37efe642 24#include <asm/sections.h>
2e1926e7 25#include <asm/unwind.h>
1da177e4
LT
26
27#ifdef CONFIG_XIP_KERNEL
28/*
29 * The XIP kernel text is mapped in the module area for modules and
30 * some other stuff to work without any indirect relocations.
ab4f2ee1 31 * MODULES_VADDR is redefined here and not in asm/memory.h to avoid
1da177e4
LT
32 * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off.
33 */
ab4f2ee1 34#undef MODULES_VADDR
37efe642 35#define MODULES_VADDR (((unsigned long)_etext + ~PGDIR_MASK) & PGDIR_MASK)
1da177e4
LT
36#endif
37
6a570b28 38#ifdef CONFIG_MMU
1da177e4
LT
39void *module_alloc(unsigned long size)
40{
41 struct vm_struct *area;
42
43 size = PAGE_ALIGN(size);
44 if (!size)
45 return NULL;
46
ab4f2ee1 47 area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END);
1da177e4
LT
48 if (!area)
49 return NULL;
50
8ec53663 51 return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL_EXEC);
1da177e4 52}
6a570b28
HC
53#else /* CONFIG_MMU */
54void *module_alloc(unsigned long size)
55{
56 return size == 0 ? NULL : vmalloc(size);
57}
58#endif /* !CONFIG_MMU */
1da177e4
LT
59
60void module_free(struct module *module, void *region)
61{
62 vfree(region);
63}
64
65int module_frob_arch_sections(Elf_Ehdr *hdr,
66 Elf_Shdr *sechdrs,
67 char *secstrings,
68 struct module *mod)
69{
2e1926e7
CM
70#ifdef CONFIG_ARM_UNWIND
71 Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
72
73 for (s = sechdrs; s < sechdrs_end; s++) {
74 if (strcmp(".ARM.exidx.init.text", secstrings + s->sh_name) == 0)
75 mod->arch.unw_sec_init = s;
76 else if (strcmp(".ARM.exidx.devinit.text", secstrings + s->sh_name) == 0)
77 mod->arch.unw_sec_devinit = s;
78 else if (strcmp(".ARM.exidx", secstrings + s->sh_name) == 0)
79 mod->arch.unw_sec_core = s;
80 else if (strcmp(".init.text", secstrings + s->sh_name) == 0)
81 mod->arch.sec_init_text = s;
82 else if (strcmp(".devinit.text", secstrings + s->sh_name) == 0)
83 mod->arch.sec_devinit_text = s;
84 else if (strcmp(".text", secstrings + s->sh_name) == 0)
85 mod->arch.sec_core_text = s;
86 }
87#endif
1da177e4
LT
88 return 0;
89}
90
91int
92apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
93 unsigned int relindex, struct module *module)
94{
95 Elf32_Shdr *symsec = sechdrs + symindex;
96 Elf32_Shdr *relsec = sechdrs + relindex;
97 Elf32_Shdr *dstsec = sechdrs + relsec->sh_info;
98 Elf32_Rel *rel = (void *)relsec->sh_addr;
99 unsigned int i;
100
101 for (i = 0; i < relsec->sh_size / sizeof(Elf32_Rel); i++, rel++) {
102 unsigned long loc;
103 Elf32_Sym *sym;
104 s32 offset;
adca6dc2 105 u32 upper, lower, sign, j1, j2;
1da177e4
LT
106
107 offset = ELF32_R_SYM(rel->r_info);
108 if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) {
109 printk(KERN_ERR "%s: bad relocation, section %d reloc %d\n",
110 module->name, relindex, i);
111 return -ENOEXEC;
112 }
113
114 sym = ((Elf32_Sym *)symsec->sh_addr) + offset;
115
116 if (rel->r_offset < 0 || rel->r_offset > dstsec->sh_size - sizeof(u32)) {
117 printk(KERN_ERR "%s: out of bounds relocation, "
118 "section %d reloc %d offset %d size %d\n",
119 module->name, relindex, i, rel->r_offset,
120 dstsec->sh_size);
121 return -ENOEXEC;
122 }
123
124 loc = dstsec->sh_addr + rel->r_offset;
125
126 switch (ELF32_R_TYPE(rel->r_info)) {
2e1926e7
CM
127 case R_ARM_NONE:
128 /* ignore */
129 break;
130
1da177e4
LT
131 case R_ARM_ABS32:
132 *(u32 *)loc += sym->st_value;
133 break;
134
135 case R_ARM_PC24:
c2e26114
DJ
136 case R_ARM_CALL:
137 case R_ARM_JUMP24:
1da177e4
LT
138 offset = (*(u32 *)loc & 0x00ffffff) << 2;
139 if (offset & 0x02000000)
140 offset -= 0x04000000;
141
142 offset += sym->st_value - loc;
143 if (offset & 3 ||
c5f12503
KW
144 offset <= (s32)0xfe000000 ||
145 offset >= (s32)0x02000000) {
1da177e4
LT
146 printk(KERN_ERR
147 "%s: relocation out of range, section "
148 "%d reloc %d sym '%s'\n", module->name,
149 relindex, i, strtab + sym->st_name);
150 return -ENOEXEC;
151 }
152
153 offset >>= 2;
154
155 *(u32 *)loc &= 0xff000000;
156 *(u32 *)loc |= offset & 0x00ffffff;
157 break;
158
4731f8b6
DS
159 case R_ARM_V4BX:
160 /* Preserve Rm and the condition code. Alter
161 * other bits to re-code instruction as
162 * MOV PC,Rm.
163 */
164 *(u32 *)loc &= 0xf000000f;
165 *(u32 *)loc |= 0x01a0f000;
166 break;
167
2e1926e7
CM
168 case R_ARM_PREL31:
169 offset = *(u32 *)loc + sym->st_value - loc;
170 *(u32 *)loc = offset & 0x7fffffff;
171 break;
172
ae51e609
PG
173 case R_ARM_MOVW_ABS_NC:
174 case R_ARM_MOVT_ABS:
175 offset = *(u32 *)loc;
176 offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
177 offset = (offset ^ 0x8000) - 0x8000;
178
179 offset += sym->st_value;
180 if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS)
181 offset >>= 16;
182
183 *(u32 *)loc &= 0xfff0f000;
184 *(u32 *)loc |= ((offset & 0xf000) << 4) |
185 (offset & 0x0fff);
186 break;
187
adca6dc2
CM
188 case R_ARM_THM_CALL:
189 case R_ARM_THM_JUMP24:
190 upper = *(u16 *)loc;
191 lower = *(u16 *)(loc + 2);
192
193 /*
194 * 25 bit signed address range (Thumb-2 BL and B.W
195 * instructions):
196 * S:I1:I2:imm10:imm11:0
197 * where:
198 * S = upper[10] = offset[24]
199 * I1 = ~(J1 ^ S) = offset[23]
200 * I2 = ~(J2 ^ S) = offset[22]
201 * imm10 = upper[9:0] = offset[21:12]
202 * imm11 = lower[10:0] = offset[11:1]
203 * J1 = lower[13]
204 * J2 = lower[11]
205 */
206 sign = (upper >> 10) & 1;
207 j1 = (lower >> 13) & 1;
208 j2 = (lower >> 11) & 1;
209 offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) |
210 ((~(j2 ^ sign) & 1) << 22) |
211 ((upper & 0x03ff) << 12) |
212 ((lower & 0x07ff) << 1);
213 if (offset & 0x01000000)
214 offset -= 0x02000000;
215 offset += sym->st_value - loc;
216
217 /* only Thumb addresses allowed (no interworking) */
218 if (!(offset & 1) ||
219 offset <= (s32)0xff000000 ||
220 offset >= (s32)0x01000000) {
221 printk(KERN_ERR
222 "%s: relocation out of range, section "
223 "%d reloc %d sym '%s'\n", module->name,
224 relindex, i, strtab + sym->st_name);
225 return -ENOEXEC;
226 }
227
228 sign = (offset >> 24) & 1;
229 j1 = sign ^ (~(offset >> 23) & 1);
230 j2 = sign ^ (~(offset >> 22) & 1);
231 *(u16 *)loc = (u16)((upper & 0xf800) | (sign << 10) |
232 ((offset >> 12) & 0x03ff));
233 *(u16 *)(loc + 2) = (u16)((lower & 0xd000) |
234 (j1 << 13) | (j2 << 11) |
235 ((offset >> 1) & 0x07ff));
adca6dc2
CM
236 break;
237
8dd47741
CM
238 case R_ARM_THM_MOVW_ABS_NC:
239 case R_ARM_THM_MOVT_ABS:
240 upper = *(u16 *)loc;
241 lower = *(u16 *)(loc + 2);
242
243 /*
244 * MOVT/MOVW instructions encoding in Thumb-2:
245 *
246 * i = upper[10]
247 * imm4 = upper[3:0]
248 * imm3 = lower[14:12]
249 * imm8 = lower[7:0]
250 *
251 * imm16 = imm4:i:imm3:imm8
252 */
253 offset = ((upper & 0x000f) << 12) |
254 ((upper & 0x0400) << 1) |
255 ((lower & 0x7000) >> 4) | (lower & 0x00ff);
256 offset = (offset ^ 0x8000) - 0x8000;
257 offset += sym->st_value;
258
259 if (ELF32_R_TYPE(rel->r_info) == R_ARM_THM_MOVT_ABS)
260 offset >>= 16;
261
262 *(u16 *)loc = (u16)((upper & 0xfbf0) |
263 ((offset & 0xf000) >> 12) |
264 ((offset & 0x0800) >> 1));
265 *(u16 *)(loc + 2) = (u16)((lower & 0x8f00) |
266 ((offset & 0x0700) << 4) |
267 (offset & 0x00ff));
268 break;
269
1da177e4
LT
270 default:
271 printk(KERN_ERR "%s: unknown relocation: %u\n",
272 module->name, ELF32_R_TYPE(rel->r_info));
273 return -ENOEXEC;
274 }
275 }
276 return 0;
277}
278
279int
280apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
281 unsigned int symindex, unsigned int relsec, struct module *module)
282{
283 printk(KERN_ERR "module %s: ADD RELOCATION unsupported\n",
284 module->name);
285 return -ENOEXEC;
286}
287
2e1926e7
CM
288#ifdef CONFIG_ARM_UNWIND
289static void register_unwind_tables(struct module *mod)
290{
291 if (mod->arch.unw_sec_init && mod->arch.sec_init_text)
292 mod->arch.unwind_init =
293 unwind_table_add(mod->arch.unw_sec_init->sh_addr,
294 mod->arch.unw_sec_init->sh_size,
295 mod->arch.sec_init_text->sh_addr,
296 mod->arch.sec_init_text->sh_size);
297 if (mod->arch.unw_sec_devinit && mod->arch.sec_devinit_text)
298 mod->arch.unwind_devinit =
299 unwind_table_add(mod->arch.unw_sec_devinit->sh_addr,
300 mod->arch.unw_sec_devinit->sh_size,
301 mod->arch.sec_devinit_text->sh_addr,
302 mod->arch.sec_devinit_text->sh_size);
303 if (mod->arch.unw_sec_core && mod->arch.sec_core_text)
304 mod->arch.unwind_core =
305 unwind_table_add(mod->arch.unw_sec_core->sh_addr,
306 mod->arch.unw_sec_core->sh_size,
307 mod->arch.sec_core_text->sh_addr,
308 mod->arch.sec_core_text->sh_size);
309}
310
311static void unregister_unwind_tables(struct module *mod)
312{
313 unwind_table_del(mod->arch.unwind_init);
314 unwind_table_del(mod->arch.unwind_devinit);
315 unwind_table_del(mod->arch.unwind_core);
316}
317#else
318static inline void register_unwind_tables(struct module *mod) { }
319static inline void unregister_unwind_tables(struct module *mod) { }
320#endif
321
1da177e4
LT
322int
323module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
324 struct module *module)
325{
2e1926e7 326 register_unwind_tables(module);
1da177e4
LT
327 return 0;
328}
329
330void
331module_arch_cleanup(struct module *mod)
332{
2e1926e7 333 unregister_unwind_tables(mod);
1da177e4 334}