[ARM] mm: enable sparsemem on clps7500 and RiscPC
[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / include / asm / sparsemem.h
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1#ifndef ASMARM_SPARSEMEM_H
2#define ASMARM_SPARSEMEM_H
3
4#include <asm/memory.h>
5
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6/*
7 * Two definitions are required for sparsemem:
8 *
9 * MAX_PHYSMEM_BITS: The number of physical address bits required
10 * to address the last byte of memory.
11 *
12 * SECTION_SIZE_BITS: The number of physical address bits to cover
13 * the maximum amount of memory in a section.
14 *
15 * Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000,
16 * then MAX_PHYSMEM_BITS is 32, SECTION_SIZE_BITS is 26.
17 *
18 * Define these in your mach/memory.h.
19 */
20#if !defined(SECTION_SIZE_BITS) || !defined(MAX_PHYSMEM_BITS)
21#error Sparsemem is not supported on this platform
22#endif
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23
24#endif