[GitHub/mt8127/android_kernel_alcatel_ttab.git] / arch / arm / include / asm / irqflags.h

#ifndef __ASM_ARM_IRQFLAGS_H
#define __ASM_ARM_IRQFLAGS_H

#ifdef __KERNEL__

#include <asm/ptrace.h>

/*
 * CPU interrupt mask handling.
 */
#if __LINUX_ARM_ARCH__ >= 6

static inline unsigned long arch_local_irq_save(void)
{
	unsigned long flags;

	asm volatile(
		"	mrs	%0, cpsr	@ arch_local_irq_save\n"
		"	cpsid	i"
		: "=r" (flags) : : "memory", "cc");
	return flags;
}

static inline void arch_local_irq_enable(void)
{
	asm volatile(
		"	cpsie i			@ arch_local_irq_enable"
		:
		:
		: "memory", "cc");
}

static inline void arch_local_irq_disable(void)
{
	asm volatile(
		"	cpsid i			@ arch_local_irq_disable"
		:
		:
		: "memory", "cc");
}

#define local_fiq_enable()  __asm__("cpsie f	@ __stf" : : : "memory", "cc")
#define local_fiq_disable() __asm__("cpsid f	@ __clf" : : : "memory", "cc")
#else

/*
 * Save the current interrupt enable state & disable IRQs
 */
static inline unsigned long arch_local_irq_save(void)
{
	unsigned long flags, temp;

	asm volatile(
		"	mrs	%0, cpsr	@ arch_local_irq_save\n"
		"	orr	%1, %0, #128\n"
		"	msr	cpsr_c, %1"
		: "=r" (flags), "=r" (temp)
		:
		: "memory", "cc");
	return flags;
}

/*
 * Enable IRQs
 */
static inline void arch_local_irq_enable(void)
{
	unsigned long temp;
	asm volatile(
		"	mrs	%0, cpsr	@ arch_local_irq_enable\n"
		"	bic	%0, %0, #128\n"
		"	msr	cpsr_c, %0"
		: "=r" (temp)
		:
		: "memory", "cc");
}

/*
 * Disable IRQs
 */
static inline void arch_local_irq_disable(void)
{
	unsigned long temp;
	asm volatile(
		"	mrs	%0, cpsr	@ arch_local_irq_disable\n"
		"	orr	%0, %0, #128\n"
		"	msr	cpsr_c, %0"
		: "=r" (temp)
		:
		: "memory", "cc");
}

/*
 * Enable FIQs
 */
#define local_fiq_enable()					\
	({							\
		unsigned long temp;				\
	__asm__ __volatile__(					\
	"mrs	%0, cpsr		@ stf\n"		\
"	bic	%0, %0, #64\n"					\
"	msr	cpsr_c, %0"					\
	: "=r" (temp)						\
	:							\
	: "memory", "cc");					\
	})

/*
 * Disable FIQs
 */
#define local_fiq_disable()					\
	({							\
		unsigned long temp;				\
	__asm__ __volatile__(					\
	"mrs	%0, cpsr		@ clf\n"		\
"	orr	%0, %0, #64\n"					\
"	msr	cpsr_c, %0"					\
	: "=r" (temp)						\
	:							\
	: "memory", "cc");					\
	})

#endif

/*
 * Save the current interrupt enable state.
 */
static inline unsigned long arch_local_save_flags(void)
{
	unsigned long flags;
	asm volatile(
		"	mrs	%0, cpsr	@ local_save_flags"
		: "=r" (flags) : : "memory", "cc");
	return flags;
}

/*
 * restore saved IRQ & FIQ state
 */
static inline void arch_local_irq_restore(unsigned long flags)
{
	asm volatile(
		"	msr	cpsr_c, %0	@ local_irq_restore"
		:
		: "r" (flags)
		: "memory", "cc");
}

static inline int arch_irqs_disabled_flags(unsigned long flags)
{
	return flags & PSR_I_BIT;
}

#endif
#endif
Commit	Line	Data
7ad1bcb2 RK	1	#ifndef __ASM_ARM_IRQFLAGS_H
	2	#define __ASM_ARM_IRQFLAGS_H
	3
	4	#ifdef __KERNEL__
	5
	6	#include <asm/ptrace.h>
	7
	8	/*
	9	* CPU interrupt mask handling.
	10	*/
	11	#if __LINUX_ARM_ARCH__ >= 6
	12
df9ee292 DH	13	static inline unsigned long arch_local_irq_save(void)
	14	{
	15	unsigned long flags;
	16
	17	asm volatile(
	18	" mrs %0, cpsr @ arch_local_irq_save\n"
	19	" cpsid i"
	20	: "=r" (flags) : : "memory", "cc");
	21	return flags;
	22	}
	23
	24	static inline void arch_local_irq_enable(void)
	25	{
	26	asm volatile(
	27	" cpsie i @ arch_local_irq_enable"
	28	:
	29	:
	30	: "memory", "cc");
	31	}
	32
	33	static inline void arch_local_irq_disable(void)
	34	{
	35	asm volatile(
	36	" cpsid i @ arch_local_irq_disable"
	37	:
	38	:
	39	: "memory", "cc");
	40	}
7ad1bcb2	41
7ad1bcb2 RK	42	#define local_fiq_enable() __asm__("cpsie f @ __stf" : : : "memory", "cc")
7ad1bcb2 RK	43	#define local_fiq_disable() __asm__("cpsid f @ __clf" : : : "memory", "cc")
7ad1bcb2 RK	44	#else
	45
	46	/*
	47	* Save the current interrupt enable state & disable IRQs
	48	*/
df9ee292 DH	49	static inline unsigned long arch_local_irq_save(void)
	50	{
	51	unsigned long flags, temp;
	52
	53	asm volatile(
	54	" mrs %0, cpsr @ arch_local_irq_save\n"
	55	" orr %1, %0, #128\n"
	56	" msr cpsr_c, %1"
	57	: "=r" (flags), "=r" (temp)
	58	:
	59	: "memory", "cc");
	60	return flags;
	61	}
	62
7ad1bcb2 RK	63	/*
	64	* Enable IRQs
	65	*/
df9ee292 DH	66	static inline void arch_local_irq_enable(void)
	67	{
	68	unsigned long temp;
	69	asm volatile(
	70	" mrs %0, cpsr @ arch_local_irq_enable\n"
	71	" bic %0, %0, #128\n"
	72	" msr cpsr_c, %0"
	73	: "=r" (temp)
	74	:
	75	: "memory", "cc");
	76	}
7ad1bcb2 RK	77
	78	/*
	79	* Disable IRQs
	80	*/
df9ee292 DH	81	static inline void arch_local_irq_disable(void)
	82	{
	83	unsigned long temp;
	84	asm volatile(
	85	" mrs %0, cpsr @ arch_local_irq_disable\n"
	86	" orr %0, %0, #128\n"
	87	" msr cpsr_c, %0"
	88	: "=r" (temp)
	89	:
	90	: "memory", "cc");
	91	}
7ad1bcb2 RK	92
	93	/*
	94	* Enable FIQs
	95	*/
	96	#define local_fiq_enable() \
	97	({ \
	98	unsigned long temp; \
	99	__asm__ __volatile__( \
	100	"mrs %0, cpsr @ stf\n" \
	101	" bic %0, %0, #64\n" \
	102	" msr cpsr_c, %0" \
	103	: "=r" (temp) \
	104	: \
	105	: "memory", "cc"); \
	106	})
	107
	108	/*
	109	* Disable FIQs
	110	*/
	111	#define local_fiq_disable() \
	112	({ \
	113	unsigned long temp; \
	114	__asm__ __volatile__( \
	115	"mrs %0, cpsr @ clf\n" \
	116	" orr %0, %0, #64\n" \
	117	" msr cpsr_c, %0" \
	118	: "=r" (temp) \
	119	: \
	120	: "memory", "cc"); \
	121	})
	122
	123	#endif
	124
	125	/*
	126	* Save the current interrupt enable state.
	127	*/
df9ee292 DH	128	static inline unsigned long arch_local_save_flags(void)
	129	{
	130	unsigned long flags;
	131	asm volatile(
	132	" mrs %0, cpsr @ local_save_flags"
	133	: "=r" (flags) : : "memory", "cc");
	134	return flags;
	135	}
7ad1bcb2 RK	136
	137	/*
	138	* restore saved IRQ & FIQ state
	139	*/
df9ee292 DH	140	static inline void arch_local_irq_restore(unsigned long flags)
	141	{
	142	asm volatile(
	143	" msr cpsr_c, %0 @ local_irq_restore"
	144	:
	145	: "r" (flags)
	146	: "memory", "cc");
	147	}
7ad1bcb2	148
df9ee292 DH	149	static inline int arch_irqs_disabled_flags(unsigned long flags)
	150	{
	151	return flags & PSR_I_BIT;
	152	}
7ad1bcb2 RK	153
	154	#endif
	155	#endif