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19b85c08 TP |
1 | /* |
2 | * Device Tree file for OpenBlocks AX3-4 board | |
3 | * | |
4 | * Copyright (C) 2012 Marvell | |
5 | * | |
6 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | */ | |
12 | ||
13 | /dts-v1/; | |
14 | /include/ "armada-xp-mv78260.dtsi" | |
15 | ||
16 | / { | |
17 | model = "PlatHome OpenBlocks AX3-4 board"; | |
18 | compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp"; | |
19 | ||
20 | chosen { | |
21 | bootargs = "console=ttyS0,115200 earlyprintk"; | |
22 | }; | |
23 | ||
24 | memory { | |
25 | device_type = "memory"; | |
74898364 | 26 | reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */ |
19b85c08 TP |
27 | }; |
28 | ||
29 | soc { | |
5f1f3d50 TP |
30 | ranges = <0 0 0xd0000000 0x100000 /* Internal registers 1MiB */ |
31 | 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */ | |
32 | 0xf0000000 0 0xf0000000 0x8000000 /* Device Bus, NOR 128MiB */>; | |
00ed4a0b | 33 | |
467f54b2 GC |
34 | internal-regs { |
35 | serial@12000 { | |
36 | clock-frequency = <250000000>; | |
37 | status = "okay"; | |
19b85c08 | 38 | }; |
467f54b2 GC |
39 | serial@12100 { |
40 | clock-frequency = <250000000>; | |
41 | status = "okay"; | |
19b85c08 | 42 | }; |
467f54b2 GC |
43 | pinctrl { |
44 | led_pins: led-pins-0 { | |
45 | marvell,pins = "mpp49", "mpp51", "mpp53"; | |
46 | marvell,function = "gpio"; | |
47 | }; | |
19b85c08 | 48 | }; |
467f54b2 GC |
49 | leds { |
50 | compatible = "gpio-leds"; | |
51 | pinctrl-names = "default"; | |
52 | pinctrl-0 = <&led_pins>; | |
53 | ||
54 | red_led { | |
55 | label = "red_led"; | |
56 | gpios = <&gpio1 17 1>; | |
57 | default-state = "off"; | |
58 | }; | |
59 | ||
60 | yellow_led { | |
61 | label = "yellow_led"; | |
62 | gpios = <&gpio1 19 1>; | |
63 | default-state = "off"; | |
64 | }; | |
65 | ||
66 | green_led { | |
67 | label = "green_led"; | |
68 | gpios = <&gpio1 21 1>; | |
69 | default-state = "off"; | |
70 | linux,default-trigger = "heartbeat"; | |
71 | }; | |
19b85c08 | 72 | }; |
f69c92f4 | 73 | |
467f54b2 GC |
74 | gpio_keys { |
75 | compatible = "gpio-keys"; | |
76 | #address-cells = <1>; | |
77 | #size-cells = <0>; | |
4ca73962 | 78 | |
467f54b2 GC |
79 | button@1 { |
80 | label = "Init Button"; | |
81 | linux,code = <116>; | |
82 | gpios = <&gpio1 28 0>; | |
83 | }; | |
4ca73962 | 84 | }; |
4ca73962 | 85 | |
467f54b2 GC |
86 | mdio { |
87 | phy0: ethernet-phy@0 { | |
88 | reg = <0>; | |
89 | }; | |
f69c92f4 | 90 | |
467f54b2 GC |
91 | phy1: ethernet-phy@1 { |
92 | reg = <1>; | |
93 | }; | |
f69c92f4 | 94 | |
467f54b2 GC |
95 | phy2: ethernet-phy@2 { |
96 | reg = <2>; | |
97 | }; | |
f69c92f4 | 98 | |
467f54b2 GC |
99 | phy3: ethernet-phy@3 { |
100 | reg = <3>; | |
101 | }; | |
f69c92f4 | 102 | }; |
f69c92f4 | 103 | |
467f54b2 GC |
104 | ethernet@70000 { |
105 | status = "okay"; | |
106 | phy = <&phy0>; | |
107 | phy-mode = "sgmii"; | |
108 | }; | |
109 | ethernet@74000 { | |
110 | status = "okay"; | |
111 | phy = <&phy1>; | |
112 | phy-mode = "sgmii"; | |
113 | }; | |
114 | ethernet@30000 { | |
115 | status = "okay"; | |
116 | phy = <&phy2>; | |
117 | phy-mode = "sgmii"; | |
118 | }; | |
119 | ethernet@34000 { | |
120 | status = "okay"; | |
121 | phy = <&phy3>; | |
122 | phy-mode = "sgmii"; | |
123 | }; | |
124 | i2c@11000 { | |
125 | status = "okay"; | |
126 | clock-frequency = <400000>; | |
127 | }; | |
128 | i2c@11100 { | |
129 | status = "okay"; | |
130 | clock-frequency = <400000>; | |
14bedd4a | 131 | |
467f54b2 GC |
132 | s35390a: s35390a@30 { |
133 | compatible = "s35390a"; | |
134 | reg = <0x30>; | |
135 | }; | |
136 | }; | |
137 | sata@a0000 { | |
138 | nr-ports = <2>; | |
139 | status = "okay"; | |
140 | }; | |
141 | usb@50000 { | |
142 | status = "okay"; | |
143 | }; | |
144 | usb@51000 { | |
145 | status = "okay"; | |
14bedd4a | 146 | }; |
a7d4f818 | 147 | |
467f54b2 GC |
148 | devbus-bootcs@10400 { |
149 | status = "okay"; | |
150 | ranges = <0 0xf0000000 0x8000000>; /* @addr 0xf000000, size 0x8000000 */ | |
151 | ||
152 | /* Device Bus parameters are required */ | |
153 | ||
154 | /* Read parameters */ | |
3f3a34d4 | 155 | devbus,bus-width = <16>; |
467f54b2 GC |
156 | devbus,turn-off-ps = <60000>; |
157 | devbus,badr-skew-ps = <0>; | |
158 | devbus,acc-first-ps = <124000>; | |
159 | devbus,acc-next-ps = <248000>; | |
160 | devbus,rd-setup-ps = <0>; | |
161 | devbus,rd-hold-ps = <0>; | |
162 | ||
163 | /* Write parameters */ | |
164 | devbus,sync-enable = <0>; | |
165 | devbus,wr-high-ps = <60000>; | |
166 | devbus,wr-low-ps = <60000>; | |
167 | devbus,ale-wr-ps = <60000>; | |
168 | ||
169 | /* NOR 128 MiB */ | |
170 | nor@0 { | |
171 | compatible = "cfi-flash"; | |
172 | reg = <0 0x8000000>; | |
173 | bank-width = <2>; | |
174 | }; | |
a7d4f818 | 175 | }; |
95999cf0 | 176 | |
467f54b2 | 177 | pcie-controller { |
95999cf0 | 178 | status = "okay"; |
467f54b2 GC |
179 | /* Internal mini-PCIe connector */ |
180 | pcie@1,0 { | |
181 | /* Port 0, Lane 0 */ | |
182 | status = "okay"; | |
183 | }; | |
95999cf0 TP |
184 | }; |
185 | }; | |
19b85c08 TP |
186 | }; |
187 | }; |