Commit | Line | Data |
---|---|---|
6ee73861 BS |
1 | /* |
2 | * Copyright (C) 2008 Maarten Maathuis. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Permission is hereby granted, free of charge, to any person obtaining | |
6 | * a copy of this software and associated documentation files (the | |
7 | * "Software"), to deal in the Software without restriction, including | |
8 | * without limitation the rights to use, copy, modify, merge, publish, | |
9 | * distribute, sublicense, and/or sell copies of the Software, and to | |
10 | * permit persons to whom the Software is furnished to do so, subject to | |
11 | * the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial | |
15 | * portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. | |
20 | * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE | |
21 | * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION | |
22 | * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | * | |
25 | */ | |
26 | ||
3a6536c5 | 27 | #include <acpi/video.h> |
760285e7 | 28 | #include <drm/drmP.h> |
b167db0e BS |
29 | #include <drm/drm_atomic.h> |
30 | #include <drm/drm_atomic_helper.h> | |
760285e7 | 31 | #include <drm/drm_crtc_helper.h> |
77145f1c | 32 | |
fdb751ef BS |
33 | #include <nvif/class.h> |
34 | ||
6ee73861 | 35 | #include "nouveau_fbcon.h" |
1a646342 | 36 | #include "dispnv04/hw.h" |
332b242f FJ |
37 | #include "nouveau_crtc.h" |
38 | #include "nouveau_dma.h" | |
77145f1c | 39 | #include "nouveau_gem.h" |
de691855 | 40 | #include "nouveau_connector.h" |
45c4e0aa | 41 | #include "nv50_display.h" |
6ee73861 | 42 | |
ebb945a9 BS |
43 | #include "nouveau_fence.h" |
44 | ||
7568b106 | 45 | #include <nvif/cl0046.h> |
79ca2770 | 46 | #include <nvif/event.h> |
1d7c71a3 | 47 | |
51cb4b39 | 48 | static int |
80bc340b | 49 | nouveau_display_vblank_handler(struct nvif_notify *notify) |
51cb4b39 | 50 | { |
79ca2770 BS |
51 | struct nouveau_crtc *nv_crtc = |
52 | container_of(notify, typeof(*nv_crtc), vblank); | |
d297b020 | 53 | drm_crtc_handle_vblank(&nv_crtc->base); |
80bc340b | 54 | return NVIF_NOTIFY_KEEP; |
51cb4b39 BS |
55 | } |
56 | ||
57 | int | |
88e72717 | 58 | nouveau_display_vblank_enable(struct drm_device *dev, unsigned int pipe) |
51cb4b39 | 59 | { |
b12f0ae9 | 60 | struct drm_crtc *crtc; |
ea441bd3 SG |
61 | struct nouveau_crtc *nv_crtc; |
62 | ||
63 | crtc = drm_crtc_from_index(dev, pipe); | |
64 | if (!crtc) | |
65 | return -EINVAL; | |
66 | ||
67 | nv_crtc = nouveau_crtc(crtc); | |
68 | nvif_notify_get(&nv_crtc->vblank); | |
69 | ||
70 | return 0; | |
51cb4b39 BS |
71 | } |
72 | ||
73 | void | |
88e72717 | 74 | nouveau_display_vblank_disable(struct drm_device *dev, unsigned int pipe) |
51cb4b39 | 75 | { |
b12f0ae9 | 76 | struct drm_crtc *crtc; |
ea441bd3 SG |
77 | struct nouveau_crtc *nv_crtc; |
78 | ||
79 | crtc = drm_crtc_from_index(dev, pipe); | |
80 | if (!crtc) | |
81 | return; | |
82 | ||
83 | nv_crtc = nouveau_crtc(crtc); | |
84 | nvif_notify_put(&nv_crtc->vblank); | |
51cb4b39 BS |
85 | } |
86 | ||
d83ef853 BS |
87 | static inline int |
88 | calc(int blanks, int blanke, int total, int line) | |
89 | { | |
90 | if (blanke >= blanks) { | |
91 | if (line >= blanks) | |
92 | line -= total; | |
93 | } else { | |
94 | if (line >= blanks) | |
95 | line -= total; | |
96 | line -= blanke + 1; | |
97 | } | |
98 | return line; | |
99 | } | |
100 | ||
1bf6ad62 | 101 | static bool |
d83ef853 BS |
102 | nouveau_display_scanoutpos_head(struct drm_crtc *crtc, int *vpos, int *hpos, |
103 | ktime_t *stime, ktime_t *etime) | |
104 | { | |
4952b4d3 BS |
105 | struct { |
106 | struct nv04_disp_mthd_v0 base; | |
107 | struct nv04_disp_scanoutpos_v0 scan; | |
108 | } args = { | |
109 | .base.method = NV04_DISP_SCANOUTPOS, | |
110 | .base.head = nouveau_crtc(crtc)->index, | |
111 | }; | |
d83ef853 | 112 | struct nouveau_display *disp = nouveau_display(crtc->dev); |
eba1f35d | 113 | struct drm_vblank_crtc *vblank = &crtc->dev->vblank[drm_crtc_index(crtc)]; |
1bf6ad62 DV |
114 | int retry = 20; |
115 | bool ret = false; | |
d83ef853 BS |
116 | |
117 | do { | |
4952b4d3 | 118 | ret = nvif_mthd(&disp->disp, 0, &args, sizeof(args)); |
d83ef853 | 119 | if (ret != 0) |
1bf6ad62 | 120 | return false; |
d83ef853 | 121 | |
4952b4d3 | 122 | if (args.scan.vline) { |
1bf6ad62 | 123 | ret = true; |
d83ef853 BS |
124 | break; |
125 | } | |
126 | ||
eba1f35d | 127 | if (retry) ndelay(vblank->linedur_ns); |
d83ef853 BS |
128 | } while (retry--); |
129 | ||
4952b4d3 BS |
130 | *hpos = args.scan.hline; |
131 | *vpos = calc(args.scan.vblanks, args.scan.vblanke, | |
132 | args.scan.vtotal, args.scan.vline); | |
133 | if (stime) *stime = ns_to_ktime(args.scan.time[0]); | |
134 | if (etime) *etime = ns_to_ktime(args.scan.time[1]); | |
d83ef853 | 135 | |
d83ef853 BS |
136 | return ret; |
137 | } | |
138 | ||
1bf6ad62 | 139 | bool |
88e72717 | 140 | nouveau_display_scanoutpos(struct drm_device *dev, unsigned int pipe, |
1bf6ad62 | 141 | bool in_vblank_irq, int *vpos, int *hpos, |
88e72717 | 142 | ktime_t *stime, ktime_t *etime, |
3bb403bf | 143 | const struct drm_display_mode *mode) |
d83ef853 BS |
144 | { |
145 | struct drm_crtc *crtc; | |
146 | ||
147 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
88e72717 | 148 | if (nouveau_crtc(crtc)->index == pipe) { |
d83ef853 BS |
149 | return nouveau_display_scanoutpos_head(crtc, vpos, hpos, |
150 | stime, etime); | |
151 | } | |
152 | } | |
153 | ||
d673c02c | 154 | return false; |
d83ef853 BS |
155 | } |
156 | ||
51cb4b39 BS |
157 | static void |
158 | nouveau_display_vblank_fini(struct drm_device *dev) | |
159 | { | |
b12f0ae9 | 160 | struct drm_crtc *crtc; |
51cb4b39 | 161 | |
b12f0ae9 BS |
162 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
163 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
80bc340b | 164 | nvif_notify_fini(&nv_crtc->vblank); |
51cb4b39 | 165 | } |
51cb4b39 BS |
166 | } |
167 | ||
168 | static int | |
169 | nouveau_display_vblank_init(struct drm_device *dev) | |
170 | { | |
80bc340b | 171 | struct nouveau_display *disp = nouveau_display(dev); |
b12f0ae9 BS |
172 | struct drm_crtc *crtc; |
173 | int ret; | |
51cb4b39 | 174 | |
b12f0ae9 BS |
175 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
176 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
a01ca78c | 177 | ret = nvif_notify_init(&disp->disp, |
79ca2770 | 178 | nouveau_display_vblank_handler, false, |
80bc340b | 179 | NV04_DISP_NTFY_VBLANK, |
79ca2770 BS |
180 | &(struct nvif_notify_head_req_v0) { |
181 | .head = nv_crtc->index, | |
182 | }, | |
183 | sizeof(struct nvif_notify_head_req_v0), | |
184 | sizeof(struct nvif_notify_head_rep_v0), | |
185 | &nv_crtc->vblank); | |
51cb4b39 BS |
186 | if (ret) { |
187 | nouveau_display_vblank_fini(dev); | |
188 | return ret; | |
189 | } | |
190 | } | |
191 | ||
192 | ret = drm_vblank_init(dev, dev->mode_config.num_crtc); | |
193 | if (ret) { | |
194 | nouveau_display_vblank_fini(dev); | |
195 | return ret; | |
196 | } | |
197 | ||
198 | return 0; | |
199 | } | |
200 | ||
6ee73861 BS |
201 | static void |
202 | nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb) | |
203 | { | |
204 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
6ee73861 | 205 | |
bc9025bd | 206 | if (fb->nvbo) |
55fb74ad | 207 | drm_gem_object_unreference_unlocked(&fb->nvbo->gem); |
6ee73861 BS |
208 | |
209 | drm_framebuffer_cleanup(drm_fb); | |
210 | kfree(fb); | |
211 | } | |
212 | ||
213 | static int | |
214 | nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb, | |
215 | struct drm_file *file_priv, | |
216 | unsigned int *handle) | |
217 | { | |
218 | struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb); | |
219 | ||
55fb74ad | 220 | return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle); |
6ee73861 BS |
221 | } |
222 | ||
223 | static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = { | |
224 | .destroy = nouveau_user_framebuffer_destroy, | |
225 | .create_handle = nouveau_user_framebuffer_create_handle, | |
226 | }; | |
227 | ||
38651674 | 228 | int |
1608a0fb BS |
229 | nouveau_framebuffer_new(struct drm_device *dev, |
230 | const struct drm_mode_fb_cmd2 *mode_cmd, | |
231 | struct nouveau_bo *nvbo, | |
232 | struct nouveau_framebuffer **pfb) | |
6ee73861 | 233 | { |
3ce72bcf | 234 | struct nouveau_drm *drm = nouveau_drm(dev); |
1608a0fb | 235 | struct nouveau_framebuffer *fb; |
6ee73861 BS |
236 | int ret; |
237 | ||
3ce72bcf IM |
238 | /* YUV overlays have special requirements pre-NV50 */ |
239 | if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA && | |
240 | ||
241 | (mode_cmd->pixel_format == DRM_FORMAT_YUYV || | |
242 | mode_cmd->pixel_format == DRM_FORMAT_UYVY || | |
243 | mode_cmd->pixel_format == DRM_FORMAT_NV12 || | |
244 | mode_cmd->pixel_format == DRM_FORMAT_NV21) && | |
245 | (mode_cmd->pitches[0] & 0x3f || /* align 64 */ | |
246 | mode_cmd->pitches[0] >= 0x10000 || /* at most 64k pitch */ | |
247 | (mode_cmd->pitches[1] && /* pitches for planes must match */ | |
248 | mode_cmd->pitches[0] != mode_cmd->pitches[1]))) { | |
249 | struct drm_format_name_buf format_name; | |
250 | DRM_DEBUG_KMS("Unsuitable framebuffer: format: %s; pitches: 0x%x\n 0x%x\n", | |
251 | drm_get_format_name(mode_cmd->pixel_format, | |
252 | &format_name), | |
253 | mode_cmd->pitches[0], | |
254 | mode_cmd->pitches[1]); | |
255 | return -EINVAL; | |
256 | } | |
257 | ||
f00f0e21 | 258 | if (!(fb = *pfb = kzalloc(sizeof(*fb), GFP_KERNEL))) |
1608a0fb | 259 | return -ENOMEM; |
45c4e0aa | 260 | |
a3f913ca | 261 | drm_helper_mode_fill_fb_struct(dev, &fb->base, mode_cmd); |
1608a0fb | 262 | fb->nvbo = nvbo; |
ab0af559 | 263 | |
1608a0fb | 264 | ret = drm_framebuffer_init(dev, &fb->base, &nouveau_framebuffer_funcs); |
f00f0e21 BS |
265 | if (ret) |
266 | kfree(fb); | |
ab0af559 | 267 | return ret; |
6ee73861 BS |
268 | } |
269 | ||
839ca903 | 270 | struct drm_framebuffer * |
6ee73861 BS |
271 | nouveau_user_framebuffer_create(struct drm_device *dev, |
272 | struct drm_file *file_priv, | |
1eb83451 | 273 | const struct drm_mode_fb_cmd2 *mode_cmd) |
6ee73861 | 274 | { |
1608a0fb BS |
275 | struct nouveau_framebuffer *fb; |
276 | struct nouveau_bo *nvbo; | |
6ee73861 | 277 | struct drm_gem_object *gem; |
1608a0fb | 278 | int ret; |
6ee73861 | 279 | |
a8ad0bd8 | 280 | gem = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); |
6ee73861 | 281 | if (!gem) |
cce13ff7 | 282 | return ERR_PTR(-ENOENT); |
1608a0fb | 283 | nvbo = nouveau_gem_object(gem); |
6ee73861 | 284 | |
1608a0fb BS |
285 | ret = nouveau_framebuffer_new(dev, mode_cmd, nvbo, &fb); |
286 | if (ret == 0) | |
287 | return &fb->base; | |
fdfb8332 | 288 | |
e889c244 | 289 | drm_gem_object_unreference_unlocked(gem); |
fdfb8332 | 290 | return ERR_PTR(ret); |
6ee73861 BS |
291 | } |
292 | ||
27d5030a | 293 | static const struct drm_mode_config_funcs nouveau_mode_config_funcs = { |
6ee73861 | 294 | .fb_create = nouveau_user_framebuffer_create, |
eb1f8e4f | 295 | .output_poll_changed = nouveau_fbcon_output_poll_changed, |
6ee73861 BS |
296 | }; |
297 | ||
b29caa58 | 298 | |
4a67d391 | 299 | struct nouveau_drm_prop_enum_list { |
de691855 | 300 | u8 gen_mask; |
b29caa58 BS |
301 | int type; |
302 | char *name; | |
303 | }; | |
304 | ||
4a67d391 | 305 | static struct nouveau_drm_prop_enum_list underscan[] = { |
92854622 BS |
306 | { 6, UNDERSCAN_AUTO, "auto" }, |
307 | { 6, UNDERSCAN_OFF, "off" }, | |
308 | { 6, UNDERSCAN_ON, "on" }, | |
de691855 | 309 | {} |
b29caa58 BS |
310 | }; |
311 | ||
4a67d391 | 312 | static struct nouveau_drm_prop_enum_list dither_mode[] = { |
de691855 BS |
313 | { 7, DITHERING_MODE_AUTO, "auto" }, |
314 | { 7, DITHERING_MODE_OFF, "off" }, | |
315 | { 1, DITHERING_MODE_ON, "on" }, | |
316 | { 6, DITHERING_MODE_STATIC2X2, "static 2x2" }, | |
317 | { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" }, | |
318 | { 4, DITHERING_MODE_TEMPORAL, "temporal" }, | |
319 | {} | |
320 | }; | |
321 | ||
4a67d391 | 322 | static struct nouveau_drm_prop_enum_list dither_depth[] = { |
de691855 BS |
323 | { 6, DITHERING_DEPTH_AUTO, "auto" }, |
324 | { 6, DITHERING_DEPTH_6BPC, "6 bpc" }, | |
325 | { 6, DITHERING_DEPTH_8BPC, "8 bpc" }, | |
326 | {} | |
327 | }; | |
328 | ||
329 | #define PROP_ENUM(p,gen,n,list) do { \ | |
4a67d391 | 330 | struct nouveau_drm_prop_enum_list *l = (list); \ |
de691855 BS |
331 | int c = 0; \ |
332 | while (l->gen_mask) { \ | |
333 | if (l->gen_mask & (1 << (gen))) \ | |
334 | c++; \ | |
335 | l++; \ | |
336 | } \ | |
337 | if (c) { \ | |
338 | p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \ | |
339 | l = (list); \ | |
340 | c = 0; \ | |
341 | while (p && l->gen_mask) { \ | |
342 | if (l->gen_mask & (1 << (gen))) { \ | |
343 | drm_property_add_enum(p, c, l->type, l->name); \ | |
344 | c++; \ | |
345 | } \ | |
346 | l++; \ | |
347 | } \ | |
348 | } \ | |
349 | } while(0) | |
350 | ||
3a6536c5 | 351 | static void |
81280d0e | 352 | nouveau_display_hpd_work(struct work_struct *work) |
3a6536c5 | 353 | { |
81280d0e | 354 | struct nouveau_drm *drm = container_of(work, typeof(*drm), hpd_work); |
3a6536c5 HG |
355 | |
356 | pm_runtime_get_sync(drm->dev->dev); | |
357 | ||
358 | drm_helper_hpd_irq_event(drm->dev); | |
359 | ||
360 | pm_runtime_mark_last_busy(drm->dev->dev); | |
361 | pm_runtime_put_sync(drm->dev->dev); | |
362 | } | |
363 | ||
81280d0e HG |
364 | #ifdef CONFIG_ACPI |
365 | ||
366 | /* | |
367 | * Hans de Goede: This define belongs in acpi/video.h, I've submitted a patch | |
368 | * to the acpi subsys to move it there from drivers/acpi/acpi_video.c . | |
369 | * This should be dropped once that is merged. | |
370 | */ | |
371 | #ifndef ACPI_VIDEO_NOTIFY_PROBE | |
372 | #define ACPI_VIDEO_NOTIFY_PROBE 0x81 | |
373 | #endif | |
374 | ||
3a6536c5 HG |
375 | static int |
376 | nouveau_display_acpi_ntfy(struct notifier_block *nb, unsigned long val, | |
377 | void *data) | |
378 | { | |
379 | struct nouveau_drm *drm = container_of(nb, typeof(*drm), acpi_nb); | |
380 | struct acpi_bus_event *info = data; | |
35e48a08 | 381 | int ret; |
3a6536c5 HG |
382 | |
383 | if (!strcmp(info->device_class, ACPI_VIDEO_CLASS)) { | |
384 | if (info->type == ACPI_VIDEO_NOTIFY_PROBE) { | |
35e48a08 LP |
385 | ret = pm_runtime_get(drm->dev->dev); |
386 | if (ret == 1 || ret == -EACCES) { | |
387 | /* If the GPU is already awake, or in a state | |
388 | * where we can't wake it up, it can handle | |
389 | * it's own hotplug events. | |
390 | */ | |
391 | pm_runtime_put_autosuspend(drm->dev->dev); | |
392 | } else if (ret == 0) { | |
393 | /* This may be the only indication we receive | |
394 | * of a connector hotplug on a runtime | |
395 | * suspended GPU, schedule hpd_work to check. | |
396 | */ | |
397 | NV_DEBUG(drm, "ACPI requested connector reprobe\n"); | |
398 | schedule_work(&drm->hpd_work); | |
399 | pm_runtime_put_noidle(drm->dev->dev); | |
400 | } else { | |
401 | NV_WARN(drm, "Dropped ACPI reprobe event due to RPM error: %d\n", | |
402 | ret); | |
403 | } | |
3a6536c5 HG |
404 | |
405 | /* acpi-video should not generate keypresses for this */ | |
406 | return NOTIFY_BAD; | |
407 | } | |
408 | } | |
409 | ||
410 | return NOTIFY_DONE; | |
411 | } | |
412 | #endif | |
413 | ||
f62b27db BS |
414 | int |
415 | nouveau_display_init(struct drm_device *dev) | |
416 | { | |
77145f1c | 417 | struct nouveau_display *disp = nouveau_display(dev); |
898a2b32 | 418 | struct nouveau_drm *drm = nouveau_drm(dev); |
52c4d767 | 419 | struct drm_connector *connector; |
22c4488c | 420 | struct drm_connector_list_iter conn_iter; |
f62b27db BS |
421 | int ret; |
422 | ||
423 | ret = disp->init(dev); | |
52c4d767 BS |
424 | if (ret) |
425 | return ret; | |
426 | ||
409af02c LP |
427 | /* enable connector detection and polling for connectors without HPD |
428 | * support | |
429 | */ | |
430 | drm_kms_helper_poll_enable(dev); | |
431 | ||
52c4d767 | 432 | /* enable hotplug interrupts */ |
22c4488c | 433 | drm_connector_list_iter_begin(dev, &conn_iter); |
dd1363ca | 434 | nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) { |
52c4d767 | 435 | struct nouveau_connector *conn = nouveau_connector(connector); |
80bc340b | 436 | nvif_notify_get(&conn->hpd); |
f62b27db | 437 | } |
22c4488c | 438 | drm_connector_list_iter_end(&conn_iter); |
f62b27db | 439 | |
898a2b32 BS |
440 | /* enable flip completion events */ |
441 | nvif_notify_get(&drm->flip); | |
f62b27db BS |
442 | return ret; |
443 | } | |
444 | ||
445 | void | |
9ac837e0 | 446 | nouveau_display_fini(struct drm_device *dev, bool suspend, bool runtime) |
f62b27db | 447 | { |
77145f1c | 448 | struct nouveau_display *disp = nouveau_display(dev); |
898a2b32 | 449 | struct nouveau_drm *drm = nouveau_drm(dev); |
52c4d767 | 450 | struct drm_connector *connector; |
22c4488c | 451 | struct drm_connector_list_iter conn_iter; |
9cba5efa | 452 | |
18dddadc DV |
453 | if (!suspend) { |
454 | if (drm_drv_uses_atomic_modeset(dev)) | |
455 | drm_atomic_helper_shutdown(dev); | |
456 | else | |
457 | drm_crtc_force_disable_all(dev); | |
458 | } | |
3b4c0abb | 459 | |
898a2b32 BS |
460 | /* disable flip completion events */ |
461 | nvif_notify_put(&drm->flip); | |
462 | ||
52c4d767 | 463 | /* disable hotplug interrupts */ |
22c4488c | 464 | drm_connector_list_iter_begin(dev, &conn_iter); |
dd1363ca | 465 | nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) { |
52c4d767 | 466 | struct nouveau_connector *conn = nouveau_connector(connector); |
80bc340b | 467 | nvif_notify_put(&conn->hpd); |
52c4d767 | 468 | } |
22c4488c | 469 | drm_connector_list_iter_end(&conn_iter); |
f62b27db | 470 | |
9ac837e0 LP |
471 | if (!runtime) |
472 | cancel_work_sync(&drm->hpd_work); | |
473 | ||
f62b27db BS |
474 | drm_kms_helper_poll_disable(dev); |
475 | disp->fini(dev); | |
476 | } | |
477 | ||
9c210f37 BS |
478 | static void |
479 | nouveau_display_create_properties(struct drm_device *dev) | |
27d5030a | 480 | { |
9c210f37 BS |
481 | struct nouveau_display *disp = nouveau_display(dev); |
482 | int gen; | |
de691855 | 483 | |
648d4dfd | 484 | if (disp->disp.oclass < NV50_DISP) |
de691855 BS |
485 | gen = 0; |
486 | else | |
648d4dfd | 487 | if (disp->disp.oclass < GF110_DISP) |
de691855 BS |
488 | gen = 1; |
489 | else | |
490 | gen = 2; | |
491 | ||
492 | PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode); | |
493 | PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth); | |
494 | PROP_ENUM(disp->underscan_property, gen, "underscan", underscan); | |
b29caa58 BS |
495 | |
496 | disp->underscan_hborder_property = | |
d9bc3c02 | 497 | drm_property_create_range(dev, 0, "underscan hborder", 0, 128); |
b29caa58 BS |
498 | |
499 | disp->underscan_vborder_property = | |
d9bc3c02 | 500 | drm_property_create_range(dev, 0, "underscan vborder", 0, 128); |
b29caa58 | 501 | |
9c210f37 BS |
502 | if (gen < 1) |
503 | return; | |
df26bc9c | 504 | |
9c210f37 BS |
505 | /* -90..+90 */ |
506 | disp->vibrant_hue_property = | |
507 | drm_property_create_range(dev, 0, "vibrant hue", 0, 180); | |
508 | ||
509 | /* -100..+100 */ | |
510 | disp->color_vibrance_property = | |
511 | drm_property_create_range(dev, 0, "color vibrance", 0, 200); | |
512 | } | |
513 | ||
514 | int | |
515 | nouveau_display_create(struct drm_device *dev) | |
516 | { | |
517 | struct nouveau_drm *drm = nouveau_drm(dev); | |
1167c6bc | 518 | struct nvkm_device *device = nvxx_device(&drm->client.device); |
9c210f37 BS |
519 | struct nouveau_display *disp; |
520 | int ret; | |
521 | ||
522 | disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL); | |
523 | if (!disp) | |
524 | return -ENOMEM; | |
525 | ||
526 | drm_mode_config_init(dev); | |
527 | drm_mode_create_scaling_mode_property(dev); | |
528 | drm_mode_create_dvi_i_properties(dev); | |
df26bc9c | 529 | |
e6ecefaa | 530 | dev->mode_config.funcs = &nouveau_mode_config_funcs; |
7e8820fe | 531 | dev->mode_config.fb_base = device->func->resource_addr(device, 1); |
27d5030a BS |
532 | |
533 | dev->mode_config.min_width = 0; | |
534 | dev->mode_config.min_height = 0; | |
1167c6bc | 535 | if (drm->client.device.info.family < NV_DEVICE_INFO_V0_CELSIUS) { |
27d5030a BS |
536 | dev->mode_config.max_width = 2048; |
537 | dev->mode_config.max_height = 2048; | |
538 | } else | |
1167c6bc | 539 | if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) { |
27d5030a BS |
540 | dev->mode_config.max_width = 4096; |
541 | dev->mode_config.max_height = 4096; | |
5102ec3e | 542 | } else |
1167c6bc | 543 | if (drm->client.device.info.family < NV_DEVICE_INFO_V0_FERMI) { |
27d5030a BS |
544 | dev->mode_config.max_width = 8192; |
545 | dev->mode_config.max_height = 8192; | |
5102ec3e IM |
546 | } else { |
547 | dev->mode_config.max_width = 16384; | |
548 | dev->mode_config.max_height = 16384; | |
27d5030a BS |
549 | } |
550 | ||
f1377998 DA |
551 | dev->mode_config.preferred_depth = 24; |
552 | dev->mode_config.prefer_shadow = 1; | |
553 | ||
1167c6bc | 554 | if (drm->client.device.info.chipset < 0x11) |
b9d9dcda BS |
555 | dev->mode_config.async_page_flip = false; |
556 | else | |
557 | dev->mode_config.async_page_flip = true; | |
558 | ||
f62b27db BS |
559 | drm_kms_helper_poll_init(dev); |
560 | drm_kms_helper_poll_disable(dev); | |
561 | ||
771fa0e4 | 562 | if (nouveau_modeset != 2 && drm->vbios.dcb.entries) { |
2332b311 | 563 | static const u16 oclass[] = { |
ed828666 | 564 | GP102_DISP, |
f9d5cbb3 | 565 | GP100_DISP, |
db1eb528 | 566 | GM200_DISP, |
648d4dfd BS |
567 | GM107_DISP, |
568 | GK110_DISP, | |
569 | GK104_DISP, | |
570 | GF110_DISP, | |
571 | GT214_DISP, | |
572 | GT206_DISP, | |
573 | GT200_DISP, | |
574 | G82_DISP, | |
575 | NV50_DISP, | |
576 | NV04_DISP, | |
2332b311 BS |
577 | }; |
578 | int i; | |
579 | ||
580 | for (i = 0, ret = -ENODEV; ret && i < ARRAY_SIZE(oclass); i++) { | |
1167c6bc | 581 | ret = nvif_object_init(&drm->client.device.object, 0, |
fcf3f91c | 582 | oclass[i], NULL, 0, &disp->disp); |
2332b311 BS |
583 | } |
584 | ||
585 | if (ret == 0) { | |
9c210f37 | 586 | nouveau_display_create_properties(dev); |
648d4dfd | 587 | if (disp->disp.oclass < NV50_DISP) |
2332b311 BS |
588 | ret = nv04_display_create(dev); |
589 | else | |
590 | ret = nv50_display_create(dev); | |
591 | } | |
fc162088 BS |
592 | } else { |
593 | ret = 0; | |
594 | } | |
9430738d | 595 | |
fc162088 BS |
596 | if (ret) |
597 | goto disp_create_err; | |
9430738d | 598 | |
07193f70 BS |
599 | drm_mode_config_reset(dev); |
600 | ||
fc162088 | 601 | if (dev->mode_config.num_crtc) { |
51cb4b39 | 602 | ret = nouveau_display_vblank_init(dev); |
fc162088 BS |
603 | if (ret) |
604 | goto vblank_err; | |
f62b27db BS |
605 | } |
606 | ||
fc162088 | 607 | nouveau_backlight_init(dev); |
81280d0e | 608 | INIT_WORK(&drm->hpd_work, nouveau_display_hpd_work); |
3a6536c5 | 609 | #ifdef CONFIG_ACPI |
3a6536c5 HG |
610 | drm->acpi_nb.notifier_call = nouveau_display_acpi_ntfy; |
611 | register_acpi_notifier(&drm->acpi_nb); | |
612 | #endif | |
613 | ||
5ace2c9d MS |
614 | return 0; |
615 | ||
616 | vblank_err: | |
77145f1c | 617 | disp->dtor(dev); |
5ace2c9d MS |
618 | disp_create_err: |
619 | drm_kms_helper_poll_fini(dev); | |
620 | drm_mode_config_cleanup(dev); | |
2a44e499 | 621 | return ret; |
27d5030a BS |
622 | } |
623 | ||
624 | void | |
625 | nouveau_display_destroy(struct drm_device *dev) | |
626 | { | |
77145f1c | 627 | struct nouveau_display *disp = nouveau_display(dev); |
27d5030a | 628 | |
3a6536c5 HG |
629 | #ifdef CONFIG_ACPI |
630 | unregister_acpi_notifier(&nouveau_drm(dev)->acpi_nb); | |
631 | #endif | |
77145f1c | 632 | nouveau_backlight_exit(dev); |
51cb4b39 | 633 | nouveau_display_vblank_fini(dev); |
f62b27db | 634 | |
d6bf2f37 BS |
635 | drm_kms_helper_poll_fini(dev); |
636 | drm_mode_config_cleanup(dev); | |
637 | ||
9430738d BS |
638 | if (disp->dtor) |
639 | disp->dtor(dev); | |
f62b27db | 640 | |
0ad72863 | 641 | nvif_object_fini(&disp->disp); |
2332b311 | 642 | |
77145f1c BS |
643 | nouveau_drm(dev)->display = NULL; |
644 | kfree(disp); | |
645 | } | |
646 | ||
647 | int | |
6fbb702e | 648 | nouveau_display_suspend(struct drm_device *dev, bool runtime) |
77145f1c | 649 | { |
b167db0e | 650 | struct nouveau_display *disp = nouveau_display(dev); |
77145f1c BS |
651 | struct drm_crtc *crtc; |
652 | ||
a743d758 | 653 | if (drm_drv_uses_atomic_modeset(dev)) { |
b167db0e | 654 | if (!runtime) { |
9b2104f4 | 655 | disp->suspend = drm_atomic_helper_suspend(dev); |
b167db0e BS |
656 | if (IS_ERR(disp->suspend)) { |
657 | int ret = PTR_ERR(disp->suspend); | |
658 | disp->suspend = NULL; | |
659 | return ret; | |
660 | } | |
661 | } | |
662 | ||
9ac837e0 | 663 | nouveau_display_fini(dev, true, runtime); |
b167db0e BS |
664 | return 0; |
665 | } | |
666 | ||
9ac837e0 | 667 | nouveau_display_fini(dev, true, runtime); |
77145f1c | 668 | |
77145f1c BS |
669 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
670 | struct nouveau_framebuffer *nouveau_fb; | |
671 | ||
f4510a27 | 672 | nouveau_fb = nouveau_framebuffer(crtc->primary->fb); |
77145f1c BS |
673 | if (!nouveau_fb || !nouveau_fb->nvbo) |
674 | continue; | |
675 | ||
676 | nouveau_bo_unpin(nouveau_fb->nvbo); | |
677 | } | |
678 | ||
679 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
680 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
5a560252 | 681 | if (nv_crtc->cursor.nvbo) { |
4dc63933 ML |
682 | if (nv_crtc->cursor.set_offset) |
683 | nouveau_bo_unmap(nv_crtc->cursor.nvbo); | |
5a560252 BS |
684 | nouveau_bo_unpin(nv_crtc->cursor.nvbo); |
685 | } | |
77145f1c BS |
686 | } |
687 | ||
688 | return 0; | |
689 | } | |
690 | ||
691 | void | |
6fbb702e | 692 | nouveau_display_resume(struct drm_device *dev, bool runtime) |
77145f1c | 693 | { |
b167db0e | 694 | struct nouveau_display *disp = nouveau_display(dev); |
77145f1c BS |
695 | struct nouveau_drm *drm = nouveau_drm(dev); |
696 | struct drm_crtc *crtc; | |
9bc6db0d | 697 | int ret; |
77145f1c | 698 | |
a743d758 | 699 | if (drm_drv_uses_atomic_modeset(dev)) { |
b167db0e BS |
700 | nouveau_display_init(dev); |
701 | if (disp->suspend) { | |
702 | drm_atomic_helper_resume(dev, disp->suspend); | |
703 | disp->suspend = NULL; | |
704 | } | |
705 | return; | |
706 | } | |
707 | ||
6fbb702e | 708 | /* re-pin fb/cursors */ |
77145f1c BS |
709 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
710 | struct nouveau_framebuffer *nouveau_fb; | |
711 | ||
f4510a27 | 712 | nouveau_fb = nouveau_framebuffer(crtc->primary->fb); |
77145f1c BS |
713 | if (!nouveau_fb || !nouveau_fb->nvbo) |
714 | continue; | |
715 | ||
547ad072 | 716 | ret = nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM, true); |
c9a6fd97 BS |
717 | if (ret) |
718 | NV_ERROR(drm, "Could not pin framebuffer\n"); | |
77145f1c BS |
719 | } |
720 | ||
721 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
722 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
5a560252 BS |
723 | if (!nv_crtc->cursor.nvbo) |
724 | continue; | |
77145f1c | 725 | |
547ad072 | 726 | ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, true); |
4dc63933 | 727 | if (!ret && nv_crtc->cursor.set_offset) |
77145f1c BS |
728 | ret = nouveau_bo_map(nv_crtc->cursor.nvbo); |
729 | if (ret) | |
730 | NV_ERROR(drm, "Could not pin/map cursor.\n"); | |
731 | } | |
9cba5efa | 732 | |
77145f1c BS |
733 | nouveau_display_init(dev); |
734 | ||
735 | /* Force CLUT to get re-loaded during modeset */ | |
736 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
737 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
738 | ||
739 | nv_crtc->lut.depth = 0; | |
740 | } | |
741 | ||
6fbb702e BS |
742 | /* This should ensure we don't hit a locking problem when someone |
743 | * wakes us up via a connector. We should never go into suspend | |
744 | * while the display is on anyways. | |
745 | */ | |
746 | if (runtime) | |
747 | return; | |
748 | ||
77145f1c BS |
749 | drm_helper_resume_force_mode(dev); |
750 | ||
751 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | |
752 | struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); | |
77145f1c | 753 | |
5a560252 | 754 | if (!nv_crtc->cursor.nvbo) |
036a12b6 | 755 | continue; |
4dc63933 ML |
756 | |
757 | if (nv_crtc->cursor.set_offset) | |
758 | nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset); | |
77145f1c BS |
759 | nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x, |
760 | nv_crtc->cursor_saved_y); | |
761 | } | |
27d5030a BS |
762 | } |
763 | ||
332b242f FJ |
764 | static int |
765 | nouveau_page_flip_emit(struct nouveau_channel *chan, | |
766 | struct nouveau_bo *old_bo, | |
767 | struct nouveau_bo *new_bo, | |
768 | struct nouveau_page_flip_state *s, | |
769 | struct nouveau_fence **pfence) | |
770 | { | |
f589be88 | 771 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
772 | struct nouveau_drm *drm = chan->drm; |
773 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
774 | unsigned long flags; |
775 | int ret; | |
776 | ||
777 | /* Queue it to the pending list */ | |
778 | spin_lock_irqsave(&dev->event_lock, flags); | |
f589be88 | 779 | list_add_tail(&s->head, &fctx->flip); |
332b242f FJ |
780 | spin_unlock_irqrestore(&dev->event_lock, flags); |
781 | ||
782 | /* Synchronize with the old framebuffer */ | |
e3be4c23 | 783 | ret = nouveau_fence_sync(old_bo, chan, false, false); |
332b242f FJ |
784 | if (ret) |
785 | goto fail; | |
786 | ||
787 | /* Emit the pageflip */ | |
1e303c03 | 788 | ret = RING_SPACE(chan, 2); |
332b242f FJ |
789 | if (ret) |
790 | goto fail; | |
791 | ||
e1ef6b42 | 792 | BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1); |
1e303c03 | 793 | OUT_RING (chan, 0x00000000); |
bd2f2037 | 794 | FIRE_RING (chan); |
332b242f | 795 | |
264ce192 | 796 | ret = nouveau_fence_new(chan, false, pfence); |
332b242f FJ |
797 | if (ret) |
798 | goto fail; | |
799 | ||
800 | return 0; | |
801 | fail: | |
802 | spin_lock_irqsave(&dev->event_lock, flags); | |
803 | list_del(&s->head); | |
804 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
805 | return ret; | |
806 | } | |
807 | ||
808 | int | |
809 | nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, | |
41292b1f DV |
810 | struct drm_pending_vblank_event *event, u32 flags, |
811 | struct drm_modeset_acquire_ctx *ctx) | |
332b242f | 812 | { |
b9d9dcda | 813 | const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1; |
332b242f | 814 | struct drm_device *dev = crtc->dev; |
77145f1c | 815 | struct nouveau_drm *drm = nouveau_drm(dev); |
f4510a27 | 816 | struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo; |
332b242f FJ |
817 | struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; |
818 | struct nouveau_page_flip_state *s; | |
0ad72863 BS |
819 | struct nouveau_channel *chan; |
820 | struct nouveau_cli *cli; | |
332b242f | 821 | struct nouveau_fence *fence; |
e1ef6b42 BS |
822 | struct nv04_display *dispnv04 = nv04_display(dev); |
823 | int head = nouveau_crtc(crtc)->index; | |
332b242f FJ |
824 | int ret; |
825 | ||
0ad72863 BS |
826 | chan = drm->channel; |
827 | if (!chan) | |
332b242f | 828 | return -ENODEV; |
a01ca78c | 829 | cli = (void *)chan->user.client; |
332b242f FJ |
830 | |
831 | s = kzalloc(sizeof(*s), GFP_KERNEL); | |
832 | if (!s) | |
833 | return -ENOMEM; | |
834 | ||
d5c1e84b | 835 | if (new_bo != old_bo) { |
547ad072 | 836 | ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM, true); |
d5c1e84b ML |
837 | if (ret) |
838 | goto fail_free; | |
839 | } | |
840 | ||
0ad72863 | 841 | mutex_lock(&cli->mutex); |
dfd5e50e | 842 | ret = ttm_bo_reserve(&new_bo->bo, true, false, NULL); |
eae389f9 | 843 | if (ret) |
09c3de13 | 844 | goto fail_unpin; |
b580c9e2 | 845 | |
eae389f9 | 846 | /* synchronise rendering channel with the kernel's channel */ |
e3be4c23 | 847 | ret = nouveau_fence_sync(new_bo, chan, false, true); |
bdaf7ddf ML |
848 | if (ret) { |
849 | ttm_bo_unreserve(&new_bo->bo); | |
060810d7 | 850 | goto fail_unpin; |
bdaf7ddf | 851 | } |
b580c9e2 | 852 | |
bdaf7ddf ML |
853 | if (new_bo != old_bo) { |
854 | ttm_bo_unreserve(&new_bo->bo); | |
855 | ||
dfd5e50e | 856 | ret = ttm_bo_reserve(&old_bo->bo, true, false, NULL); |
bdaf7ddf ML |
857 | if (ret) |
858 | goto fail_unpin; | |
859 | } | |
b580c9e2 ML |
860 | |
861 | /* Initialize a page flip struct */ | |
862 | *s = (struct nouveau_page_flip_state) | |
272725c7 | 863 | { { }, event, crtc, fb->format->cpp[0] * 8, fb->pitches[0], |
b580c9e2 ML |
864 | new_bo->bo.offset }; |
865 | ||
ba124a41 | 866 | /* Keep vblanks on during flip, for the target crtc of this flip */ |
dc4ff116 | 867 | drm_crtc_vblank_get(crtc); |
ba124a41 | 868 | |
332b242f | 869 | /* Emit a page flip */ |
e1ef6b42 BS |
870 | if (swap_interval) { |
871 | ret = RING_SPACE(chan, 8); | |
060810d7 | 872 | if (ret) |
d7117e0d | 873 | goto fail_unreserve; |
b9d9dcda | 874 | |
e1ef6b42 BS |
875 | BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1); |
876 | OUT_RING (chan, 0); | |
877 | BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1); | |
878 | OUT_RING (chan, head); | |
879 | BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1); | |
880 | OUT_RING (chan, 0); | |
881 | BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1); | |
882 | OUT_RING (chan, 0); | |
d7117e0d BS |
883 | } |
884 | ||
e1ef6b42 BS |
885 | nouveau_bo_ref(new_bo, &dispnv04->image[head]); |
886 | ||
332b242f | 887 | ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); |
332b242f FJ |
888 | if (ret) |
889 | goto fail_unreserve; | |
0ad72863 | 890 | mutex_unlock(&cli->mutex); |
332b242f FJ |
891 | |
892 | /* Update the crtc struct and cleanup */ | |
f4510a27 | 893 | crtc->primary->fb = fb; |
332b242f | 894 | |
809e9447 | 895 | nouveau_bo_fence(old_bo, fence, false); |
07ad6ca0 | 896 | ttm_bo_unreserve(&old_bo->bo); |
060810d7 | 897 | if (old_bo != new_bo) |
b580c9e2 | 898 | nouveau_bo_unpin(old_bo); |
332b242f FJ |
899 | nouveau_fence_unref(&fence); |
900 | return 0; | |
901 | ||
902 | fail_unreserve: | |
dc4ff116 | 903 | drm_crtc_vblank_put(crtc); |
07ad6ca0 | 904 | ttm_bo_unreserve(&old_bo->bo); |
060810d7 | 905 | fail_unpin: |
0ad72863 | 906 | mutex_unlock(&cli->mutex); |
060810d7 | 907 | if (old_bo != new_bo) |
b580c9e2 | 908 | nouveau_bo_unpin(new_bo); |
332b242f FJ |
909 | fail_free: |
910 | kfree(s); | |
911 | return ret; | |
912 | } | |
913 | ||
914 | int | |
915 | nouveau_finish_page_flip(struct nouveau_channel *chan, | |
916 | struct nouveau_page_flip_state *ps) | |
917 | { | |
f589be88 | 918 | struct nouveau_fence_chan *fctx = chan->fence; |
77145f1c BS |
919 | struct nouveau_drm *drm = chan->drm; |
920 | struct drm_device *dev = drm->dev; | |
332b242f FJ |
921 | struct nouveau_page_flip_state *s; |
922 | unsigned long flags; | |
923 | ||
924 | spin_lock_irqsave(&dev->event_lock, flags); | |
925 | ||
f589be88 | 926 | if (list_empty(&fctx->flip)) { |
77145f1c | 927 | NV_ERROR(drm, "unexpected pageflip\n"); |
332b242f FJ |
928 | spin_unlock_irqrestore(&dev->event_lock, flags); |
929 | return -EINVAL; | |
930 | } | |
931 | ||
f589be88 | 932 | s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head); |
af4870e4 | 933 | if (s->event) { |
e1ef6b42 BS |
934 | drm_crtc_arm_vblank_event(s->crtc, s->event); |
935 | } else { | |
bbc8764f | 936 | /* Give up ownership of vblank for page-flipped crtc */ |
dc4ff116 | 937 | drm_crtc_vblank_put(s->crtc); |
af4870e4 | 938 | } |
ba124a41 | 939 | |
332b242f | 940 | list_del(&s->head); |
d7117e0d BS |
941 | if (ps) |
942 | *ps = *s; | |
332b242f FJ |
943 | kfree(s); |
944 | ||
945 | spin_unlock_irqrestore(&dev->event_lock, flags); | |
946 | return 0; | |
947 | } | |
33dbc27f | 948 | |
f589be88 | 949 | int |
898a2b32 | 950 | nouveau_flip_complete(struct nvif_notify *notify) |
f589be88 | 951 | { |
898a2b32 BS |
952 | struct nouveau_drm *drm = container_of(notify, typeof(*drm), flip); |
953 | struct nouveau_channel *chan = drm->channel; | |
f589be88 BS |
954 | struct nouveau_page_flip_state state; |
955 | ||
956 | if (!nouveau_finish_page_flip(chan, &state)) { | |
e1ef6b42 BS |
957 | nv_set_crtc_base(drm->dev, drm_crtc_index(state.crtc), |
958 | state.offset + state.crtc->y * | |
959 | state.pitch + state.crtc->x * | |
960 | state.bpp / 8); | |
f589be88 BS |
961 | } |
962 | ||
898a2b32 | 963 | return NVIF_NOTIFY_KEEP; |
f589be88 BS |
964 | } |
965 | ||
33dbc27f BS |
966 | int |
967 | nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev, | |
968 | struct drm_mode_create_dumb *args) | |
969 | { | |
fc1b0a02 | 970 | struct nouveau_cli *cli = nouveau_cli(file_priv); |
33dbc27f | 971 | struct nouveau_bo *bo; |
eaecf032 | 972 | uint32_t domain; |
33dbc27f BS |
973 | int ret; |
974 | ||
975 | args->pitch = roundup(args->width * (args->bpp / 8), 256); | |
976 | args->size = args->pitch * args->height; | |
977 | args->size = roundup(args->size, PAGE_SIZE); | |
978 | ||
eaecf032 | 979 | /* Use VRAM if there is any ; otherwise fallback to system memory */ |
1167c6bc | 980 | if (nouveau_drm(dev)->client.device.info.ram_size != 0) |
eaecf032 AC |
981 | domain = NOUVEAU_GEM_DOMAIN_VRAM; |
982 | else | |
983 | domain = NOUVEAU_GEM_DOMAIN_GART; | |
984 | ||
fc1b0a02 | 985 | ret = nouveau_gem_new(cli, args->size, 0, domain, 0, 0, &bo); |
33dbc27f BS |
986 | if (ret) |
987 | return ret; | |
988 | ||
55fb74ad DH |
989 | ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle); |
990 | drm_gem_object_unreference_unlocked(&bo->gem); | |
33dbc27f BS |
991 | return ret; |
992 | } | |
993 | ||
33dbc27f BS |
994 | int |
995 | nouveau_display_dumb_map_offset(struct drm_file *file_priv, | |
996 | struct drm_device *dev, | |
997 | uint32_t handle, uint64_t *poffset) | |
998 | { | |
999 | struct drm_gem_object *gem; | |
1000 | ||
a8ad0bd8 | 1001 | gem = drm_gem_object_lookup(file_priv, handle); |
33dbc27f | 1002 | if (gem) { |
55fb74ad | 1003 | struct nouveau_bo *bo = nouveau_gem_object(gem); |
72525b3f | 1004 | *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node); |
33dbc27f BS |
1005 | drm_gem_object_unreference_unlocked(gem); |
1006 | return 0; | |
1007 | } | |
1008 | ||
1009 | return -ENOENT; | |
1010 | } |