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[GitHub/exynos8895/android_kernel_samsung_universal8895.git] / drivers / net / wireless / bcmdhd4361 / include / event_log_payload.h
CommitLineData
1cac41cb
MB		 1/*
2 * EVENT_LOG System Definitions
3 *
4 * This file describes the payloads of event log entries that are data buffers
5 * rather than formatted string entries. The contents are generally XTLVs.
6 *
7 * Copyright (C) 1999-2019, Broadcom.
8 *
9 * Unless you and Broadcom execute a separate written software license
10 * agreement governing use of this software, this software is licensed to you
11 * under the terms of the GNU General Public License version 2 (the "GPL"),
12 * available at http://www.broadcom.com/licenses/GPLv2.php, with the
13 * following added to such license:
14 *
15 * As a special exception, the copyright holders of this software give you
16 * permission to link this software with independent modules, and to copy and
17 * distribute the resulting executable under terms of your choice, provided that
18 * you also meet, for each linked independent module, the terms and conditions of
19 * the license of that module. An independent module is a module which is not
20 * derived from this software. The special exception does not apply to any
21 * modifications of the software.
22 *
23 * Notwithstanding the above, under no circumstances may you combine this
24 * software in any way with any other Broadcom software provided under a license
25 * other than the GPL, without Broadcom's express prior written consent.
26 *
27 *
28 * <<Broadcom-WL-IPTag/Open:>>
29 *
5a068558 30 * $Id: event_log_payload.h 768232 2018-06-19 05:28:22Z $
1cac41cb
MB		 31 */
32
33#ifndef _EVENT_LOG_PAYLOAD_H_
34#define _EVENT_LOG_PAYLOAD_H_
35
36#include <typedefs.h>
37#include <bcmutils.h>
38#include <ethernet.h>
39#include <event_log_tag.h>
40
41#define EVENT_LOG_XTLV_ID_STR 0 /**< XTLV ID for a string */
42#define EVENT_LOG_XTLV_ID_TXQ_SUM 1 /**< XTLV ID for txq_summary_t */
43#define EVENT_LOG_XTLV_ID_SCBDATA_SUM 2 /**< XTLV ID for cb_subq_summary_t */
44#define EVENT_LOG_XTLV_ID_SCBDATA_AMPDU_TX_SUM 3 /**< XTLV ID for scb_ampdu_tx_summary_t */
45#define EVENT_LOG_XTLV_ID_BSSCFGDATA_SUM 4 /**< XTLV ID for bsscfg_q_summary_t */
46#define EVENT_LOG_XTLV_ID_UCTXSTATUS 5 /**< XTLV ID for ucode TxStatus array */
47#define EVENT_LOG_XTLV_ID_TXQ_SUM_V2 6 /**< XTLV ID for txq_summary_v2_t */
48
49/**
50 * An XTLV holding a string
51 * String is not null terminated, length is the XTLV len.
52 */
53typedef struct xtlv_string {
54 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_STR */
55 uint16 len; /* XTLV Len (String length) */
56 char str[1]; /* var len array characters */
57} xtlv_string_t;
58
59#define XTLV_STRING_FULL_LEN(str_len) (BCM_XTLV_HDR_SIZE + (str_len) * sizeof(char))
60
61/**
62 * Summary for a single TxQ context
63 * Two of these will be used per TxQ context---one for the high TxQ, and one for
64 * the low txq that contains DMA prepared pkts. The high TxQ is a full multi-precidence
65 * queue and also has a BSSCFG map to identify the BSSCFGS associated with the queue context.
66 * The low txq counterpart does not populate the BSSCFG map.
67 * The excursion queue will have no bsscfgs associated and is the first queue dumped.
68 */
69typedef struct txq_summary {
70 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_TXQ_SUM */
71 uint16 len; /* XTLV Len */
72 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */
73 uint32 stopped; /* flow control bitmap */
74 uint8 prec_count; /* count of precedences/fifos and len of following array */
75 uint8 pad;
76 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */
77} txq_summary_t;
78
79#define TXQ_SUMMARY_LEN (OFFSETOF(txq_summary_t, plen))
80#define TXQ_SUMMARY_FULL_LEN(num_q) (TXQ_SUMMARY_LEN + (num_q) * sizeof(uint16))
81
82typedef struct txq_summary_v2 {
83 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_TXQ_SUM_V2 */
84 uint16 len; /* XTLV Len */
85 uint32 bsscfg_map; /* bitmap of bsscfg indexes associated with this queue */
86 uint32 stopped; /* flow control bitmap */
87 uint32 hw_stopped; /* flow control bitmap */
88 uint8 prec_count; /* count of precedences/fifos and len of following array */
89 uint8 pad;
90 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */
91} txq_summary_v2_t;
92
93#define TXQ_SUMMARY_V2_LEN (OFFSETOF(txq_summary_v2_t, plen))
94#define TXQ_SUMMARY_V2_FULL_LEN(num_q) (TXQ_SUMMARY_V2_LEN + (num_q) * sizeof(uint16))
95
96/**
97 * Summary for tx datapath of an SCB cubby
98 * This is a generic summary structure (one size fits all) with
99 * a cubby ID and sub-ID to differentiate SCB cubby types and possible sub-queues.
100 */
101typedef struct scb_subq_summary {
102 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_SCBDATA_SUM */
103 uint16 len; /* XTLV Len */
104 uint32 flags; /* cubby specficic flags */
105 uint8 cubby_id; /* ID registered for cubby */
106 uint8 sub_id; /* sub ID if a cubby has more than one queue */
107 uint8 prec_count; /* count of precedences/fifos and len of following array */
108 uint8 pad;
109 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */
110} scb_subq_summary_t;
111
112#define SCB_SUBQ_SUMMARY_LEN (OFFSETOF(scb_subq_summary_t, plen))
113#define SCB_SUBQ_SUMMARY_FULL_LEN(num_q) (SCB_SUBQ_SUMMARY_LEN + (num_q) * sizeof(uint16))
114
115/* scb_subq_summary_t.flags for APPS */
116#define SCBDATA_APPS_F_PS 0x00000001
117#define SCBDATA_APPS_F_PSPEND 0x00000002
118#define SCBDATA_APPS_F_INPVB 0x00000004
119#define SCBDATA_APPS_F_APSD_USP 0x00000008
120#define SCBDATA_APPS_F_TXBLOCK 0x00000010
121#define SCBDATA_APPS_F_APSD_HPKT_TMR 0x00000020
122#define SCBDATA_APPS_F_APSD_TX_PEND 0x00000040
123#define SCBDATA_APPS_F_INTRANS 0x00000080
124#define SCBDATA_APPS_F_OFF_PEND 0x00000100
125#define SCBDATA_APPS_F_OFF_BLOCKED 0x00000200
126#define SCBDATA_APPS_F_OFF_IN_PROG 0x00000400
127
128/**
129 * Summary for tx datapath AMPDU SCB cubby
130 * This is a specific data structure to describe the AMPDU datapath state for an SCB
131 * used instead of scb_subq_summary_t.
132 * Info is for one TID, so one will be dumped per BA TID active for an SCB.
133 */
134typedef struct scb_ampdu_tx_summary {
135 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_SCBDATA_AMPDU_TX_SUM */
136 uint16 len; /* XTLV Len */
137 uint32 flags; /* misc flags */
138 uint8 tid; /* initiator TID (priority) */
139 uint8 ba_state; /* internal BA state */
140 uint8 bar_cnt; /* number of bars sent with no progress */
141 uint8 retry_bar; /* reason code if bar to be retried at watchdog */
142 uint16 barpending_seq; /* seqnum for bar */
143 uint16 bar_ackpending_seq; /* seqnum of bar for which ack is pending */
144 uint16 start_seq; /* seqnum of the first unacknowledged packet */
145 uint16 max_seq; /* max unacknowledged seqnum sent */
146 uint32 released_bytes_inflight; /* Number of bytes pending in bytes */
147 uint32 released_bytes_target;
148} scb_ampdu_tx_summary_t;
149
150/* scb_ampdu_tx_summary.flags defs */
151#define SCBDATA_AMPDU_TX_F_BAR_ACKPEND 0x00000001 /* bar_ackpending */
152
153/** XTLV stuct to summarize a BSSCFG's packet queue */
154typedef struct bsscfg_q_summary {
155 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_BSSCFGDATA_SUM */
156 uint16 len; /* XTLV Len */
157 struct ether_addr BSSID; /* BSSID */
158 uint8 bsscfg_idx; /* bsscfg index */
159 uint8 type; /* bsscfg type enumeration: BSSCFG_TYPE_XXX */
160 uint8 subtype; /* bsscfg subtype enumeration: BSSCFG_SUBTYPE_XXX */
161 uint8 prec_count; /* count of precedences/fifos and len of following array */
162 uint16 plen[1]; /* var len array of lengths of each prec/fifo in the queue */
163} bsscfg_q_summary_t;
164
165#define BSSCFG_Q_SUMMARY_LEN (OFFSETOF(bsscfg_q_summary_t, plen))
166#define BSSCFG_Q_SUMMARY_FULL_LEN(num_q) (BSSCFG_Q_SUMMARY_LEN + (num_q) * sizeof(uint16))
167
168/**
169 * An XTLV holding a TxStats array
170 * TxStatus entries are 8 or 16 bytes, size in words (2 or 4) givent in
171 * entry_size field.
172 * Array is uint32 words
173 */
174typedef struct xtlv_uc_txs {
175 uint16 id; /* XTLV ID: EVENT_LOG_XTLV_ID_UCTXSTATUS */
176 uint16 len; /* XTLV Len */
177 uint8 entry_size; /* num uint32 words per entry */
178 uint8 pad[3]; /* reserved, zero */
179 uint32 w[1]; /* var len array of words */
180} xtlv_uc_txs_t;
181
182#define XTLV_UCTXSTATUS_LEN (OFFSETOF(xtlv_uc_txs_t, w))
183#define XTLV_UCTXSTATUS_FULL_LEN(words) (XTLV_UCTXSTATUS_LEN + (words) * sizeof(uint32))
184
185#define SCAN_SUMMARY_VERSION 1
186/* Scan flags */
187#define SCAN_SUM_CHAN_INFO 0x1
188/* Scan_sum flags */
189#define BAND5G_SIB_ENAB 0x2
190#define BAND2G_SIB_ENAB 0x4
191#define PARALLEL_SCAN 0x8
192#define SCAN_ABORT 0x10
193
194/* scan_channel_info flags */
195#define ACTIVE_SCAN_SCN_SUM 0x2
196#define SCAN_SUM_WLC_CORE0 0x4
197#define SCAN_SUM_WLC_CORE1 0x8
198#define HOME_CHAN 0x10
199
200typedef struct wl_scan_ssid_info
201{
202 uint8 ssid_len; /* the length of SSID */
203 uint8 ssid[32]; /* SSID string */
204} wl_scan_ssid_info_t;
205
206typedef struct wl_scan_channel_info {
207 uint16 chanspec; /* chanspec scanned */
208 uint16 reserv;
209 uint32 start_time; /* Scan start time in
210 * milliseconds for the chanspec
211 * or home_dwell time start
212 */
213 uint32 end_time; /* Scan end time in
214 * milliseconds for the chanspec
215 * or home_dwell time end
216 */
217 uint16 probe_count; /* No of probes sent out. For future use
218 */
219 uint16 scn_res_count; /* Count of scan_results found per
220 * channel. For future use
221 */
222} wl_scan_channel_info_t;
223
224typedef struct wl_scan_summary_info {
225 uint32 total_chan_num; /* Total number of channels scanned */
226 uint32 scan_start_time; /* Scan start time in milliseconds */
227 uint32 scan_end_time; /* Scan end time in milliseconds */
228 wl_scan_ssid_info_t ssid[1]; /* SSID being scanned in current
229 * channel. For future use
230 */
231} wl_scan_summary_info_t;
232
233struct wl_scan_summary {
234 uint8 version; /* Version */
235 uint8 reserved;
236 uint16 len; /* Length of the data buffer including SSID
237 * list.
238 */
239 uint16 sync_id; /* Scan Sync ID */
240 uint16 scan_flags; /* flags [0] or SCAN_SUM_CHAN_INFO = */
241 /* channel_info, if not set */
242 /* it is scan_summary_info */
243 /* when channel_info is used, */
244 /* the following flag bits are overridden: */
245 /* flags[1] or ACTIVE_SCAN_SCN_SUM = active channel if set */
246 /* passive if not set */
247 /* flags[2] or WLC_CORE0 = if set, represents wlc_core0 */
248 /* flags[3] or WLC_CORE1 = if set, represents wlc_core1 */
249 /* flags[4] or HOME_CHAN = if set, represents home-channel */
250 /* flags[5:15] = reserved */
251 /* when scan_summary_info is used, */
252 /* the following flag bits are used: */
253 /* flags[1] or BAND5G_SIB_ENAB = */
254 /* allowSIBParallelPassiveScan on 5G band */
255 /* flags[2] or BAND2G_SIB_ENAB = */
256 /* allowSIBParallelPassiveScan on 2G band */
257 /* flags[3] or PARALLEL_SCAN = Parallel scan enabled or not */
258 /* flags[4] or SCAN_ABORT = SCAN_ABORTED scenario */
259 /* flags[5:15] = reserved */
260 union {
261 wl_scan_channel_info_t scan_chan_info; /* scan related information
262 * for each channel scanned
263 */
264 wl_scan_summary_info_t scan_sum_info; /* Cumulative scan related
265 * information.
266 */
267 } u;
268};
269
270/* Channel switch log record structure
271 * Host may map the following structure on channel switch event log record
272 * received from dongle. Note that all payload entries in event log record are
273 * uint32/int32.
274 */
275typedef struct wl_chansw_event_log_record {
276 uint32 time; /* Time in us */
277 uint32 old_chanspec; /* Old channel spec */
278 uint32 new_chanspec; /* New channel spec */
279 uint32 chansw_reason; /* Reason for channel change */
280 int32 dwell_time;
281} wl_chansw_event_log_record_t;
282
283typedef struct wl_chansw_event_log_record_v2 {
284 uint32 time; /* Time in us */
285 uint32 old_chanspec; /* Old channel spec */
286 uint32 new_chanspec; /* New channel spec */
287 uint32 chansw_reason; /* Reason for channel change */
288 int32 dwell_time;
289 uint32 core;
290 int32 phychanswtime; /* channel switch time */
291} wl_chansw_event_log_record_v2_t;
292
293/* Sub-block type for EVENT_LOG_TAG_AMPDU_DUMP */
294typedef enum {
295 WL_AMPDU_STATS_TYPE_RXMCSx1 = 0, /* RX MCS rate (Nss = 1) */
296 WL_AMPDU_STATS_TYPE_RXMCSx2 = 1,
297 WL_AMPDU_STATS_TYPE_RXMCSx3 = 2,
298 WL_AMPDU_STATS_TYPE_RXMCSx4 = 3,
299 WL_AMPDU_STATS_TYPE_RXVHTx1 = 4, /* RX VHT rate (Nss = 1) */
300 WL_AMPDU_STATS_TYPE_RXVHTx2 = 5,
301 WL_AMPDU_STATS_TYPE_RXVHTx3 = 6,
302 WL_AMPDU_STATS_TYPE_RXVHTx4 = 7,
303 WL_AMPDU_STATS_TYPE_TXMCSx1 = 8, /* TX MCS rate (Nss = 1) */
304 WL_AMPDU_STATS_TYPE_TXMCSx2 = 9,
305 WL_AMPDU_STATS_TYPE_TXMCSx3 = 10,
306 WL_AMPDU_STATS_TYPE_TXMCSx4 = 11,
307 WL_AMPDU_STATS_TYPE_TXVHTx1 = 12, /* TX VHT rate (Nss = 1) */
308 WL_AMPDU_STATS_TYPE_TXVHTx2 = 13,
309 WL_AMPDU_STATS_TYPE_TXVHTx3 = 14,
310 WL_AMPDU_STATS_TYPE_TXVHTx4 = 15,
311 WL_AMPDU_STATS_TYPE_RXMCSSGI = 16, /* RX SGI usage (for all MCS rates) */
312 WL_AMPDU_STATS_TYPE_TXMCSSGI = 17, /* TX SGI usage (for all MCS rates) */
313 WL_AMPDU_STATS_TYPE_RXVHTSGI = 18, /* RX SGI usage (for all VHT rates) */
314 WL_AMPDU_STATS_TYPE_TXVHTSGI = 19, /* TX SGI usage (for all VHT rates) */
315 WL_AMPDU_STATS_TYPE_RXMCSPER = 20, /* RX PER (for all MCS rates) */
316 WL_AMPDU_STATS_TYPE_TXMCSPER = 21, /* TX PER (for all MCS rates) */
317 WL_AMPDU_STATS_TYPE_RXVHTPER = 22, /* RX PER (for all VHT rates) */
318 WL_AMPDU_STATS_TYPE_TXVHTPER = 23, /* TX PER (for all VHT rates) */
319 WL_AMPDU_STATS_TYPE_RXDENS = 24, /* RX AMPDU density */
320 WL_AMPDU_STATS_TYPE_TXDENS = 25, /* TX AMPDU density */
321 WL_AMPDU_STATS_TYPE_RXMCSOK = 26, /* RX all MCS rates */
322 WL_AMPDU_STATS_TYPE_RXVHTOK = 27, /* RX all VHT rates */
323 WL_AMPDU_STATS_TYPE_TXMCSALL = 28, /* TX all MCS rates */
324 WL_AMPDU_STATS_TYPE_TXVHTALL = 29, /* TX all VHT rates */
325 WL_AMPDU_STATS_TYPE_TXMCSOK = 30, /* TX all MCS rates */
326 WL_AMPDU_STATS_TYPE_TXVHTOK = 31, /* TX all VHT rates */
327 WL_AMPDU_STATS_MAX_CNTS = 64
328} wl_ampdu_stat_enum_t;
329typedef struct {
330 uint16 type; /* AMPDU statistics sub-type */
331 uint16 len; /* Number of 32-bit counters */
332 uint32 counters[WL_AMPDU_STATS_MAX_CNTS];
333} wl_ampdu_stats_generic_t;
334
335typedef wl_ampdu_stats_generic_t wl_ampdu_stats_rx_t;
336typedef wl_ampdu_stats_generic_t wl_ampdu_stats_tx_t;
337
338typedef struct {
339 uint16 type; /* AMPDU statistics sub-type */
340 uint16 len; /* Number of 32-bit counters + 2 */
341 uint32 total_ampdu;
342 uint32 total_mpdu;
343 uint32 aggr_dist[WL_AMPDU_STATS_MAX_CNTS + 1];
344} wl_ampdu_stats_aggrsz_t;
345
346/* Sub-block type for EVENT_LOG_TAG_MSCHPROFILE */
347#define WL_MSCH_PROFILER_START 0 /* start event check */
348#define WL_MSCH_PROFILER_EXIT 1 /* exit event check */
349#define WL_MSCH_PROFILER_REQ 2 /* request event */
350#define WL_MSCH_PROFILER_CALLBACK 3 /* call back event */
351#define WL_MSCH_PROFILER_MESSAGE 4 /* message event */
352#define WL_MSCH_PROFILER_PROFILE_START 5
353#define WL_MSCH_PROFILER_PROFILE_END 6
354#define WL_MSCH_PROFILER_REQ_HANDLE 7
355#define WL_MSCH_PROFILER_REQ_ENTITY 8
356#define WL_MSCH_PROFILER_CHAN_CTXT 9
357#define WL_MSCH_PROFILER_EVENT_LOG 10
358#define WL_MSCH_PROFILER_REQ_TIMING 11
359#define WL_MSCH_PROFILER_TYPE_MASK 0x00ff
360#define WL_MSCH_PROFILER_WLINDEX_SHIFT 8
361#define WL_MSCH_PROFILER_WLINDEX_MASK 0x0f00
362#define WL_MSCH_PROFILER_VER_SHIFT 12
363#define WL_MSCH_PROFILER_VER_MASK 0xf000
364
365/* MSCH Event data current verion */
366#define WL_MSCH_PROFILER_VER 2
367
368/* msch version history */
369#define WL_MSCH_PROFILER_RSDB_VER 1
370#define WL_MSCH_PROFILER_REPORT_VER 2
371
372/* msch collect header size */
373#define WL_MSCH_PROFILE_HEAD_SIZE OFFSETOF(msch_collect_tlv_t, value)
374
375/* msch event log header size */
376#define WL_MSCH_EVENT_LOG_HEAD_SIZE OFFSETOF(msch_event_log_profiler_event_data_t, data)
377
378/* MSCH data buffer size */
379#define WL_MSCH_PROFILER_BUFFER_SIZE 512
380
381/* request type used in wlc_msch_req_param_t struct */
382#define WL_MSCH_RT_BOTH_FIXED 0 /* both start and end time is fixed */
383#define WL_MSCH_RT_START_FLEX 1 /* start time is flexible and duration is fixed */
384#define WL_MSCH_RT_DUR_FLEX 2 /* start time is fixed and end time is flexible */
385#define WL_MSCH_RT_BOTH_FLEX 3 /* Both start and duration is flexible */
386
387/* Flags used in wlc_msch_req_param_t struct */
388#define WL_MSCH_REQ_FLAGS_CHAN_CONTIGUOUS (1 << 0) /* Don't break up channels in chanspec_list */
389#define WL_MSCH_REQ_FLAGS_MERGE_CONT_SLOTS (1 << 1) /* No slot end if slots are continous */
390#define WL_MSCH_REQ_FLAGS_PREMTABLE (1 << 2) /* Req can be pre-empted by PREMT_CURTS req */
391#define WL_MSCH_REQ_FLAGS_PREMT_CURTS (1 << 3) /* Pre-empt request at the end of curts */
392#define WL_MSCH_REQ_FLAGS_PREMT_IMMEDIATE (1 << 4) /* Pre-empt cur_ts immediately */
393
394/* Requested slot Callback states
395 * req->pend_slot/cur_slot->flags
396 */
397#define WL_MSCH_RC_FLAGS_ONCHAN_FIRE (1 << 0)
398#define WL_MSCH_RC_FLAGS_START_FIRE_DONE (1 << 1)
399#define WL_MSCH_RC_FLAGS_END_FIRE_DONE (1 << 2)
400#define WL_MSCH_RC_FLAGS_ONFIRE_DONE (1 << 3)
401#define WL_MSCH_RC_FLAGS_SPLIT_SLOT_START (1 << 4)
402#define WL_MSCH_RC_FLAGS_SPLIT_SLOT_END (1 << 5)
403#define WL_MSCH_RC_FLAGS_PRE_ONFIRE_DONE (1 << 6)
404
405/* Request entity flags */
406#define WL_MSCH_ENTITY_FLAG_MULTI_INSTANCE (1 << 0)
407
408/* Request Handle flags */
409#define WL_MSCH_REQ_HDL_FLAGS_NEW_REQ (1 << 0) /* req_start callback */
410
411/* MSCH state flags (msch_info->flags) */
412#define WL_MSCH_STATE_IN_TIEMR_CTXT 0x1
413#define WL_MSCH_STATE_SCHD_PENDING 0x2
414
415/* MSCH callback type */
416#define WL_MSCH_CT_REQ_START 0x1
417#define WL_MSCH_CT_ON_CHAN 0x2
418#define WL_MSCH_CT_SLOT_START 0x4
419#define WL_MSCH_CT_SLOT_END 0x8
420#define WL_MSCH_CT_SLOT_SKIP 0x10
421#define WL_MSCH_CT_OFF_CHAN 0x20
422#define WL_MSCH_CT_OFF_CHAN_DONE 0x40
423#define WL_MSCH_CT_REQ_END 0x80
424#define WL_MSCH_CT_PARTIAL 0x100
425#define WL_MSCH_CT_PRE_ONCHAN 0x200
426#define WL_MSCH_CT_PRE_REQ_START 0x400
427
428/* MSCH command bits */
429#define WL_MSCH_CMD_ENABLE_BIT 0x01
430#define WL_MSCH_CMD_PROFILE_BIT 0x02
431#define WL_MSCH_CMD_CALLBACK_BIT 0x04
432#define WL_MSCH_CMD_REGISTER_BIT 0x08
433#define WL_MSCH_CMD_ERROR_BIT 0x10
434#define WL_MSCH_CMD_DEBUG_BIT 0x20
435#define WL_MSCH_CMD_INFOM_BIT 0x40
436#define WL_MSCH_CMD_TRACE_BIT 0x80
437#define WL_MSCH_CMD_ALL_BITS 0xfe
438#define WL_MSCH_CMD_SIZE_MASK 0x00ff0000
439#define WL_MSCH_CMD_SIZE_SHIFT 16
440#define WL_MSCH_CMD_VER_MASK 0xff000000
441#define WL_MSCH_CMD_VER_SHIFT 24
442
443/* maximum channels returned by the get valid channels iovar */
444#define WL_MSCH_NUMCHANNELS 64
445
446typedef struct msch_collect_tlv {
447 uint16 type;
448 uint16 size;
449 char value[1];
450} msch_collect_tlv_t;
451
452typedef struct msch_profiler_event_data {
453 uint32 time_lo; /* Request time */
454 uint32 time_hi;
455} msch_profiler_event_data_t;
456
457typedef struct msch_start_profiler_event_data {
458 uint32 time_lo; /* Request time */
459 uint32 time_hi;
460 uint32 status;
461} msch_start_profiler_event_data_t;
462
463typedef struct msch_message_profiler_event_data {
464 uint32 time_lo; /* Request time */
465 uint32 time_hi;
466 char message[1]; /* message */
467} msch_message_profiler_event_data_t;
468
469typedef struct msch_event_log_profiler_event_data {
470 uint32 time_lo; /* Request time */
471 uint32 time_hi;
472 event_log_hdr_t hdr; /* event log header */
473 uint32 data[9]; /* event data */
474} msch_event_log_profiler_event_data_t;
475
476typedef struct msch_req_param_profiler_event_data {
477 uint16 flags; /* Describe various request properties */
478 uint8 req_type; /* Describe start and end time flexiblilty */
479 uint8 priority; /* Define the request priority */
480 uint32 start_time_l; /* Requested start time offset in us unit */
481 uint32 start_time_h;
482 uint32 duration; /* Requested duration in us unit */
483 uint32 interval; /* Requested periodic interval in us unit,
484 * 0 means non-periodic
485 */
486 union {
487 uint32 dur_flex; /* MSCH_REG_DUR_FLEX, min_dur = duration - dur_flex */
488 struct {
489 uint32 min_dur; /* min duration for traffic, maps to home_time */
490 uint32 max_away_dur; /* max acceptable away dur, maps to home_away_time */
491 uint32 hi_prio_time_l;
492 uint32 hi_prio_time_h;
493 uint32 hi_prio_interval; /* repeated high priority interval */
494 } bf;
495 } flex;
496} msch_req_param_profiler_event_data_t;
497
498typedef struct msch_req_timing_profiler_event_data {
499 uint32 p_req_timing;
500 uint32 p_prev;
501 uint32 p_next;
502 uint16 flags;
503 uint16 timeslot_ptr;
504 uint32 fire_time_l;
505 uint32 fire_time_h;
506 uint32 pre_start_time_l;
507 uint32 pre_start_time_h;
508 uint32 start_time_l;
509 uint32 start_time_h;
510 uint32 end_time_l;
511 uint32 end_time_h;
512 uint32 p_timeslot;
513} msch_req_timing_profiler_event_data_t;
514
515typedef struct msch_chan_ctxt_profiler_event_data {
516 uint32 p_chan_ctxt;
517 uint32 p_prev;
518 uint32 p_next;
519 uint16 chanspec;
520 uint16 bf_sch_pending;
521 uint32 bf_link_prev;
522 uint32 bf_link_next;
523 uint32 onchan_time_l;
524 uint32 onchan_time_h;
525 uint32 actual_onchan_dur_l;
526 uint32 actual_onchan_dur_h;
527 uint32 pend_onchan_dur_l;
528 uint32 pend_onchan_dur_h;
529 uint16 req_entity_list_cnt;
530 uint16 req_entity_list_ptr;
531 uint16 bf_entity_list_cnt;
532 uint16 bf_entity_list_ptr;
533 uint32 bf_skipped_count;
534} msch_chan_ctxt_profiler_event_data_t;
535
536typedef struct msch_req_entity_profiler_event_data {
537 uint32 p_req_entity;
538 uint32 req_hdl_link_prev;
539 uint32 req_hdl_link_next;
540 uint32 chan_ctxt_link_prev;
541 uint32 chan_ctxt_link_next;
542 uint32 rt_specific_link_prev;
543 uint32 rt_specific_link_next;
544 uint32 start_fixed_link_prev;
545 uint32 start_fixed_link_next;
546 uint32 both_flex_list_prev;
547 uint32 both_flex_list_next;
548 uint16 chanspec;
549 uint16 priority;
550 uint16 cur_slot_ptr;
551 uint16 pend_slot_ptr;
552 uint16 pad;
553 uint16 chan_ctxt_ptr;
554 uint32 p_chan_ctxt;
555 uint32 p_req_hdl;
556 uint32 bf_last_serv_time_l;
557 uint32 bf_last_serv_time_h;
558 uint16 onchan_chn_idx;
559 uint16 cur_chn_idx;
560 uint32 flags;
561 uint32 actual_start_time_l;
562 uint32 actual_start_time_h;
563 uint32 curts_fire_time_l;
564 uint32 curts_fire_time_h;
565} msch_req_entity_profiler_event_data_t;
566
567typedef struct msch_req_handle_profiler_event_data {
568 uint32 p_req_handle;
569 uint32 p_prev;
570 uint32 p_next;
571 uint32 cb_func;
572 uint32 cb_ctxt;
573 uint16 req_param_ptr;
574 uint16 req_entity_list_cnt;
575 uint16 req_entity_list_ptr;
576 uint16 chan_cnt;
577 uint32 flags;
578 uint16 chanspec_list;
579 uint16 chanspec_cnt;
580 uint16 chan_idx;
581 uint16 last_chan_idx;
582 uint32 req_time_l;
583 uint32 req_time_h;
584} msch_req_handle_profiler_event_data_t;
585
586typedef struct msch_profiler_profiler_event_data {
587 uint32 time_lo; /* Request time */
588 uint32 time_hi;
589 uint32 free_req_hdl_list;
590 uint32 free_req_entity_list;
591 uint32 free_chan_ctxt_list;
592 uint32 free_chanspec_list;
593 uint16 cur_msch_timeslot_ptr;
594 uint16 next_timeslot_ptr;
595 uint32 p_cur_msch_timeslot;
596 uint32 p_next_timeslot;
597 uint32 cur_armed_timeslot;
598 uint32 flags;
599 uint32 ts_id;
600 uint32 service_interval;
601 uint32 max_lo_prio_interval;
602 uint16 flex_list_cnt;
603 uint16 msch_chanspec_alloc_cnt;
604 uint16 msch_req_entity_alloc_cnt;
605 uint16 msch_req_hdl_alloc_cnt;
606 uint16 msch_chan_ctxt_alloc_cnt;
607 uint16 msch_timeslot_alloc_cnt;
608 uint16 msch_req_hdl_list_cnt;
609 uint16 msch_req_hdl_list_ptr;
610 uint16 msch_chan_ctxt_list_cnt;
611 uint16 msch_chan_ctxt_list_ptr;
612 uint16 msch_req_timing_list_cnt;
613 uint16 msch_req_timing_list_ptr;
614 uint16 msch_start_fixed_list_cnt;
615 uint16 msch_start_fixed_list_ptr;
616 uint16 msch_both_flex_req_entity_list_cnt;
617 uint16 msch_both_flex_req_entity_list_ptr;
618 uint16 msch_start_flex_list_cnt;
619 uint16 msch_start_flex_list_ptr;
620 uint16 msch_both_flex_list_cnt;
621 uint16 msch_both_flex_list_ptr;
622 uint32 slotskip_flag;
623} msch_profiler_profiler_event_data_t;
624
625typedef struct msch_req_profiler_event_data {
626 uint32 time_lo; /* Request time */
627 uint32 time_hi;
628 uint16 chanspec_cnt;
629 uint16 chanspec_ptr;
630 uint16 req_param_ptr;
631 uint16 pad;
632} msch_req_profiler_event_data_t;
633
634typedef struct msch_callback_profiler_event_data {
635 uint32 time_lo; /* Request time */
636 uint32 time_hi;
637 uint16 type; /* callback type */
638 uint16 chanspec; /* actual chanspec, may different with requested one */
639 uint32 start_time_l; /* time slot start time low 32bit */
640 uint32 start_time_h; /* time slot start time high 32bit */
641 uint32 end_time_l; /* time slot end time low 32 bit */
642 uint32 end_time_h; /* time slot end time high 32 bit */
643 uint32 timeslot_id; /* unique time slot id */
644 uint32 p_req_hdl;
645 uint32 onchan_idx; /* Current channel index */
646 uint32 cur_chan_seq_start_time_l; /* start time of current sequence */
647 uint32 cur_chan_seq_start_time_h;
648} msch_callback_profiler_event_data_t;
649
650typedef struct msch_timeslot_profiler_event_data {
651 uint32 p_timeslot;
652 uint32 timeslot_id;
653 uint32 pre_start_time_l;
654 uint32 pre_start_time_h;
655 uint32 end_time_l;
656 uint32 end_time_h;
657 uint32 sch_dur_l;
658 uint32 sch_dur_h;
659 uint32 p_chan_ctxt;
660 uint32 fire_time_l;
661 uint32 fire_time_h;
662 uint32 state;
663} msch_timeslot_profiler_event_data_t;
664
665typedef struct msch_register_params {
666 uint16 wlc_index; /* Optional wlc index */
667 uint16 flags; /* Describe various request properties */
668 uint32 req_type; /* Describe start and end time flexiblilty */
669 uint16 id; /* register id */
670 uint16 priority; /* Define the request priority */
671 uint32 start_time; /* Requested start time offset in ms unit */
672 uint32 duration; /* Requested duration in ms unit */
673 uint32 interval; /* Requested periodic interval in ms unit,
674 * 0 means non-periodic
675 */
676 uint32 dur_flex; /* MSCH_REG_DUR_FLEX, min_dur = duration - dur_flex */
677 uint32 min_dur; /* min duration for traffic, maps to home_time */
678 uint32 max_away_dur; /* max acceptable away dur, maps to home_away_time */
679 uint32 hi_prio_time;
680 uint32 hi_prio_interval; /* repeated high priority interval */
681 uint32 chanspec_cnt;
682 uint16 chanspec_list[WL_MSCH_NUMCHANNELS];
683} msch_register_params_t;
684
5a068558
MB		 685typedef struct {
686 uint32 txallfrm; /**< total number of frames sent, incl. Data, ACK, RTS, CTS,
687 * Control Management (includes retransmissions)
688 */
689 uint32 rxrsptmout; /**< number of response timeouts for transmitted frames
690 * expecting a response
691 */
692 uint32 rxstrt; /**< number of received frames with a good PLCP */
693 uint32 rxbadplcp; /**< number of parity check of the PLCP header failed */
694 uint32 rxcrsglitch; /**< PHY was able to correlate the preamble but not the header */
695 uint32 rxnodelim; /**< number of no valid delimiter detected by ampdu parser */
696 uint32 bphy_badplcp; /**< number of bad PLCP reception on BPHY rate */
697 uint32 bphy_rxcrsglitch; /**< PHY count of bphy glitches */
698 uint32 rxbadfcs; /**< number of frames for which the CRC check failed in the MAC */
699 uint32 rxanyerr; /**< Any RX error that is not counted by other counters. */
700 uint32 rxbeaconmbss; /**< beacons received from member of BSS */
701 uint32 rxdtucastmbss; /**< number of received DATA frames with good FCS and matching RA */
702 uint32 rxdtocast; /**< number of received DATA frames (good FCS and no matching RA) */
703 uint32 rxtoolate; /**< receive too late */
704 uint32 goodfcs; /**< Good fcs counters */
705 uint32 rxf0ovfl; /** < Rx FIFO0 overflow counters information */
706 uint32 rxf1ovfl; /** < Rx FIFO1 overflow counters information */
707} phy_periodic_counters_v1_t;
708
709typedef struct phycal_log_cmn {
710 uint16 chanspec; /* Current phy chanspec */
711 uint8 last_cal_reason; /* Last Cal Reason */
712 uint8 pad1; /* Padding byte to align with word */
713 uint last_cal_time; /* Last cal time in sec */
714} phycal_log_cmn_t;
715
716typedef struct phycal_log_core {
717 uint16 ofdm_txa; /* OFDM Tx IQ Cal a coeff */
718 uint16 ofdm_txb; /* OFDM Tx IQ Cal b coeff */
719 uint16 ofdm_txd; /* contain di & dq */
720 uint16 bphy_txa; /* BPHY Tx IQ Cal a coeff */
721 uint16 bphy_txb; /* BPHY Tx IQ Cal b coeff */
722 uint16 bphy_txd; /* contain di & dq */
723
724 uint16 rxa; /* Rx IQ Cal A coeffecient */
725 uint16 rxb; /* Rx IQ Cal B coeffecient */
726 int32 rxs; /* FDIQ Slope coeffecient */
727
728 uint8 baseidx; /* TPC Base index */
729 uint8 adc_coeff_cap0_adcI; /* ADC CAP Cal Cap0 I */
730 uint8 adc_coeff_cap1_adcI; /* ADC CAP Cal Cap1 I */
731 uint8 adc_coeff_cap2_adcI; /* ADC CAP Cal Cap2 I */
732 uint8 adc_coeff_cap0_adcQ; /* ADC CAP Cal Cap0 Q */
733 uint8 adc_coeff_cap1_adcQ; /* ADC CAP Cal Cap1 Q */
734 uint8 adc_coeff_cap2_adcQ; /* ADC CAP Cal Cap2 Q */
735 uint8 pad; /* Padding byte to align with word */
736} phycal_log_core_t;
737
738#define PHYCAL_LOG_VER1 (1u)
739
740typedef struct phycal_log_v1 {
741 uint8 version; /* Logging structure version */
742 uint8 numcores; /* Numbe of cores for which core specific data present */
743 uint16 length; /* Length of the entire structure */
744 phycal_log_cmn_t phycal_log_cmn; /* Logging common structure */
745 /* This will be a variable length based on the numcores field defined above */
746 phycal_log_core_t phycal_log_core[1];
747} phycal_log_v1_t;
748
749typedef struct phy_periodic_log_cmn {
750 uint16 chanspec; /* Current phy chanspec */
751 uint16 vbatmeas; /* Measured VBAT sense value */
752 uint16 featureflag; /* Currently active feature flags */
753 int8 chiptemp; /* Chip temparature */
754 int8 femtemp; /* Fem temparature */
755
756 uint32 nrate; /* Current Tx nrate */
757
758 uint8 cal_phase_id; /* Current Multi phase cal ID */
759 uint8 rxchain; /* Rx Chain */
760 uint8 txchain; /* Tx Chain */
761 uint8 ofdm_desense; /* OFDM desense */
762
763 uint8 bphy_desense; /* BPHY desense */
764 uint8 pll_lockstatus; /* PLL Lock status */
765 uint8 pad1; /* Padding byte to align with word */
766 uint8 pad2; /* Padding byte to align with word */
767
768 uint32 duration; /**< millisecs spent sampling this channel */
769 uint32 congest_ibss; /**< millisecs in our bss (presumably this traffic will */
770 /**< move if cur bss moves channels) */
771 uint32 congest_obss; /**< traffic not in our bss */
772 uint32 interference; /**< millisecs detecting a non 802.11 interferer. */
773
774} phy_periodic_log_cmn_t;
775
776typedef struct phy_periodic_log_core {
777 uint8 baseindxval; /* TPC Base index */
778 int8 tgt_pwr; /* Programmed Target power */
779 int8 estpwradj; /* Current Est Power Adjust value */
780 int8 crsmin_pwr; /* CRS Min/Noise power */
781 int8 rssi_per_ant; /* RSSI Per antenna */
782 int8 snr_per_ant; /* SNR Per antenna */
783 int8 pad1; /* Padding byte to align with word */
784 int8 pad2; /* Padding byte to align with word */
785} phy_periodic_log_core_t;
786
787#define PHY_PERIODIC_LOG_VER1 (1u)
788
789typedef struct phy_periodic_log_v1 {
790 uint8 version; /* Logging structure version */
791 uint8 numcores; /* Numbe of cores for which core specific data present */
792 uint16 length; /* Length of the entire structure */
793 phy_periodic_log_cmn_t phy_perilog_cmn;
794 phy_periodic_counters_v1_t counters_peri_log;
795 /* This will be a variable length based on the numcores field defined above */
796 phy_periodic_log_core_t phy_perilog_core[1];
797} phy_periodic_log_v1_t;
798
1cac41cb 799#endif /* _EVENT_LOG_PAYLOAD_H_ */