asoc: abox: check abox power domain status before resuming

[GitHub/MotorolaMobilityLLC/kernel-slsi.git] / arch / arm64 / boot / dts / exynos / exynos9610.dtsi

diff --git a/arch/arm64/boot/dts/exynos/exynos9610.dtsi b/arch/arm64/boot/dts/exynos/exynos9610.dtsi
index 0382b599827f886d91137c4c3fa5ce5214a673e4..000a2b074f441d37d03607ed1f9907b9654a020c 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos9610.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos9610.dtsi
@@ -118,7 +118,7 @@
        };
 
        chosen {
-               bootargs = "swiotlb=512 console=ram androidboot.dtbo_idx=0 skip_initramfs rootwait ro init=/init clk_ignore_unused bcm_setup=0xffffff90f8e00000 androidboot.hardware=exynos9610 androidboot.selinux=permissive androidboot.debug_level=0x4948 firmware_class.path=/vendor/firmware ecd_setup=disable reserve-fimc=0xffffff90f9fe0000 pmic_info=0x3 ccic_info=0x1 epx_activate=true";
+               bootargs = "swiotlb=512 console=ram rootwait ro init=/init clk_ignore_unused bcm_setup=0xffffff80f8e00000 androidboot.hardware=exynos9610 androidboot.debug_level=0x4948 firmware_class.path=/vendor/firmware ecd_setup=disable reserve-fimc=0xffffff80f9fe0000 pmic_info=0x3 ccic_info=0x1 epx_activate=true";
                linux,initrd-start = <0x84000000>;
                linux,initrd-end = <0x841FFFFF>;
        };
@@ -525,8 +525,8 @@
                        wakeup-mask {
                                mask = <0x40000000>, <0x0>,        <0x0>,        <0x0>,
                                       <0x0>,        <0x0>,        <0x0>,        <0x0>,
-                                      <0xD00D7E7E>, <0x500D7E7E>, <0x500D7E7E>, <0x0>,
-                                      <0xD00D7E7E>;
+                                      <0xD0097E7E>, <0x50097E7E>, <0x50097E7E>, <0x0>,
+                                      <0xD0097E7E>;
                                mask-offset = <0x610>;
                                stat-offset = <0x600>;
                        };
@@ -695,9 +695,22 @@
                                <0 170 0>, <0 171 0>, <0 172 0>,
                                <0 173 0>, <0 174 0>, <0 185 0>, <0 196 0>,
                                <0 197 0>, <0 226 0>, <0 227 0>, <0 228 0>,
-                               <0 269 0>, <0 270 0>, <0 272 0>, <0 278 0>,
+                               <0 270 0>, <0 272 0>, <0 278 0>,
                                <0 318 0>, <0 319 0>;
 
+               WB2AP_FEMCTRL_WLBT_00: WB2AP_FEMCTRL_WLBT_00 {
+                              samsung,pins = "gpm16-0";
+                              samsung,pin-function = <0x6>;
+                              samsung,pin-pud = <1>;
+                              samsung,pin-drv = <3>;
+                      };
+               WB2AP_FEMCTRL_WLBT_01: WB2AP_FEMCTRL_WLBT_01 {
+                                      samsung,pins = "gpm17-0";
+                                      samsung,pin-function = <0x6>;
+                                      samsung,pin-pud = <1>;
+                                      samsung,pin-drv = <3>;
+                      };
+
                wakeup-interrupt-controller {
                        compatible = "samsung,exynos7-wakeup-eint";
                };
@@ -2447,7 +2460,7 @@
                };
        };
 
-       watchdog_cl0@10050000 {
+       watchdog_cl0@10050000 { //WDT_CPUCL0
                compatible = "samsung,exynos7-wdt";
                reg = <0x0 0x10050000 0x100>;
                interrupts = <0 232 0>;
@@ -2458,6 +2471,18 @@
                index = <0>; /* if little cluster then index is 0*/
        };
 
+       watchdog_cl1@10060000 { //WDT_CPUCL1
+               compatible = "samsung,exynos8-wdt";
+               reg = <0x0 0x10060000 0x100>;
+               interrupts = <0 233 0>;
+               clocks = <&clock OSCCLK>, <&clock GATE_WDT_CLUSTER1_QCH>;
+               clock-names = "rate_watchdog", "gate_watchdog";
+               timeout-sec = <30>;
+               samsung,syscon-phandle = <&pmu_system_controller>;
+               index = <1>; /* if little cluster then index is 0*/
+               use_multistage_wdt;
+       };
+
        exynos_adc: adc@11C30000 {
                compatible = "samsung,exynos-adc-v3";
                reg = <0x0 0x11C30000 0x100>;
@@ -2664,6 +2689,7 @@
                iommus = <&sysmmu_abox>;
                pm_qos_int = <0 0 0 0 0>;
                pm_qos_aud = <1180000 800000 590000 394000 0>;
+               pd_name = "pd-dispaud";
 
                abox_rdma_0: abox_rdma@0x14A51000 {
                        compatible = "samsung,abox-rdma";
@@ -2719,7 +2745,7 @@
                        compatible = "samsung,abox-rdma";
                        reg = <0x0 0x14A51700 0x100>;
                        id = <7>;
-                       type = "realtime";
+                       type = "normal";
                };
 
                abox_wdma_0: abox_wdma@0x14A52000 {
@@ -3383,7 +3409,6 @@
                /* BAAW-P-APM-SHUB */
                baaw,baaw-p-apm-chub = <0x40300 0x40800 0x11900>;
                /* none, pass, os.checked.bin, Exynos9610.bin */
-               os-type = "os.checked_0.bin";
                reset-mode = "block";
        };
 
@@ -3427,6 +3452,10 @@
        /* MAILBOX_AP2WLBT */
        scsc_wifibt: scsc_wifibt@119c0000 {
                compatible = "samsung,scsc_wifibt";
+               
+               pinctrl-names = "default";
+               pinctrl-0=<&WB2AP_FEMCTRL_WLBT_00 &WB2AP_FEMCTRL_WLBT_01>;
+
                /* Mailbox Registers */
                reg = <0x0 0x119c0000 0x180>;
                /* 10.3.2 External GIC IRQ table */
@@ -3446,9 +3475,9 @@
                /* MIF / INT / CL0 / CL1 */
                /* this qos_table should be per-platform. Leave it here until we have multiple platfrom support */
                qos_table = <
-                        419000 100000 403000  728000  /* SCSC_QOS_MIN */
+                        419000 100000 403000  936000  /* SCSC_QOS_MIN */
                        1014000 533000 910000  1664000 /* SCSC_QOS_MED */
-                       2093000 667000 1534000 2392000 /* SCSC_QOS_MAX */
+                       2093000 667000 1742000 2314000 /* SCSC_QOS_MAX */
                            >;
                /* SMAPPER */
                smapper_num_banks = <11>;