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1b77cd64 WK |
1 | /* |
2 | * SAMSUNG EXYNOS9610 board camera device tree source | |
3 | * | |
4 | * Copyright (c) 2018 Samsung Electronics Co., Ltd. | |
5 | * http://www.samsung.com | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <dt-bindings/camera/fimc_is.h> | |
13 | ||
14 | / { | |
dd3f89b3 YN |
15 | fragment@camera { |
16 | target-path = "/"; | |
17 | __overlay__ { | |
1b77cd64 WK |
18 | fimc_is_flash_gpio: fimc-is-flash-gpio@0 { |
19 | compatible = "samsung,sensor-flash-gpio"; | |
20 | id = <0>; | |
21 | status = "okay"; | |
22 | ||
23 | torch-gpio = <&gpg3 1 0x1>; | |
24 | flash-gpio = <&gpg3 0 0x1>; | |
25 | }; | |
26 | ||
27 | fimc_is_sensor_2p7sq: fimc-is_sensor_2p7sq@47 { | |
28 | compatible = "samsung,sensor-module-2p7sq"; | |
29 | ||
30 | pinctrl-names = "pin0", "pin1", "pin2", "release"; | |
31 | pinctrl-0 = <>; | |
32 | pinctrl-1 = <&fimc_is_mclk0_out>; | |
33 | pinctrl-2 = <&fimc_is_mclk0_fn>; | |
34 | pinctrl-3 = <>; | |
35 | ||
36 | position = <0>; /* Rear:0. Front:1. Rear_sub:2. Secure:3. */ | |
37 | id = <0>; /* fimc_is_sensor id */ | |
38 | mclk_ch = <0>; | |
39 | sensor_i2c_ch = <0>; /* SENSOR_CONTROL_I2C0 */ | |
40 | ||
41 | gpio_mclk = <&gpc2 0 0x1>; | |
42 | gpio_reset = <&gpc1 0 0x1>; /* sensor reset */ | |
43 | ||
44 | power_seq_id = <1>; /* Rumba S6 Compatible */ | |
45 | ||
46 | status = "okay"; | |
47 | ||
48 | af { | |
49 | product_name = <20>; /* ACTUATOR_NAME_LC898217 */ | |
50 | i2c_ch = <0>; /* SENSOR_CONTROL_I2C0 */ | |
51 | }; | |
52 | ||
53 | flash { | |
54 | product_name = <11>; /* FLASH_GPIO */ | |
55 | }; | |
56 | }; | |
57 | ||
58 | fimc_is_sensor_2t7sx: fimc-is_sensor_2t7sx@48 { | |
59 | compatible = "samsung,sensor-module-2t7sx"; | |
60 | ||
61 | pinctrl-names = "pin0", "pin1", "pin2", "release"; | |
62 | pinctrl-0 = <>; | |
63 | pinctrl-1 = <&fimc_is_mclk2_out>; | |
64 | pinctrl-2 = <&fimc_is_mclk2_fn>; | |
65 | pinctrl-3 = <>; | |
66 | ||
67 | position = <2>; /* Rear:0. Front:1. Rear_sub:2. Secure:3. */ | |
68 | id = <2>; /* fimc_is_sensor id */ | |
69 | mclk_ch = <2>; | |
70 | sensor_i2c_ch = <1>; /* SENSOR_CONTROL_I2C1 */ | |
71 | ||
72 | gpio_mclk = <&gpc2 2 0x1>; | |
73 | gpio_reset = <&gpc0 6 0x1>; /* sensor reset */ | |
74 | ||
75 | power_seq_id = <1>; /* Rumba S6 Compatible */ | |
76 | ||
77 | status = "okay"; | |
78 | ||
79 | af { | |
80 | product_name = <20>; /* ACTUATOR_NAME_LC898217 */ | |
81 | i2c_ch = <1>; /* SENSOR_CONTROL_I2C1 */ | |
82 | }; | |
83 | ||
84 | flash { | |
85 | product_name = <11>; /* FLASH_GPIO */ | |
86 | }; | |
87 | }; | |
88 | ||
89 | /* FRONT CAMERA */ | |
90 | fimc_is_sensor_6b2: fimc-is_sensor_6b2@7 { | |
91 | compatible = "samsung,sensor-module-6b2"; | |
92 | ||
93 | pinctrl-names = "pin0", "pin1", "pin2", "release"; | |
94 | pinctrl-0 = <>; | |
95 | pinctrl-1 = <&fimc_is_mclk1_out>; | |
96 | pinctrl-2 = <&fimc_is_mclk1_fn>; | |
97 | pinctrl-3 = <>; | |
98 | ||
99 | position = <1>; /* Rear:0. Front:1. Rear_sub:2. Secure:3. */ | |
100 | id = <1>; /* fimc_is_sensor id */ | |
101 | mclk_ch = <1>; | |
102 | sensor_i2c_ch = <2>; /* SENSOR_CONTROL_I2C4 */ | |
103 | ||
104 | gpio_mclk = <&gpc2 1 0x1>; | |
105 | gpio_reset = <&gpc1 2 0x1>; /* sensor reset */ | |
106 | status = "okay"; | |
107 | ||
108 | af { | |
109 | product_name = <100>; /* NOTHING */ | |
110 | i2c_ch = <2>; /* SENSOR_CONTROL_I2C2 */ | |
111 | }; | |
112 | ||
113 | flash { | |
114 | product_name = <100>; /* NOTHING */ | |
115 | }; | |
116 | ||
117 | ois { | |
118 | product_name = <100>; /* NOTHING */ | |
119 | }; | |
120 | ||
121 | internal_vc { | |
122 | /* DUMMY */ | |
123 | }; | |
124 | }; | |
dd3f89b3 YN |
125 | }; /* end of __overlay__ */ |
126 | }; /* end of fragment */ | |
1b77cd64 WK |
127 | }; /* end of root */ |
128 | ||
129 | /***** reference symbol node *****/ | |
130 | ||
131 | &fimc_is { | |
132 | vender { | |
133 | rear_sensor_id = <47>; /* 46: RPB, 20: 2P8, 47: 2P7SQ */ | |
134 | front_sensor_id = <7>; /* 6B2 */ | |
135 | rear_second_sensor_id = <48>; /* 48: 2T7SX */ | |
136 | secure_sensor_id = <22>; /* 5E2 */ | |
137 | }; | |
138 | ||
139 | fimc_is_dvfs { | |
140 | #define DVFS_INT_CAM_L0 690000 | |
141 | #define DVFS_INT_CAM_L1 680000 | |
142 | #define DVFS_INT_CAM_L2 670000 | |
143 | #define DVFS_INT_CAM_L3 660000 | |
144 | #define DVFS_INT_CAM_L4 650000 | |
145 | ||
146 | #define DVFS_INT_L0 667000 | |
147 | #define DVFS_INT_L1 533000 | |
148 | #define DVFS_INT_L2 400000 | |
149 | #define DVFS_INT_L3 200000 | |
150 | #define DVFS_INT_L4 100000 | |
151 | ||
152 | #define DVFS_CAM_L0 690000 | |
153 | #define DVFS_CAM_L1 680000 | |
154 | #define DVFS_CAM_L2 670000 | |
155 | #define DVFS_CAM_L3 660000 | |
156 | #define DVFS_CAM_L4 650000 | |
157 | #define DVFS_CAM_L5 640000 | |
158 | ||
159 | #define DVFS_MIF_L0 2093000 | |
160 | #define DVFS_MIF_L1 2002000 | |
161 | #define DVFS_MIF_L2 1794000 | |
162 | #define DVFS_MIF_L3 1539000 | |
163 | #define DVFS_MIF_L4 1352000 | |
164 | #define DVFS_MIF_L5 1014000 | |
165 | #define DVFS_MIF_L6 845000 | |
166 | #define DVFS_MIF_L7 676000 | |
167 | #define DVFS_MIF_L8 546000 | |
168 | #define DVFS_MIF_L9 419000 | |
169 | ||
170 | table0 { | |
171 | desc = "dvfs table v0.0 for 16M/2M"; | |
172 | ||
173 | default_int_cam = <DVFS_INT_CAM_L0>; | |
174 | default_cam = <DVFS_CAM_L0>; | |
175 | default_mif = <DVFS_MIF_L0>; | |
176 | default_int = <DVFS_INT_L0>; | |
177 | default_hpg = <1>; | |
178 | ||
a8e9eb8d | 179 | front_preview_int_cam = <DVFS_INT_CAM_L3>; |
180 | front_preview_cam = <DVFS_CAM_L4>; | |
181 | front_preview_mif = <DVFS_MIF_L7>; | |
1b77cd64 WK |
182 | front_preview_int = <DVFS_INT_L0>; |
183 | front_preview_hpg = <1>; | |
184 | ||
a8e9eb8d | 185 | front_preview_full_int_cam = <DVFS_INT_CAM_L3>; |
186 | front_preview_full_cam = <DVFS_CAM_L4>; | |
187 | front_preview_full_mif = <DVFS_MIF_L7>; | |
1b77cd64 WK |
188 | front_preview_full_int = <DVFS_INT_L0>; |
189 | front_preview_full_hpg = <1>; | |
190 | ||
a8e9eb8d | 191 | front_capture_int_cam = <DVFS_INT_CAM_L3>; |
192 | front_capture_cam = <DVFS_CAM_L4>; | |
193 | front_capture_mif = <DVFS_MIF_L7>; | |
1b77cd64 WK |
194 | front_capture_int = <DVFS_INT_L0>; |
195 | front_capture_hpg = <1>; | |
196 | ||
a8e9eb8d | 197 | front_video_int_cam = <DVFS_INT_CAM_L3>; |
198 | front_video_cam = <DVFS_CAM_L4>; | |
199 | front_video_mif = <DVFS_MIF_L7>; | |
1b77cd64 WK |
200 | front_video_int = <DVFS_INT_L0>; |
201 | front_video_hpg = <1>; | |
202 | ||
a8e9eb8d | 203 | front_video_capture_int_cam = <DVFS_INT_CAM_L3>; |
204 | front_video_capture_cam = <DVFS_CAM_L4>; | |
205 | front_video_capture_mif = <DVFS_MIF_L7>; | |
1b77cd64 WK |
206 | front_video_capture_int = <DVFS_INT_L0>; |
207 | front_video_capture_hpg = <1>; | |
208 | ||
209 | front_wide_selfie_int_cam = <DVFS_INT_CAM_L0>; | |
210 | front_wide_selfie_cam = <DVFS_CAM_L0>; | |
211 | front_wide_selfie_mif = <DVFS_MIF_L0>; | |
212 | front_wide_selfie_int = <DVFS_INT_L0>; | |
213 | front_wide_selfie_hpg = <1>; | |
214 | ||
a8e9eb8d | 215 | front_vt1_int_cam = <DVFS_INT_CAM_L3>; |
216 | front_vt1_cam = <DVFS_CAM_L4>; | |
217 | front_vt1_mif = <DVFS_MIF_L7>; | |
1b77cd64 WK |
218 | front_vt1_int = <DVFS_INT_L0>; |
219 | front_vt1_hpg = <1>; | |
220 | ||
a8e9eb8d | 221 | front_vt2_int_cam = <DVFS_INT_CAM_L3>; |
222 | front_vt2_cam = <DVFS_CAM_L4>; | |
223 | front_vt2_mif = <DVFS_MIF_L7>; | |
1b77cd64 WK |
224 | front_vt2_int = <DVFS_INT_L0>; |
225 | front_vt2_hpg = <1>; | |
226 | ||
a8e9eb8d | 227 | front_vt4_int_cam = <DVFS_INT_CAM_L3>; |
228 | front_vt4_cam = <DVFS_CAM_L4>; | |
229 | front_vt4_mif = <DVFS_MIF_L7>; | |
1b77cd64 WK |
230 | front_vt4_int = <DVFS_INT_L0>; |
231 | front_vt4_hpg = <1>; | |
232 | ||
a8e9eb8d | 233 | rear2_preview_fhd_int_cam = <DVFS_INT_CAM_L3>; |
234 | rear2_preview_fhd_cam = <DVFS_CAM_L1>; | |
235 | rear2_preview_fhd_mif = <DVFS_MIF_L5>; | |
236 | rear2_preview_fhd_int = <DVFS_INT_L0>; | |
237 | rear2_preview_fhd_hpg = <1>; | |
238 | ||
239 | rear2_capture_int_cam = <DVFS_INT_CAM_L2>; | |
240 | rear2_capture_cam = <DVFS_CAM_L1>; | |
241 | rear2_capture_mif = <DVFS_MIF_L3>; | |
242 | rear2_capture_int = <DVFS_INT_L0>; | |
243 | rear2_capture_hpg = <1>; | |
244 | ||
245 | rear2_video_fhd_int_cam = <DVFS_INT_CAM_L3>; | |
246 | rear2_video_fhd_cam = <DVFS_CAM_L1>; | |
247 | rear2_video_fhd_mif = <DVFS_MIF_L5>; | |
248 | rear2_video_fhd_int = <DVFS_INT_L0>; | |
249 | rear2_video_fhd_hpg = <1>; | |
250 | ||
251 | rear2_video_fhd_capture_int_cam = <DVFS_INT_CAM_L1>; | |
252 | rear2_video_fhd_capture_cam = <DVFS_CAM_L1>; | |
253 | rear2_video_fhd_capture_mif = <DVFS_MIF_L5>; | |
254 | rear2_video_fhd_capture_int = <DVFS_INT_L0>; | |
255 | rear2_video_fhd_capture_hpg = <1>; | |
256 | ||
257 | rear_preview_fhd_int_cam = <DVFS_INT_CAM_L3>; | |
258 | rear_preview_fhd_cam = <DVFS_CAM_L1>; | |
259 | rear_preview_fhd_mif = <DVFS_MIF_L5>; | |
1b77cd64 WK |
260 | rear_preview_fhd_int = <DVFS_INT_L0>; |
261 | rear_preview_fhd_hpg = <1>; | |
262 | ||
a8e9eb8d | 263 | rear_preview_hd_int_cam = <DVFS_INT_CAM_L3>; |
264 | rear_preview_hd_cam = <DVFS_CAM_L1>; | |
265 | rear_preview_hd_mif = <DVFS_MIF_L5>; | |
1b77cd64 WK |
266 | rear_preview_hd_int = <DVFS_INT_L0>; |
267 | rear_preview_hd_hpg = <1>; | |
268 | ||
a8e9eb8d | 269 | rear_preview_uhd_int_cam = <DVFS_INT_CAM_L1>; |
270 | rear_preview_uhd_cam = <DVFS_CAM_L1>; | |
271 | rear_preview_uhd_mif = <DVFS_MIF_L3>; | |
1b77cd64 WK |
272 | rear_preview_uhd_int = <DVFS_INT_L0>; |
273 | rear_preview_uhd_hpg = <1>; | |
274 | ||
a8e9eb8d | 275 | rear_preview_full_int_cam = <DVFS_INT_CAM_L2>; |
276 | rear_preview_full_cam = <DVFS_CAM_L1>; | |
277 | rear_preview_full_mif = <DVFS_MIF_L4>; | |
1b77cd64 WK |
278 | rear_preview_full_int = <DVFS_INT_L0>; |
279 | rear_preview_full_hpg = <1>; | |
280 | ||
62855a61 | 281 | rear_capture_int_cam = <DVFS_INT_CAM_L0>; |
a8e9eb8d | 282 | rear_capture_cam = <DVFS_CAM_L1>; |
283 | rear_capture_mif = <DVFS_MIF_L3>; | |
1b77cd64 WK |
284 | rear_capture_int = <DVFS_INT_L0>; |
285 | rear_capture_hpg = <1>; | |
286 | ||
a8e9eb8d | 287 | rear_video_fhd_int_cam = <DVFS_INT_CAM_L3>; |
288 | rear_video_fhd_cam = <DVFS_CAM_L1>; | |
289 | rear_video_fhd_mif = <DVFS_MIF_L5>; | |
1b77cd64 WK |
290 | rear_video_fhd_int = <DVFS_INT_L0>; |
291 | rear_video_fhd_hpg = <1>; | |
292 | ||
a8e9eb8d | 293 | rear_video_hd_int_cam = <DVFS_INT_CAM_L3>; |
294 | rear_video_hd_cam = <DVFS_CAM_L1>; | |
295 | rear_video_hd_mif = <DVFS_MIF_L6>; | |
1b77cd64 WK |
296 | rear_video_hd_int = <DVFS_INT_L0>; |
297 | rear_video_hd_hpg = <1>; | |
298 | ||
a8e9eb8d | 299 | rear_video_uhd_int_cam = <DVFS_INT_CAM_L1>; |
300 | rear_video_uhd_cam = <DVFS_CAM_L1>; | |
301 | rear_video_uhd_mif = <DVFS_MIF_L3>; | |
1b77cd64 WK |
302 | rear_video_uhd_int = <DVFS_INT_L0>; |
303 | rear_video_uhd_hpg = <1>; | |
304 | ||
a8e9eb8d | 305 | rear_video_fhd_capture_int_cam = <DVFS_INT_CAM_L1>; |
306 | rear_video_fhd_capture_cam = <DVFS_CAM_L1>; | |
307 | rear_video_fhd_capture_mif = <DVFS_MIF_L5>; | |
1b77cd64 WK |
308 | rear_video_fhd_capture_int = <DVFS_INT_L0>; |
309 | rear_video_fhd_capture_hpg = <1>; | |
310 | ||
a8e9eb8d | 311 | rear_video_hd_capture_int_cam = <DVFS_INT_CAM_L1>; |
312 | rear_video_hd_capture_cam = <DVFS_CAM_L1>; | |
313 | rear_video_hd_capture_mif = <DVFS_MIF_L5>; | |
1b77cd64 WK |
314 | rear_video_hd_capture_int = <DVFS_INT_L0>; |
315 | rear_video_hd_capture_hpg = <1>; | |
316 | ||
317 | rear_video_uhd_capture_int_cam = <DVFS_INT_CAM_L0>; | |
318 | rear_video_uhd_capture_cam = <DVFS_CAM_L0>; | |
319 | rear_video_uhd_capture_mif = <DVFS_MIF_L0>; | |
320 | rear_video_uhd_capture_int = <DVFS_INT_L0>; | |
321 | rear_video_uhd_capture_hpg = <1>; | |
322 | ||
a8e9eb8d | 323 | dual_preview_int_cam = <DVFS_INT_CAM_L0>; |
324 | dual_preview_cam = <DVFS_CAM_L0>; | |
325 | dual_preview_mif = <DVFS_MIF_L0>; | |
326 | dual_preview_int = <DVFS_INT_L0>; | |
327 | dual_preview_hpg = <1>; | |
328 | ||
329 | dual_capture_int_cam = <DVFS_INT_CAM_L0>; | |
330 | dual_capture_cam = <DVFS_CAM_L0>; | |
331 | dual_capture_mif = <DVFS_MIF_L0>; | |
332 | dual_capture_int = <DVFS_INT_L0>; | |
333 | dual_capture_hpg = <1>; | |
334 | ||
335 | dual_video_fhd_int_cam = <DVFS_INT_CAM_L0>; | |
336 | dual_video_fhd_cam = <DVFS_CAM_L0>; | |
337 | dual_video_fhd_mif = <DVFS_MIF_L0>; | |
338 | dual_video_fhd_int = <DVFS_INT_L0>; | |
339 | dual_video_fhd_hpg = <1>; | |
340 | ||
341 | dual_video_fhd_capture_int_cam = <DVFS_INT_CAM_L0>; | |
342 | dual_video_fhd_capture_cam = <DVFS_CAM_L0>; | |
343 | dual_video_fhd_capture_mif = <DVFS_MIF_L0>; | |
344 | dual_video_fhd_capture_int = <DVFS_INT_L0>; | |
345 | dual_video_fhd_capture_hpg = <1>; | |
346 | ||
347 | dual_video_uhd_int_cam = <DVFS_INT_CAM_L0>; | |
348 | dual_video_uhd_cam = <DVFS_CAM_L0>; | |
349 | dual_video_uhd_mif = <DVFS_MIF_L0>; | |
350 | dual_video_uhd_int = <DVFS_INT_L0>; | |
351 | dual_video_uhd_hpg = <1>; | |
352 | ||
353 | dual_video_uhd_capture_int_cam = <DVFS_INT_CAM_L0>; | |
354 | dual_video_uhd_capture_cam = <DVFS_CAM_L0>; | |
355 | dual_video_uhd_capture_mif = <DVFS_MIF_L0>; | |
356 | dual_video_uhd_capture_int = <DVFS_INT_L0>; | |
357 | dual_video_uhd_capture_hpg = <1>; | |
358 | ||
359 | dual_sync_preview_int_cam = <DVFS_INT_CAM_L0>; | |
360 | dual_sync_preview_cam = <DVFS_CAM_L0>; | |
361 | dual_sync_preview_mif = <DVFS_MIF_L0>; | |
362 | dual_sync_preview_int = <DVFS_INT_L0>; | |
363 | dual_sync_preview_hpg = <1>; | |
364 | ||
365 | dual_sync_capture_int_cam = <DVFS_INT_CAM_L0>; | |
366 | dual_sync_capture_cam = <DVFS_CAM_L0>; | |
367 | dual_sync_capture_mif = <DVFS_MIF_L0>; | |
368 | dual_sync_capture_int = <DVFS_INT_L0>; | |
369 | dual_sync_capture_hpg = <1>; | |
370 | ||
371 | dual_sync_preview_whd_int_cam = <DVFS_INT_CAM_L0>; | |
372 | dual_sync_preview_whd_cam = <DVFS_CAM_L0>; | |
373 | dual_sync_preview_whd_mif = <DVFS_MIF_L0>; | |
374 | dual_sync_preview_whd_int = <DVFS_INT_L0>; | |
375 | dual_sync_preview_whd_hpg = <1>; | |
376 | ||
377 | dual_sync_whd_capture_int_cam = <DVFS_INT_CAM_L0>; | |
378 | dual_sync_whd_capture_cam = <DVFS_CAM_L0>; | |
379 | dual_sync_whd_capture_mif = <DVFS_MIF_L0>; | |
380 | dual_sync_whd_capture_int = <DVFS_INT_L0>; | |
381 | dual_sync_whd_capture_hpg = <1>; | |
382 | ||
383 | dual_sync_video_fhd_int_cam = <DVFS_INT_CAM_L0>; | |
384 | dual_sync_video_fhd_cam = <DVFS_CAM_L0>; | |
385 | dual_sync_video_fhd_mif = <DVFS_MIF_L0>; | |
386 | dual_sync_video_fhd_int = <DVFS_INT_L0>; | |
387 | dual_sync_video_fhd_hpg = <1>; | |
388 | ||
389 | dual_sync_video_fhd_capture_int_cam = <DVFS_INT_CAM_L0>; | |
390 | dual_sync_video_fhd_capture_cam = <DVFS_CAM_L0>; | |
391 | dual_sync_video_fhd_capture_mif = <DVFS_MIF_L0>; | |
392 | dual_sync_video_fhd_capture_int = <DVFS_INT_L0>; | |
393 | dual_sync_video_fhd_capture_hpg = <1>; | |
394 | ||
395 | dual_sync_video_uhd_int_cam = <DVFS_INT_CAM_L0>; | |
396 | dual_sync_video_uhd_cam = <DVFS_CAM_L0>; | |
397 | dual_sync_video_uhd_mif = <DVFS_MIF_L0>; | |
398 | dual_sync_video_uhd_int = <DVFS_INT_L0>; | |
399 | dual_sync_video_uhd_hpg = <1>; | |
400 | ||
401 | dual_sync_video_uhd_capture_int_cam = <DVFS_INT_CAM_L0>; | |
402 | dual_sync_video_uhd_capture_cam = <DVFS_CAM_L0>; | |
403 | dual_sync_video_uhd_capture_mif = <DVFS_MIF_L0>; | |
404 | dual_sync_video_uhd_capture_int = <DVFS_INT_L0>; | |
405 | dual_sync_video_uhd_capture_hpg = <1>; | |
406 | ||
ba3de7a2 | 407 | pip_preview_int_cam = <DVFS_INT_CAM_L0>; |
408 | pip_preview_cam = <DVFS_CAM_L0>; | |
409 | pip_preview_mif = <DVFS_MIF_L0>; | |
410 | pip_preview_int = <DVFS_INT_L0>; | |
411 | pip_preview_hpg = <1>; | |
412 | ||
413 | pip_capture_int_cam = <DVFS_INT_CAM_L0>; | |
414 | pip_capture_cam = <DVFS_CAM_L0>; | |
415 | pip_capture_mif = <DVFS_MIF_L0>; | |
416 | pip_capture_int = <DVFS_INT_L0>; | |
417 | pip_capture_hpg = <1>; | |
418 | ||
1b77cd64 WK |
419 | secure_front_int_cam = <DVFS_INT_CAM_L0>; |
420 | secure_front_cam = <DVFS_CAM_L0>; | |
421 | secure_front_mif = <DVFS_MIF_L0>; | |
422 | secure_front_int = <DVFS_INT_L0>; | |
423 | secure_front_hpg = <1>; | |
424 | ||
1b77cd64 WK |
425 | preview_high_speed_fps_int_cam = <DVFS_INT_CAM_L1>; |
426 | preview_high_speed_fps_cam = <DVFS_CAM_L3>; | |
427 | preview_high_speed_fps_mif = <DVFS_MIF_L5>; | |
428 | preview_high_speed_fps_int = <DVFS_INT_L0>; | |
429 | preview_high_speed_fps_hpg = <1>; | |
430 | ||
a8e9eb8d | 431 | video_high_speed_60fps_int_cam = <DVFS_INT_CAM_L3>; |
432 | video_high_speed_60fps_cam = <DVFS_CAM_L1>; | |
433 | video_high_speed_60fps_mif = <DVFS_MIF_L5>; | |
1b77cd64 WK |
434 | video_high_speed_60fps_int = <DVFS_INT_L0>; |
435 | video_high_speed_60fps_hpg = <1>; | |
436 | ||
a8e9eb8d | 437 | video_high_speed_120fps_int_cam = <DVFS_INT_CAM_L3>; |
438 | video_high_speed_120fps_cam = <DVFS_CAM_L3>; | |
439 | video_high_speed_120fps_mif = <DVFS_MIF_L3>; | |
440 | video_high_speed_120fps_int = <DVFS_INT_L0>; | |
441 | video_high_speed_120fps_hpg = <1>; | |
442 | ||
1b77cd64 WK |
443 | video_high_speed_480fps_int_cam = <DVFS_INT_CAM_L0>; |
444 | video_high_speed_480fps_cam = <DVFS_CAM_L0>; | |
a8e9eb8d | 445 | video_high_speed_480fps_mif = <DVFS_MIF_L2>; |
1b77cd64 WK |
446 | video_high_speed_480fps_int = <DVFS_INT_L0>; |
447 | video_high_speed_480fps_hpg = <1>; | |
448 | ||
449 | video_high_speed_60fps_capture_int_cam = <DVFS_INT_CAM_L0>; | |
450 | video_high_speed_60fps_capture_cam = <DVFS_CAM_L0>; | |
451 | video_high_speed_60fps_capture_mif = <DVFS_MIF_L0>; | |
452 | video_high_speed_60fps_capture_int = <DVFS_INT_L0>; | |
453 | video_high_speed_60fps_capture_hpg = <1>; | |
454 | ||
455 | ext_front_int_cam = <DVFS_INT_CAM_L0>; | |
456 | ext_front_cam = <DVFS_CAM_L0>; | |
457 | ext_front_mif = <DVFS_MIF_L0>; | |
458 | ext_front_int = <DVFS_INT_L0>; | |
459 | ext_front_hpg = <1>; | |
460 | ||
461 | ext_secure_int_cam = <DVFS_INT_CAM_L3>; | |
462 | ext_secure_cam = <DVFS_CAM_L4>; | |
463 | ext_secure_mif = <DVFS_MIF_L7>; | |
464 | ext_secure_int = <DVFS_INT_L4>; | |
465 | ext_secure_hpg = <1>; | |
466 | ||
467 | max_int_cam = <DVFS_INT_CAM_L0>; | |
468 | max_cam = <DVFS_CAM_L0>; | |
469 | max_mif = <DVFS_MIF_L0>; | |
470 | max_int = <DVFS_INT_L0>; | |
471 | max_hpg = <1>; | |
472 | }; | |
473 | }; | |
474 | }; | |
475 | ||
476 | /* I2C_CAM0 */ /* SENSOR_CONTROL_I2C0 */ | |
477 | &hsi2c_12 { | |
478 | gpios = <&gpc0 0 0 &gpc0 1 0>; | |
479 | status = "okay"; | |
480 | clock-frequency = <400000>; | |
481 | samsung,reset-before-trans; | |
482 | samsung,polling-mode; | |
dd3f89b3 YN |
483 | #address-cells = <1>; |
484 | #size-cells = <0>; | |
1b77cd64 WK |
485 | fimc-is-2p7sq@2d { |
486 | compatible = "samsung,exynos5-fimc-is-cis-2p7sq"; | |
487 | reg = <0x2d>; /* 1 bit right shift */ | |
488 | id = <0>; /* matching fimc_is_sensor id */ | |
489 | setfile = "setA"; | |
252690c8 | 490 | use_initial_ae; /* for initial AE */ |
1b77cd64 WK |
491 | }; |
492 | ||
493 | fimc-is-actuator@72 { | |
494 | compatible = "samsung,exynos5-fimc-is-actuator-lc898217"; | |
495 | reg = <0x72>; /* 1 bit right shift */ | |
496 | id = <0>; /* matching fimc_is_sensor id */ | |
497 | place = <0>; | |
498 | }; | |
499 | }; | |
500 | ||
501 | /* I2C_CAM1 */ /* SENSOR_CONTROL_I2C1 */ | |
502 | &hsi2c_13 { | |
503 | gpios = <&gpc0 2 0 &gpc0 3 0>; | |
504 | status = "okay"; | |
505 | clock-frequency = <400000>; | |
506 | samsung,reset-before-trans; | |
507 | samsung,polling-mode; | |
508 | ||
dd3f89b3 YN |
509 | #address-cells = <1>; |
510 | #size-cells = <0>; | |
1b77cd64 WK |
511 | fimc-is-2t7sx@10 { |
512 | compatible = "samsung,exynos5-fimc-is-cis-2t7sx"; | |
513 | reg = <0x10>; /* 1 bit right shift */ | |
514 | id = <2>; /* matching fimc_is_sensor id */ | |
515 | setfile = "setA"; | |
252690c8 | 516 | use_initial_ae; /* for initial AE */ |
1b77cd64 WK |
517 | }; |
518 | ||
519 | fimc-is-actuator@74 { | |
520 | compatible = "samsung,exynos5-fimc-is-actuator-lc898217"; | |
521 | reg = <0x74>; /* 1 bit right shift */ | |
522 | id = <2>; /* matching fimc_is_sensor id */ | |
523 | place = <1>; /* HACK */ | |
524 | }; | |
525 | }; | |
526 | ||
527 | /* I2C_CAM2 */ /* SENSOR_CONTROL_I2C2 */ | |
528 | &hsi2c_14 { | |
529 | gpios = <&gpc0 4 0 &gpc0 5 0>; | |
530 | status = "okay"; | |
531 | clock-frequency = <400000>; | |
532 | samsung,reset-before-trans; | |
533 | ||
dd3f89b3 YN |
534 | #address-cells = <1>; |
535 | #size-cells = <0>; | |
1b77cd64 WK |
536 | fimc-is-6b2@35 { |
537 | compatible = "samsung,exynos5-fimc-is-cis-6b2"; | |
538 | reg = <0x35>; /* 1 bit right shift */ | |
539 | id = <1>; /* matching fimc_is_sensor id */ | |
540 | setfile = "setA"; | |
252690c8 | 541 | use_initial_ae; /* for initial AE */ |
1b77cd64 WK |
542 | }; |
543 | }; | |
544 | ||
545 | /* I2C_CAM3 */ /* SENSOR_CONTROL_I2C3 */ | |
546 | &hsi2c_15 { | |
547 | gpios = <&gpc0 6 0 &gpc0 7 0>; | |
548 | status = "okay"; | |
549 | clock-frequency = <400000>; | |
550 | samsung,reset-before-trans; | |
551 | ||
dd3f89b3 YN |
552 | #address-cells = <1>; |
553 | #size-cells = <0>; | |
1b77cd64 WK |
554 | fimc-is-actuator@72 { |
555 | compatible = "samsung,exynos5-fimc-is-actuator-dw9780"; | |
556 | reg = <0x72>; /* 1 bit right shift */ | |
557 | id = <0>; /* matching fimc_is_sensor id */ | |
558 | place = <1>; /* HACK */ | |
559 | }; | |
560 | }; | |
561 | ||
562 | &fimc_is_sensor0 { | |
563 | scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */ | |
564 | id = <0>; | |
565 | csi_ch = <0>; | |
57d5a79d | 566 | dma_ch = <0 0 0 0>; |
567 | vc_ch = <0 1 2 3>; | |
1b77cd64 WK |
568 | flite_ch = <FLITE_ID_NOTHING>; |
569 | is_bns = <0>; | |
f3af0f51 | 570 | csi_mux = <0>; /* CSIS_DPHY[2:0] = [0 0 0] */ |
57d5a79d | 571 | multi_ch = <1>; |
1b77cd64 WK |
572 | /* use_ssvc1_internal; */ |
573 | /* use_ssvc2_internal; */ | |
574 | status = "okay"; | |
575 | }; | |
576 | ||
577 | &fimc_is_sensor1 { | |
578 | scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */ | |
579 | id = <1>; | |
580 | csi_ch = <1>; | |
581 | dma_ch = <1 1 1 1 1 1 1 1>; | |
582 | vc_ch = <0 1 2 3 0 1 2 3>; | |
583 | flite_ch = <FLITE_ID_NOTHING>; | |
584 | is_bns = <0>; | |
f3af0f51 WK |
585 | csi_mux = <0>; /* CSIS_DPHY[2:0] = [0 0 0] */ |
586 | multi_ch = <0>; | |
1b77cd64 WK |
587 | status = "okay"; |
588 | }; | |
589 | ||
590 | &fimc_is_sensor2 { | |
591 | scenario = <SENSOR_SCENARIO_NORMAL>; /* Normal, Vision, OIS etc */ | |
592 | id = <2>; | |
593 | csi_ch = <2>; | |
594 | dma_ch = <2 2 2 2>; | |
595 | vc_ch = <0 1 2 3>; | |
596 | flite_ch = <FLITE_ID_NOTHING>; | |
597 | is_bns = <0>; | |
f3af0f51 WK |
598 | csi_mux = <0>; /* CSIS_DPHY[2:0] = [0 0 0] */ |
599 | multi_ch = <0>; | |
57d5a79d | 600 | camif_mux_val = <0x005820FF>; |
1b77cd64 WK |
601 | status = "okay"; |
602 | }; | |
603 | ||
604 | &fimc_is_sensor3 { | |
605 | scenario = <SENSOR_SCENARIO_SECURE>; /* Normal, Vision, OIS etc */ | |
606 | id = <3>; | |
607 | csi_ch = <3>; | |
608 | dma_ch = <3 3 3 3>; | |
609 | vc_ch = <0 1 2 3>; | |
610 | flite_ch = <FLITE_ID_NOTHING>; | |
611 | is_bns = <0>; | |
f3af0f51 WK |
612 | csi_mux = <0>; /* CSIS_DPHY[2:0] = [0 0 0] */ |
613 | multi_ch = <0>; | |
1b77cd64 WK |
614 | status = "okay"; |
615 | }; |