projects / GitHub / LineageOS / android_kernel_samsung_universal7580.git / blame
| Commit | Line | Data |
|---|---|---|
| 4ccf4bea WS |
1 | /* |
| 2 | * Copyright (C) 1999 ARM Limited | |
| 3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
| 4 | * Copyright 2006-2007,2010 Freescale Semiconductor, Inc. All Rights Reserved. | |
| 5 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | |
| 6 | * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com | |
| 7 | * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K. | |
| 8 | * | |
| 9 | * This program is free software; you can redistribute it and/or modify | |
| 10 | * it under the terms of the GNU General Public License as published by | |
| 11 | * the Free Software Foundation; either version 2 of the License, or | |
| 12 | * (at your option) any later version. | |
| 13 | */ | |
| 14 | ||
| 15 | #include <linux/io.h> | |
| 16 | #include <linux/errno.h> | |
| 17 | #include <linux/delay.h> | |
| 18 | #include <linux/module.h> | |
| 19 | #include <linux/stmp_device.h> | |
| 20 | ||
| 21 | #define STMP_MODULE_CLKGATE (1 << 30) | |
| 22 | #define STMP_MODULE_SFTRST (1 << 31) | |
| 23 | ||
| 24 | /* | |
| 25 | * Clear the bit and poll it cleared. This is usually called with | |
| 26 | * a reset address and mask being either SFTRST(bit 31) or CLKGATE | |
| 27 | * (bit 30). | |
| 28 | */ | |
| 29 | static int stmp_clear_poll_bit(void __iomem *addr, u32 mask) | |
| 30 | { | |
| 31 | int timeout = 0x400; | |
| 32 | ||
| 33 | writel(mask, addr + STMP_OFFSET_REG_CLR); | |
| 34 | udelay(1); | |
| 35 | while ((readl(addr) & mask) && --timeout) | |
| 36 | /* nothing */; | |
| 37 | ||
| 38 | return !timeout; | |
| 39 | } | |
| 40 | ||
| 41 | int stmp_reset_block(void __iomem *reset_addr) | |
| 42 | { | |
| 43 | int ret; | |
| 44 | int timeout = 0x400; | |
| 45 | ||
| 46 | /* clear and poll SFTRST */ | |
| 47 | ret = stmp_clear_poll_bit(reset_addr, STMP_MODULE_SFTRST); | |
| 48 | if (unlikely(ret)) | |
| 49 | goto error; | |
| 50 | ||
| 51 | /* clear CLKGATE */ | |
| 52 | writel(STMP_MODULE_CLKGATE, reset_addr + STMP_OFFSET_REG_CLR); | |
| 53 | ||
| 54 | /* set SFTRST to reset the block */ | |
| 55 | writel(STMP_MODULE_SFTRST, reset_addr + STMP_OFFSET_REG_SET); | |
| 56 | udelay(1); | |
| 57 | ||
| 58 | /* poll CLKGATE becoming set */ | |
| 59 | while ((!(readl(reset_addr) & STMP_MODULE_CLKGATE)) && --timeout) | |
| 60 | /* nothing */; | |
| 61 | if (unlikely(!timeout)) | |
| 62 | goto error; | |
| 63 | ||
| 64 | /* clear and poll SFTRST */ | |
| 65 | ret = stmp_clear_poll_bit(reset_addr, STMP_MODULE_SFTRST); | |
| 66 | if (unlikely(ret)) | |
| 67 | goto error; | |
| 68 | ||
| 69 | /* clear and poll CLKGATE */ | |
| 70 | ret = stmp_clear_poll_bit(reset_addr, STMP_MODULE_CLKGATE); | |
| 71 | if (unlikely(ret)) | |
| 72 | goto error; | |
| 73 | ||
| 74 | return 0; | |
| 75 | ||
| 76 | error: | |
| 77 | pr_err("%s(%p): module reset timeout\n", __func__, reset_addr); | |
| 78 | return -ETIMEDOUT; | |
| 79 | } | |
| 80 | EXPORT_SYMBOL(stmp_reset_block); |