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1 | /* |
2 | * Copyright 2011, Samsung Electronics Co. LTD | |
3 | * | |
4 | * Licensed under the Apache License, Version 2.0 (the "License"); | |
5 | * you may not use this file except in compliance with the License. | |
6 | * You may obtain a copy of the License at | |
7 | * | |
8 | * http://www.apache.org/licenses/LICENSE-2.0 | |
9 | * | |
10 | * Unless required by applicable law or agreed to in writing, software | |
11 | * distributed under the License is distributed on an "AS IS" BASIS, | |
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |
13 | * See the License for the specific language governing permissions and | |
14 | * limitations under the License. | |
15 | */ | |
16 | ||
17 | #ifndef _SEC_G2D_DRIVER_H_ | |
18 | #define _SEC_G2D_DRIVER_H_ | |
19 | ||
20 | #define SEC_G2D_DEV_NAME "/dev/fimg2d" | |
21 | #define G2D_ALPHA_VALUE_MAX (255) | |
22 | ||
23 | /* ioctl commands */ | |
24 | #define FIMG2D_IOCTL_MAGIC 'F' | |
25 | #define FIMG2D_BITBLT_BLIT _IOWR(FIMG2D_IOCTL_MAGIC, 0, struct fimg2d_blit) | |
26 | #define FIMG2D_BITBLT_SYNC _IOW(FIMG2D_IOCTL_MAGIC, 1, int) | |
27 | #define FIMG2D_BITBLT_VERSION _IOR(FIMG2D_IOCTL_MAGIC, 2, struct fimg2d_version) | |
28 | #define FIMG2D_BITBLT_ACTIVATE _IOW(FIMG2D_IOCTL_MAGIC, 3, enum driver_act) | |
29 | ||
30 | #define MAX_SRC 3 | |
31 | ||
32 | enum driver_act { | |
33 | DRV_ACT = 0, | |
34 | DRV_DEACT | |
35 | }; | |
36 | ||
37 | struct fimg2d_version { | |
38 | unsigned int hw; | |
39 | unsigned int sw; | |
40 | }; | |
41 | ||
42 | enum fimg2d_qos_level { | |
43 | G2D_LV0 = 0, | |
44 | G2D_LV1, | |
45 | G2D_LV2, | |
46 | G2D_LV3, | |
47 | G2D_LV4, | |
48 | G2D_LV_END | |
49 | }; | |
50 | ||
51 | /** | |
52 | * @BLIT_SYNC: sync mode, to wait for blit done irq | |
53 | * @BLIT_ASYNC: async mode, not to wait for blit done irq | |
54 | * | |
55 | */ | |
56 | enum blit_sync { | |
57 | BLIT_SYNC, | |
58 | BLIT_ASYNC, | |
59 | }; | |
60 | ||
61 | /** | |
62 | * @ADDR_PHYS: physical address | |
63 | * @ADDR_USER: user virtual address (physically Non-contiguous) | |
64 | * @ADDR_DEVICE: specific device virtual address | |
65 | */ | |
66 | enum addr_space { | |
67 | ADDR_NONE, | |
68 | ADDR_USER, | |
69 | ADDR_DEVICE, | |
70 | }; | |
71 | ||
72 | /** | |
73 | * Pixel order complies with little-endian style | |
74 | * | |
75 | * DO NOT CHANGE THIS ORDER | |
76 | */ | |
77 | enum pixel_order { | |
78 | PO_ARGB = 0, | |
79 | PO_BGRA, | |
80 | PO_RGBA, | |
81 | PO_RGB, | |
82 | ARGB_ORDER_END, | |
83 | }; | |
84 | ||
85 | /** | |
86 | * DO NOT CHANGE THIS ORDER | |
87 | */ | |
88 | enum color_format { | |
89 | CF_ARGB_8888 = 0, | |
90 | CF_RGB_565, | |
91 | SRC_DST_RGB_FORMAT_END, | |
92 | }; | |
93 | ||
94 | enum rotation { | |
95 | ORIGIN, | |
96 | ROT_90, /* clockwise */ | |
97 | ROT_180, | |
98 | ROT_270, | |
99 | XFLIP, /* x-axis flip */ | |
100 | YFLIP, /* y-axis flip */ | |
101 | }; | |
102 | ||
103 | /** | |
104 | * @NO_REPEAT: no effect | |
105 | * @REPEAT_NORMAL: repeat horizontally and vertically | |
106 | * @REPEAT_PAD: pad with pad color | |
107 | * @REPEAT_REFLECT: reflect horizontally and vertically | |
108 | * @REPEAT_CLAMP: pad with edge color of original image | |
109 | * | |
110 | * DO NOT CHANGE THIS ORDER | |
111 | */ | |
112 | enum repeat { | |
113 | NO_REPEAT = 0, | |
114 | REPEAT_NORMAL, /* default setting */ | |
115 | REPEAT_PAD, | |
116 | REPEAT_REFLECT, REPEAT_MIRROR = REPEAT_REFLECT, | |
117 | REPEAT_CLAMP, | |
118 | }; | |
119 | ||
120 | enum scaling { | |
121 | NO_SCALING, | |
122 | SCALING_BILINEAR, | |
123 | }; | |
124 | ||
125 | /** | |
126 | * premultiplied alpha | |
127 | */ | |
128 | enum premultiplied { | |
129 | PREMULTIPLIED, | |
130 | NON_PREMULTIPLIED, | |
131 | }; | |
132 | ||
133 | /** | |
134 | * DO NOT CHANGE THIS ORDER | |
135 | */ | |
136 | enum blit_op { | |
137 | BLIT_OP_NONE = 0, | |
138 | ||
139 | BLIT_OP_SOLID_FILL, | |
140 | BLIT_OP_CLR, | |
141 | BLIT_OP_SRC, BLIT_OP_SRC_COPY = BLIT_OP_SRC, | |
142 | BLIT_OP_DST, | |
143 | BLIT_OP_SRC_OVER, | |
144 | BLIT_OP_DST_OVER, BLIT_OP_OVER_REV = BLIT_OP_DST_OVER, | |
145 | BLIT_OP_SRC_IN, | |
146 | BLIT_OP_DST_IN, BLIT_OP_IN_REV = BLIT_OP_DST_IN, | |
147 | BLIT_OP_SRC_OUT, | |
148 | BLIT_OP_DST_OUT, BLIT_OP_OUT_REV = BLIT_OP_DST_OUT, | |
149 | BLIT_OP_SRC_ATOP, | |
150 | BLIT_OP_DST_ATOP, BLIT_OP_ATOP_REV = BLIT_OP_DST_ATOP, | |
151 | BLIT_OP_XOR, | |
152 | ||
153 | BLIT_OP_ADD, | |
154 | BLIT_OP_MULTIPLY, | |
155 | BLIT_OP_SCREEN, | |
156 | BLIT_OP_DARKEN, | |
157 | BLIT_OP_LIGHTEN, | |
158 | ||
159 | BLIT_OP_DISJ_SRC_OVER, | |
160 | BLIT_OP_DISJ_DST_OVER, BLIT_OP_SATURATE = BLIT_OP_DISJ_DST_OVER, | |
161 | BLIT_OP_DISJ_SRC_IN, | |
162 | BLIT_OP_DISJ_DST_IN, BLIT_OP_DISJ_IN_REV = BLIT_OP_DISJ_DST_IN, | |
163 | BLIT_OP_DISJ_SRC_OUT, | |
164 | BLIT_OP_DISJ_DST_OUT, BLIT_OP_DISJ_OUT_REV = BLIT_OP_DISJ_DST_OUT, | |
165 | BLIT_OP_DISJ_SRC_ATOP, | |
166 | BLIT_OP_DISJ_DST_ATOP, BLIT_OP_DISJ_ATOP_REV = BLIT_OP_DISJ_DST_ATOP, | |
167 | BLIT_OP_DISJ_XOR, | |
168 | ||
169 | BLIT_OP_CONJ_SRC_OVER, | |
170 | BLIT_OP_CONJ_DST_OVER, BLIT_OP_CONJ_OVER_REV = BLIT_OP_CONJ_DST_OVER, | |
171 | BLIT_OP_CONJ_SRC_IN, | |
172 | BLIT_OP_CONJ_DST_IN, BLIT_OP_CONJ_IN_REV = BLIT_OP_CONJ_DST_IN, | |
173 | BLIT_OP_CONJ_SRC_OUT, | |
174 | BLIT_OP_CONJ_DST_OUT, BLIT_OP_CONJ_OUT_REV = BLIT_OP_CONJ_DST_OUT, | |
175 | BLIT_OP_CONJ_SRC_ATOP, | |
176 | BLIT_OP_CONJ_DST_ATOP, BLIT_OP_CONJ_ATOP_REV = BLIT_OP_CONJ_DST_ATOP, | |
177 | BLIT_OP_CONJ_XOR, | |
178 | ||
179 | /* user select coefficient manually */ | |
180 | BLIT_OP_USER_COEFF, | |
181 | ||
182 | BLIT_OP_USER_SRC_GA, | |
183 | ||
184 | /* Add new operation type here */ | |
185 | ||
186 | /* end of blit operation */ | |
187 | BLIT_OP_END, | |
188 | ||
189 | /* driver not supporting format */ | |
190 | BLIT_OP_NOT_SUPPORTED | |
191 | }; | |
192 | ||
193 | /** | |
194 | * @start: start address or unique id of image | |
195 | */ | |
196 | struct fimg2d_addr { | |
197 | enum addr_space type; | |
198 | unsigned long start; | |
199 | unsigned long header; | |
200 | }; | |
201 | ||
202 | struct fimg2d_rect { | |
203 | int x1; | |
204 | int y1; | |
205 | int x2; /* x1 + width */ | |
206 | int y2; /* y1 + height */ | |
207 | }; | |
208 | ||
209 | /** | |
210 | * pixels can be different from src, dst or clip rect | |
211 | */ | |
212 | struct fimg2d_scale { | |
213 | enum scaling mode; | |
214 | ||
215 | /* ratio in pixels */ | |
216 | int src_w, src_h; | |
217 | int dst_w, dst_h; | |
218 | }; | |
219 | ||
220 | struct fimg2d_clip { | |
221 | bool enable; | |
222 | int x1; | |
223 | int y1; | |
224 | int x2; /* x1 + width */ | |
225 | int y2; /* y1 + height */ | |
226 | }; | |
227 | ||
228 | struct fimg2d_repeat { | |
229 | enum repeat mode; | |
230 | unsigned long pad_color; | |
231 | }; | |
232 | ||
233 | /** | |
234 | * @solid_color: | |
235 | * src color instead of src image / dst color instead of dst read image. | |
236 | * color format and order must be ARGB8888(A is MSB). | |
237 | * premultiplied format must be same to 'premult' of this struct. | |
238 | * @g_alpha: global(constant) alpha. 0xff is opaque, 0 is transparnet | |
239 | * @dither: dithering | |
240 | * @rotate: rotation degree in clockwise | |
241 | * @premult: alpha premultiplied mode for read & write | |
242 | * @scaling: common scaling info for src and mask image. | |
243 | * @repeat: repeat type (tile mode) | |
244 | * @bluscr: blue screen and transparent mode | |
245 | * @clipping: clipping rect within dst rect | |
246 | */ | |
247 | struct fimg2d_param { | |
248 | unsigned long solid_color; | |
249 | unsigned char g_alpha; | |
250 | enum rotation rotate; | |
251 | enum premultiplied premult; | |
252 | struct fimg2d_scale scaling; | |
253 | struct fimg2d_repeat repeat; | |
254 | struct fimg2d_clip clipping; | |
255 | }; | |
256 | ||
257 | ||
258 | /** | |
259 | * @rect: crop/clip rect | |
260 | * @need_cacheopr: true if cache coherency is required | |
261 | */ | |
262 | struct fimg2d_image { | |
263 | int layer_num; | |
264 | int width; | |
265 | int height; | |
266 | int stride; | |
267 | enum blit_op op; | |
268 | enum pixel_order order; | |
269 | enum color_format fmt; | |
270 | struct fimg2d_param param; | |
271 | struct fimg2d_addr addr; | |
272 | struct fimg2d_rect rect; | |
273 | bool need_cacheopr; | |
274 | int acquire_fence_fd; | |
275 | int release_fence_fd; | |
276 | struct sync_fence *fence; | |
277 | }; | |
278 | ||
279 | /** | |
280 | * @op: blit operation mode | |
281 | * @src: set when using src image | |
282 | * @msk: set when using mask image | |
283 | * @tmp: set when using 2-step blit at a single command | |
284 | * @dst: dst must not be null | |
285 | * * tmp image must be the same to dst except memory address | |
286 | * @seq_no: user debugging info. | |
287 | * for example, user can set sequence number or pid. | |
288 | */ | |
289 | struct fimg2d_blit { | |
290 | bool use_fence; /* should be clear */ | |
291 | bool dither; | |
292 | struct fimg2d_image *src[MAX_SRC]; | |
293 | struct fimg2d_image *dst; | |
294 | unsigned int seq_no; | |
295 | enum fimg2d_qos_level qos_lv; | |
296 | }; | |
297 | ||
298 | #ifdef __KERNEL__ | |
299 | ||
300 | /** | |
301 | * @pgd: base address of arm mmu pagetable | |
302 | * @ncmd: request count in blit command queue | |
303 | * @wait_q: conext wait queue head | |
304 | */ | |
305 | struct fimg2d_context { | |
306 | struct mm_struct *mm; | |
307 | atomic_t ncmd; | |
308 | wait_queue_head_t wait_q; | |
309 | }; | |
310 | ||
311 | /** | |
312 | * @seq_no: used for debugging | |
313 | * @node: list head of blit command queue | |
314 | */ | |
315 | struct fimg2d_bltcmd { | |
316 | enum blit_op op; | |
317 | ||
318 | enum premultiplied premult; | |
319 | unsigned char g_alpha; | |
320 | bool dither; | |
321 | enum rotation rotate; | |
322 | struct fimg2d_scale scaling; | |
323 | struct fimg2d_repeat repeat; | |
324 | struct fimg2d_bluscr bluscr; | |
325 | struct fimg2d_clip clipping; | |
326 | ||
327 | bool srcen; | |
328 | bool dsten; | |
329 | bool msken; | |
330 | ||
331 | unsigned long solid_color; | |
332 | struct fimg2d_image src; | |
333 | struct fimg2d_image dst; | |
334 | struct fimg2d_image msk; | |
335 | ||
336 | struct fimg2d_rect src_rect; | |
337 | struct fimg2d_rect dst_rect; | |
338 | struct fimg2d_rect msk_rect; | |
339 | ||
340 | size_t size_all; | |
341 | struct fimg2d_cache src_cache; | |
342 | struct fimg2d_cache dst_cache; | |
343 | struct fimg2d_cache msk_cache; | |
344 | ||
345 | unsigned int seq_no; | |
346 | struct fimg2d_context *ctx; | |
347 | struct list_head node; | |
348 | }; | |
349 | ||
350 | /** | |
351 | * @pwron: power status for runtime pm | |
352 | * @pwrlock: spinlock for runtime pm | |
353 | * @mem: resource platform device | |
354 | * @regs: base address of hardware | |
355 | * @dev: pointer to device struct | |
356 | * @err: true if hardware is timed out while blitting | |
357 | * @irq: irq number | |
358 | * @nctx: context count | |
359 | * @busy: 1 if hardware is running | |
360 | * @bltlock: spinlock for blit | |
361 | * @wait_q: blit wait queue head | |
362 | * @cmd_q: blit command queue | |
363 | * @workqueue: workqueue_struct for kfimg2dd | |
364 | */ | |
365 | struct fimg2d_control { | |
366 | atomic_t pwron; | |
367 | spinlock_t pwrlock; | |
368 | struct clk *clock; | |
369 | struct device *dev; | |
370 | struct resource *mem; | |
371 | void __iomem *regs; | |
372 | ||
373 | bool err; | |
374 | int irq; | |
375 | atomic_t nctx; | |
376 | atomic_t busy; | |
377 | atomic_t active; | |
378 | spinlock_t bltlock; | |
379 | wait_queue_head_t wait_q; | |
380 | struct list_head cmd_q; | |
381 | struct workqueue_struct *work_q; | |
382 | ||
383 | void (*blit)(struct fimg2d_control *info); | |
384 | void (*configure)(struct fimg2d_control *info, struct fimg2d_bltcmd *cmd); | |
385 | void (*run)(struct fimg2d_control *info); | |
386 | void (*stop)(struct fimg2d_control *info); | |
387 | void (*finalize)(struct fimg2d_control *info); | |
388 | }; | |
389 | ||
390 | inline void fimg2d_enqueue(struct fimg2d_control *info, | |
391 | struct list_head *node, struct list_head *q); | |
392 | inline void fimg2d_dequeue(struct fimg2d_control *info, struct list_head *node); | |
393 | inline int fimg2d_queue_is_empty(struct list_head *q); | |
394 | inline struct fimg2d_bltcmd * fimg2d_get_first_command(struct fimg2d_control *info); | |
395 | int fimg2d_add_command(struct fimg2d_control *info, struct fimg2d_context *ctx, | |
396 | struct fimg2d_blit __user *u); | |
397 | inline void fimg2d_add_context(struct fimg2d_control *info, struct fimg2d_context *ctx); | |
398 | inline void fimg2d_del_context(struct fimg2d_control *info, struct fimg2d_context *ctx); | |
399 | int fimg2d_register_ops(struct fimg2d_control *info); | |
400 | #if defined(CONFIG_OUTER_CACHE) && defined(CONFIG_ARM) | |
401 | void fimg2d_clean_pagetable(struct mm_struct *mm, unsigned long addr, | |
402 | unsigned long size); | |
403 | #else | |
404 | #define fimg2d_clean_pagetable(mm, addr, size) do { } while (0) | |
405 | #endif | |
406 | ||
407 | #endif /* __KERNEL__ */ | |
408 | ||
409 | #endif /*_SEC_G2D_DRIVER_H_*/ |