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1 | /* |
2 | * Copyright 2011, Samsung Electronics Co. LTD | |
3 | * | |
4 | * Licensed under the Apache License, Version 2.0 (the "License"); | |
5 | * you may not use this file except in compliance with the License. | |
6 | * You may obtain a copy of the License at | |
7 | * | |
8 | * http://www.apache.org/licenses/LICENSE-2.0 | |
9 | * | |
10 | * Unless required by applicable law or agreed to in writing, software | |
11 | * distributed under the License is distributed on an "AS IS" BASIS, | |
12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | |
13 | * See the License for the specific language governing permissions and | |
14 | * limitations under the License. | |
15 | */ | |
16 | ||
17 | #ifndef _SEC_G2D_DRIVER_H_ | |
18 | #define _SEC_G2D_DRIVER_H_ | |
19 | ||
20 | #define SEC_G2D_DEV_NAME "/dev/fimg2d" | |
21 | #define G2D_ALPHA_VALUE_MAX (255) | |
22 | ||
23 | /* ioctl commands */ | |
24 | #define FIMG2D_IOCTL_MAGIC 'F' | |
25 | #define FIMG2D_BITBLT_BLIT _IOWR(FIMG2D_IOCTL_MAGIC, 0, struct fimg2d_blit) | |
26 | #define FIMG2D_BITBLT_SYNC _IOW(FIMG2D_IOCTL_MAGIC, 1, int) | |
27 | #define FIMG2D_BITBLT_VERSION _IOR(FIMG2D_IOCTL_MAGIC, 2, struct fimg2d_version) | |
28 | #define FIMG2D_BITBLT_ACTIVATE _IOW(FIMG2D_IOCTL_MAGIC, 3, enum driver_act) | |
29 | ||
30 | enum driver_act { | |
31 | DRV_ACT = 0, | |
32 | DRV_DEACT | |
33 | }; | |
34 | ||
35 | struct fimg2d_version { | |
36 | unsigned int hw; | |
37 | unsigned int sw; | |
38 | }; | |
39 | ||
40 | enum fimg2d_qos_level { | |
41 | G2D_LV0 = 0, | |
42 | G2D_LV1, | |
43 | G2D_LV2, | |
44 | G2D_LV3, | |
45 | G2D_LV4, | |
46 | G2D_LV_END | |
47 | }; | |
48 | ||
49 | /** | |
50 | * @BLIT_SYNC: sync mode, to wait for blit done irq | |
51 | * @BLIT_ASYNC: async mode, not to wait for blit done irq | |
52 | * | |
53 | */ | |
54 | enum blit_sync { | |
55 | BLIT_SYNC, | |
56 | BLIT_ASYNC, | |
57 | }; | |
58 | ||
59 | /** | |
60 | * @ADDR_PHYS: physical address | |
61 | * @ADDR_USER: user virtual address (physically Non-contiguous) | |
62 | * @ADDR_USER_RSVD: user virtual address (physically Contiguous) | |
63 | * @ADDR_DEVICE: specific device virtual address | |
64 | */ | |
65 | enum addr_space { | |
66 | ADDR_NONE, | |
67 | ADDR_PHYS, | |
68 | ADDR_KERN, | |
69 | ADDR_USER, | |
70 | ADDR_USER_RSVD, | |
71 | ADDR_DEVICE, | |
72 | }; | |
73 | ||
74 | /** | |
75 | * Pixel order complies with little-endian style | |
76 | * | |
77 | * DO NOT CHANGE THIS ORDER | |
78 | */ | |
79 | enum pixel_order { | |
80 | AX_RGB = 0, | |
81 | RGB_AX, | |
82 | AX_BGR, | |
83 | BGR_AX, | |
84 | ARGB_ORDER_END, | |
85 | ||
86 | P1_CRY1CBY0, | |
87 | P1_CBY1CRY0, | |
88 | P1_Y1CRY0CB, | |
89 | P1_Y1CBY0CR, | |
90 | P1_ORDER_END, | |
91 | ||
92 | P2_CRCB, | |
93 | P2_CBCR, | |
94 | P2_ORDER_END, | |
95 | }; | |
96 | ||
97 | /** | |
98 | * DO NOT CHANGE THIS ORDER | |
99 | */ | |
100 | enum color_format { | |
101 | CF_XRGB_8888 = 0, | |
102 | CF_ARGB_8888, | |
103 | CF_RGB_565, | |
104 | CF_XRGB_1555, | |
105 | CF_ARGB_1555, | |
106 | CF_XRGB_4444, | |
107 | CF_ARGB_4444, | |
108 | CF_RGB_888, | |
109 | CF_YCBCR_444, | |
110 | CF_YCBCR_422, | |
111 | CF_YCBCR_420, | |
112 | CF_A8, | |
113 | CF_L8, | |
114 | SRC_DST_FORMAT_END, | |
115 | ||
116 | CF_MSK_1BIT, | |
117 | CF_MSK_4BIT, | |
118 | CF_MSK_8BIT, | |
119 | CF_MSK_16BIT_565, | |
120 | CF_MSK_16BIT_1555, | |
121 | CF_MSK_16BIT_4444, | |
122 | CF_MSK_32BIT_8888, | |
123 | MSK_FORMAT_END, | |
124 | }; | |
125 | ||
126 | enum rotation { | |
127 | ORIGIN, | |
128 | ROT_90, /* clockwise */ | |
129 | ROT_180, | |
130 | ROT_270, | |
131 | XFLIP, /* x-axis flip */ | |
132 | YFLIP, /* y-axis flip */ | |
133 | }; | |
134 | ||
135 | /** | |
136 | * @NO_REPEAT: no effect | |
137 | * @REPEAT_NORMAL: repeat horizontally and vertically | |
138 | * @REPEAT_PAD: pad with pad color | |
139 | * @REPEAT_REFLECT: reflect horizontally and vertically | |
140 | * @REPEAT_CLAMP: pad with edge color of original image | |
141 | * | |
142 | * DO NOT CHANGE THIS ORDER | |
143 | */ | |
144 | enum repeat { | |
145 | NO_REPEAT = 0, | |
146 | REPEAT_NORMAL, /* default setting */ | |
147 | REPEAT_PAD, | |
148 | REPEAT_REFLECT, REPEAT_MIRROR = REPEAT_REFLECT, | |
149 | REPEAT_CLAMP, | |
150 | }; | |
151 | ||
152 | enum scaling { | |
153 | NO_SCALING, | |
154 | SCALING_NEAREST, | |
155 | SCALING_BILINEAR, | |
156 | }; | |
157 | ||
158 | /** | |
159 | * @SCALING_PIXELS: ratio in pixels | |
160 | * @SCALING_RATIO: ratio in fixed point 16 | |
161 | */ | |
162 | enum scaling_factor { | |
163 | SCALING_PIXELS, | |
164 | SCALING_RATIO, | |
165 | }; | |
166 | ||
167 | /** | |
168 | * premultiplied alpha | |
169 | */ | |
170 | enum premultiplied { | |
171 | PREMULTIPLIED, | |
172 | NON_PREMULTIPLIED, | |
173 | }; | |
174 | ||
175 | /** | |
176 | * @TRANSP: discard bluescreen color | |
177 | * @BLUSCR: replace bluescreen color with background color | |
178 | */ | |
179 | enum bluescreen { | |
180 | OPAQUE, | |
181 | TRANSP, | |
182 | BLUSCR, | |
183 | }; | |
184 | ||
185 | /** | |
186 | * DO NOT CHANGE THIS ORDER | |
187 | */ | |
188 | enum blit_op { | |
189 | BLIT_OP_SOLID_FILL = 0, | |
190 | ||
191 | BLIT_OP_CLR, | |
192 | BLIT_OP_SRC, BLIT_OP_SRC_COPY = BLIT_OP_SRC, | |
193 | BLIT_OP_DST, | |
194 | BLIT_OP_SRC_OVER, | |
195 | BLIT_OP_DST_OVER, BLIT_OP_OVER_REV = BLIT_OP_DST_OVER, | |
196 | BLIT_OP_SRC_IN, | |
197 | BLIT_OP_DST_IN, BLIT_OP_IN_REV = BLIT_OP_DST_IN, | |
198 | BLIT_OP_SRC_OUT, | |
199 | BLIT_OP_DST_OUT, BLIT_OP_OUT_REV = BLIT_OP_DST_OUT, | |
200 | BLIT_OP_SRC_ATOP, | |
201 | BLIT_OP_DST_ATOP, BLIT_OP_ATOP_REV = BLIT_OP_DST_ATOP, | |
202 | BLIT_OP_XOR, | |
203 | ||
204 | BLIT_OP_ADD, | |
205 | BLIT_OP_MULTIPLY, | |
206 | BLIT_OP_SCREEN, | |
207 | BLIT_OP_DARKEN, | |
208 | BLIT_OP_LIGHTEN, | |
209 | ||
210 | BLIT_OP_DISJ_SRC_OVER, | |
211 | BLIT_OP_DISJ_DST_OVER, BLIT_OP_SATURATE = BLIT_OP_DISJ_DST_OVER, | |
212 | BLIT_OP_DISJ_SRC_IN, | |
213 | BLIT_OP_DISJ_DST_IN, BLIT_OP_DISJ_IN_REV = BLIT_OP_DISJ_DST_IN, | |
214 | BLIT_OP_DISJ_SRC_OUT, | |
215 | BLIT_OP_DISJ_DST_OUT, BLIT_OP_DISJ_OUT_REV = BLIT_OP_DISJ_DST_OUT, | |
216 | BLIT_OP_DISJ_SRC_ATOP, | |
217 | BLIT_OP_DISJ_DST_ATOP, BLIT_OP_DISJ_ATOP_REV = BLIT_OP_DISJ_DST_ATOP, | |
218 | BLIT_OP_DISJ_XOR, | |
219 | ||
220 | BLIT_OP_CONJ_SRC_OVER, | |
221 | BLIT_OP_CONJ_DST_OVER, BLIT_OP_CONJ_OVER_REV = BLIT_OP_CONJ_DST_OVER, | |
222 | BLIT_OP_CONJ_SRC_IN, | |
223 | BLIT_OP_CONJ_DST_IN, BLIT_OP_CONJ_IN_REV = BLIT_OP_CONJ_DST_IN, | |
224 | BLIT_OP_CONJ_SRC_OUT, | |
225 | BLIT_OP_CONJ_DST_OUT, BLIT_OP_CONJ_OUT_REV = BLIT_OP_CONJ_DST_OUT, | |
226 | BLIT_OP_CONJ_SRC_ATOP, | |
227 | BLIT_OP_CONJ_DST_ATOP, BLIT_OP_CONJ_ATOP_REV = BLIT_OP_CONJ_DST_ATOP, | |
228 | BLIT_OP_CONJ_XOR, | |
229 | ||
230 | /* user select coefficient manually */ | |
231 | BLIT_OP_USER_COEFF, | |
232 | ||
233 | BLIT_OP_USER_SRC_GA, | |
234 | ||
235 | /* Add new operation type here */ | |
236 | ||
237 | /* end of blit operation */ | |
238 | BLIT_OP_END, | |
239 | ||
240 | /* driver not supporting format */ | |
241 | BLIT_OP_NOT_SUPPORTED | |
242 | }; | |
243 | ||
244 | /** | |
245 | * @start: start address or unique id of image | |
246 | */ | |
247 | struct fimg2d_addr { | |
248 | enum addr_space type; | |
249 | unsigned long start; | |
250 | }; | |
251 | ||
252 | struct fimg2d_rect { | |
253 | int x1; | |
254 | int y1; | |
255 | int x2; /* x1 + width */ | |
256 | int y2; /* y1 + height */ | |
257 | }; | |
258 | ||
259 | /** | |
260 | * pixels can be different from src, dst or clip rect | |
261 | */ | |
262 | struct fimg2d_scale { | |
263 | enum scaling mode; | |
264 | ||
265 | /* ratio in pixels */ | |
266 | int src_w, src_h; | |
267 | int dst_w, dst_h; | |
268 | }; | |
269 | ||
270 | struct fimg2d_clip { | |
271 | bool enable; | |
272 | int x1; | |
273 | int y1; | |
274 | int x2; /* x1 + width */ | |
275 | int y2; /* y1 + height */ | |
276 | }; | |
277 | ||
278 | struct fimg2d_repeat { | |
279 | enum repeat mode; | |
280 | unsigned long pad_color; | |
281 | }; | |
282 | ||
283 | /** | |
284 | * @bg_color: bg_color is valid only if bluescreen mode is BLUSCR. | |
285 | */ | |
286 | struct fimg2d_bluscr { | |
287 | enum bluescreen mode; | |
288 | unsigned long bs_color; | |
289 | unsigned long bg_color; | |
290 | }; | |
291 | ||
292 | /** | |
293 | * @plane2: address info for CbCr in YCbCr 2plane mode | |
294 | * @rect: crop/clip rect | |
295 | * @need_cacheopr: true if cache coherency is required | |
296 | */ | |
297 | struct fimg2d_image { | |
298 | int width; | |
299 | int height; | |
300 | int stride; | |
301 | enum pixel_order order; | |
302 | enum color_format fmt; | |
303 | struct fimg2d_addr addr; | |
304 | struct fimg2d_addr plane2; | |
305 | struct fimg2d_rect rect; | |
306 | bool need_cacheopr; | |
307 | }; | |
308 | ||
309 | /** | |
310 | * @solid_color: | |
311 | * src color instead of src image / dst color instead of dst read image. | |
312 | * color format and order must be ARGB8888(A is MSB). | |
313 | * premultiplied format must be same to 'premult' of this struct. | |
314 | * @g_alpha: global(constant) alpha. 0xff is opaque, 0 is transparnet | |
315 | * @dither: dithering | |
316 | * @rotate: rotation degree in clockwise | |
317 | * @premult: alpha premultiplied mode for read & write | |
318 | * @scaling: common scaling info for src and mask image. | |
319 | * @repeat: repeat type (tile mode) | |
320 | * @bluscr: blue screen and transparent mode | |
321 | */ | |
322 | struct fimg2d_param { | |
323 | unsigned long solid_color; | |
324 | unsigned char g_alpha; | |
325 | bool dither; | |
326 | enum rotation rotate; | |
327 | enum premultiplied premult; | |
328 | struct fimg2d_scale scaling; | |
329 | struct fimg2d_repeat repeat; | |
330 | struct fimg2d_bluscr bluscr; | |
331 | struct fimg2d_clip clipping; | |
332 | }; | |
333 | ||
334 | /** | |
335 | * @op: blit operation mode | |
336 | * @src: set when using src image | |
337 | * @msk: set when using mask image | |
338 | * @tmp: set when using 2-step blit at a single command | |
339 | * @dst: dst must not be null | |
340 | * * tmp image must be the same to dst except memory address | |
341 | * @seq_no: user debugging info. | |
342 | * for example, user can set sequence number or pid. | |
343 | */ | |
344 | struct fimg2d_blit { | |
345 | enum blit_op op; | |
346 | struct fimg2d_param param; | |
347 | struct fimg2d_image *src; | |
348 | struct fimg2d_image *msk; | |
349 | struct fimg2d_image *tmp; | |
350 | struct fimg2d_image *dst; | |
351 | enum blit_sync sync; | |
352 | unsigned int seq_no; | |
353 | enum fimg2d_qos_level qos_lv; | |
354 | }; | |
355 | ||
356 | struct fimg2d_blit_raw { | |
357 | enum blit_op op; | |
358 | struct fimg2d_param param; | |
359 | struct fimg2d_image src; | |
360 | struct fimg2d_image msk; | |
361 | struct fimg2d_image tmp; | |
362 | struct fimg2d_image dst; | |
363 | enum blit_sync sync; | |
364 | unsigned int seq_no; | |
365 | enum fimg2d_qos_level qos_lv; | |
366 | }; | |
367 | ||
368 | #ifdef __KERNEL__ | |
369 | ||
370 | /** | |
371 | * @pgd: base address of arm mmu pagetable | |
372 | * @ncmd: request count in blit command queue | |
373 | * @wait_q: conext wait queue head | |
374 | */ | |
375 | struct fimg2d_context { | |
376 | struct mm_struct *mm; | |
377 | atomic_t ncmd; | |
378 | wait_queue_head_t wait_q; | |
379 | }; | |
380 | ||
381 | /** | |
382 | * @seq_no: used for debugging | |
383 | * @node: list head of blit command queue | |
384 | */ | |
385 | struct fimg2d_bltcmd { | |
386 | enum blit_op op; | |
387 | ||
388 | enum premultiplied premult; | |
389 | unsigned char g_alpha; | |
390 | bool dither; | |
391 | enum rotation rotate; | |
392 | struct fimg2d_scale scaling; | |
393 | struct fimg2d_repeat repeat; | |
394 | struct fimg2d_bluscr bluscr; | |
395 | struct fimg2d_clip clipping; | |
396 | ||
397 | bool srcen; | |
398 | bool dsten; | |
399 | bool msken; | |
400 | ||
401 | unsigned long solid_color; | |
402 | struct fimg2d_image src; | |
403 | struct fimg2d_image dst; | |
404 | struct fimg2d_image msk; | |
405 | ||
406 | struct fimg2d_rect src_rect; | |
407 | struct fimg2d_rect dst_rect; | |
408 | struct fimg2d_rect msk_rect; | |
409 | ||
410 | size_t size_all; | |
411 | struct fimg2d_cache src_cache; | |
412 | struct fimg2d_cache dst_cache; | |
413 | struct fimg2d_cache msk_cache; | |
414 | ||
415 | unsigned int seq_no; | |
416 | struct fimg2d_context *ctx; | |
417 | struct list_head node; | |
418 | }; | |
419 | ||
420 | /** | |
421 | * @pwron: power status for runtime pm | |
422 | * @pwrlock: spinlock for runtime pm | |
423 | * @mem: resource platform device | |
424 | * @regs: base address of hardware | |
425 | * @dev: pointer to device struct | |
426 | * @err: true if hardware is timed out while blitting | |
427 | * @irq: irq number | |
428 | * @nctx: context count | |
429 | * @busy: 1 if hardware is running | |
430 | * @bltlock: spinlock for blit | |
431 | * @wait_q: blit wait queue head | |
432 | * @cmd_q: blit command queue | |
433 | * @workqueue: workqueue_struct for kfimg2dd | |
434 | */ | |
435 | struct fimg2d_control { | |
436 | atomic_t pwron; | |
437 | spinlock_t pwrlock; | |
438 | struct clk *clock; | |
439 | struct device *dev; | |
440 | struct resource *mem; | |
441 | void __iomem *regs; | |
442 | ||
443 | bool err; | |
444 | int irq; | |
445 | atomic_t nctx; | |
446 | atomic_t busy; | |
447 | atomic_t active; | |
448 | spinlock_t bltlock; | |
449 | wait_queue_head_t wait_q; | |
450 | struct list_head cmd_q; | |
451 | struct workqueue_struct *work_q; | |
452 | ||
453 | void (*blit)(struct fimg2d_control *info); | |
454 | void (*configure)(struct fimg2d_control *info, struct fimg2d_bltcmd *cmd); | |
455 | void (*run)(struct fimg2d_control *info); | |
456 | void (*stop)(struct fimg2d_control *info); | |
457 | void (*finalize)(struct fimg2d_control *info); | |
458 | }; | |
459 | ||
460 | inline void fimg2d_enqueue(struct fimg2d_control *info, | |
461 | struct list_head *node, struct list_head *q); | |
462 | inline void fimg2d_dequeue(struct fimg2d_control *info, struct list_head *node); | |
463 | inline int fimg2d_queue_is_empty(struct list_head *q); | |
464 | inline struct fimg2d_bltcmd * fimg2d_get_first_command(struct fimg2d_control *info); | |
465 | int fimg2d_add_command(struct fimg2d_control *info, struct fimg2d_context *ctx, | |
466 | struct fimg2d_blit __user *u); | |
467 | inline void fimg2d_add_context(struct fimg2d_control *info, struct fimg2d_context *ctx); | |
468 | inline void fimg2d_del_context(struct fimg2d_control *info, struct fimg2d_context *ctx); | |
469 | int fimg2d_register_ops(struct fimg2d_control *info); | |
470 | #if defined(CONFIG_OUTER_CACHE) && defined(CONFIG_ARM) | |
471 | void fimg2d_clean_pagetable(struct mm_struct *mm, unsigned long addr, | |
472 | unsigned long size); | |
473 | #else | |
474 | #define fimg2d_clean_pagetable(mm, addr, size) do { } while (0) | |
475 | #endif | |
476 | ||
477 | #endif /* __KERNEL__ */ | |
478 | ||
479 | #endif /*_SEC_G2D_DRIVER_H_*/ |