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GitHub/LineageOS/android_kernel_motorola_exynos9610.git
Author
Commit
2017-04-19
Alexey Firago
clk: vc5: Add support for IDT VersaClock 5P49V5935
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2017-04-19
Alexey Firago
clk: vc5: Add bindings for IDT VersaClock 5P49V5935
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2017-04-19
Alexey Firago
clk: vc5: Add structure to describe particular chip...
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2017-04-19
Stephen Boyd
Merge tag 'sunxi-clk-for-4.12' of https://git./linux...
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2017-04-17
Stephen Boyd
Merge branch 'clk-fixes' into clk-next
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2017-04-17
Stephen Boyd
Merge tag 'sunxi-clk-fixes-for-4.11-2-bis' of https...
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2017-04-13
Chen-Yu Tsai
clk: sunxi-ng: a33: gate then ungate PLL CPU clk after...
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2017-04-13
Chen-Yu Tsai
clk: sunxi-ng: Add clk notifier to gate then ungate...
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2017-04-13
Tobias Regnery
clk: sunxi-ng: fix build failure in ccu-sun9i-a80 driver
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2017-04-13
Tobias Regnery
clk: sunxi-ng: fix build error without CONFIG_RESET_CON...
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2017-04-12
Kuninori Morimoto
clk: cs2000: use existing priv_to_dev() to getting...
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2017-04-12
Michael Turquette
Merge tag 'meson-clk-for-4.12' of git://github.com...
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2017-04-12
Michael Turquette
Merge tag 'amlogic-clk' of git://git./linux/kernel...
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2017-04-12
Peter De Schrijver
clk: aggregate return codes of notify chains
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2017-04-12
Peter De Schrijver
clk: add clk_possible_parents debugfs file
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2017-04-12
Robin van der...
clk: imx: correct uart4_serial clock name in driver...
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2017-04-12
Stephen Boyd
clk: zte: Mark pll config tables as const
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2017-04-12
Shawn Guo
clk: zte: add pll_vga clock for zx296718
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2017-04-12
Shawn Guo
clk: zte: pd_bit is not 0 on zx296718
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2017-04-12
Shawn Guo
clk: zte: set CLK_SET_RATE_PARENT for a few zx296718...
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2017-04-12
Robin van der...
clk: imx: clk-imx6ul: The i.mx6ul has no aips_tz3 clock
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2017-04-12
Michael Turquette
Merge tag 'tegra-for-4.12-clk' of git://git./linux...
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2017-04-12
Kuninori Morimoto
cs-2000-cp: keep Reserved bit on each register
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2017-04-12
Rajendra Nayak
clk: qcom: msm8996: Fix the vfe1 powerdomain name
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2017-04-12
Gabriel Fernandez
clk: stm32f4: fix timeout management for pll and ready...
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2017-04-12
Ray Jui
clk: iproc: Remove redundant check
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2017-04-12
Michael Turquette
Merge tag 'v4.12-rockchip-clk1' of git://git./linux...
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2017-04-12
Michael Turquette
Merge tag 'clk-renesas-for-v4.12-tag2' of git://git...
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2017-04-12
Stephen Boyd
Merge branch 'clk-fixes' into clk-next
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2017-04-12
Gabriel Fernandez
clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
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2017-04-12
Stephen Boyd
Merge branch 'for-4.12-ti-clk-cleanups' of https:/...
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2017-04-12
Leo Yan
clk: hi6220: add debug APB clock
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2017-04-07
Martin Blumenstingl
clk: meson: mpll: use 64bit math in rate_from_params
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2017-04-07
Martin Blumenstingl
clk: meson: mpll: fix division by zero in rate_from_params
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2017-04-07
Jerome Brunet
clk: meson: gxbb: add cts_i958 clock
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2017-04-07
Jerome Brunet
clk: meson: gxbb: add cts_mclk_i958
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2017-04-07
Jerome Brunet
clk: meson: gxbb: add cts_amclk
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2017-04-07
Jerome Brunet
clk: meson: add audio clock divider support
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2017-04-07
Jerome Brunet
clk: meson: gxbb: protect against holes in the onecell_...
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2017-04-07
Jerome Brunet
MAINTAINERS: Add maintainers for the meson clock driver
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2017-04-06
Priit Laes
clk: sunxi-ng: Display index when clock registration...
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2017-04-05
Chen-Yu Tsai
clk: sunxi-ng: a33: Add offset and minimum value for...
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2017-04-05
Chen-Yu Tsai
clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type...
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2017-04-05
Chen-Yu Tsai
clk: sunxi-ng: mult: Support PLL lock detection
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2017-04-04
Kevin Hilman
Merge branch 'v4.12/clk-drivers' into v4.12/clk
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2017-04-04
Neil Armstrong
clk: meson-gxbb: Add GXL/GXM GP0 Variant
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2017-04-04
Neil Armstrong
clk: meson-gxbb: Add GP0 PLL init parameters
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2017-04-04
Neil Armstrong
clk: meson: Add support for parameters for specific...
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2017-04-04
Neil Armstrong
clk: meson-gxbb: Add MALI clocks
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2017-04-04
Neil Armstrong
dt-bindings: clock: gxbb-clkc: Add GXL compatible variant
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2017-04-04
Neil Armstrong
clk: meson-gxbb: Expose GP0 dt-bindings clock id
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2017-04-04
Neil Armstrong
clk: meson-gxbb: Add MALI clock IDS
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2017-04-04
Jerome Brunet
dt-bindings: clk: gxbb: expose i2s output clock gates
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2017-04-04
Icenowy Zheng
clk: sunxi-ng: add support for PRCM CCUs
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2017-04-04
Icenowy Zheng
dt-bindings: update device tree binding for Allwinner...
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2017-04-04
Jon Hunter
clk: tegra: Don't reset PLL-CX if it is already enabled
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2017-04-04
Peter De Schrijver
clk: tegra: Add missing Tegra210 clocks
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2017-04-04
Alex Frid
clk: tegra: Propagate clk_out_x rate to parent
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2017-04-04
Gabriel Fernandez
clk: stm32f4: fix: exclude values 0 and 1 for PLLQ
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2017-03-30
Geert Uytterhoeven
clk: renesas: rcar-gen3-cpg: Add support for RCLK on...
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2017-03-30
Geert Uytterhoeven
clk: renesas: r8a7795: Add support for R-Car H3 ES2.0
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2017-03-30
Geert Uytterhoeven
clk: renesas: Add r8a7795 ES2.0 CPG Core Clock Definitions
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2017-03-30
Geert Uytterhoeven
clk: renesas: cpg-mssr: Add support for fixing up clock...
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2017-03-27
Jerome Brunet
clk: meson: mpll: correct N2 maximum value
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2017-03-27
Jerome Brunet
clk: meson8b: add the mplls clocks 0, 1 and 2
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2017-03-27
Jerome Brunet
clk: meson: gxbb: mpll: use rw operation
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2017-03-27
Jerome Brunet
clk: meson: mpll: add rw operation
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2017-03-27
Jerome Brunet
clk: gxbb: put dividers and muxes in tables
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2017-03-27
Jerome Brunet
clk: meson8b: put dividers and muxes in tables
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2017-03-27
Jerome Brunet
clk: meson: add missing const qualifiers on gate arrays
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2017-03-27
Jerome Brunet
clk: meson: fix SET_PARM macro
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2017-03-23
Stephen Boyd
Merge tag 'sunxi-clk-fixes-for-4.11' of https://git...
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2017-03-22
Elaine Zhang
clk: rockchip: add pll_wait_lock for pll_enable
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2017-03-22
Andy Yan
clk: rockchip: rename RK1108 to RV1108
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2017-03-22
Andy Yan
dt-bindings: rk1108-cru: rename RK1108 to RV1108
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2017-03-21
Geert Uytterhoeven
clk: renesas: rcar-gen3: Add workaround for PLL0/2...
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2017-03-21
Geert Uytterhoeven
clk: renesas: rcar-gen3-cpg: Pass mode pins to rcar_gen...
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2017-03-21
Geert Uytterhoeven
clk: renesas: r8a7796: Reformat core clock table
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2017-03-21
Geert Uytterhoeven
clk: renesas: r8a7795: Reformat core clock table
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2017-03-21
Geert Uytterhoeven
clk: renesas: r8a7796: Correct name of watchdog clock
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2017-03-21
Geert Uytterhoeven
clk: renesas: r8a7795: Correct name of watchdog clock
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2017-03-21
Geert Uytterhoeven
clk: renesas: r8a7795: Correct parent clock and sort...
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2017-03-20
Thierry Reding
clk: tegra: Fix build warnings on Tegra20/Tegra30
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2017-03-20
Peter De Schrijver
clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on
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2017-03-20
Peter De Schrijver
clk: tegra: Add SATA seq input control
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2017-03-20
Peter De Schrijver
clk: tegra: Add Tegra210 special resets
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2017-03-20
Peter De Schrijver
clk: tegra: Rework pll_u
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2017-03-20
Mikko Perttunen
clk: tegra: Implement reset control reset
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2017-03-20
Peter De Schrijver
clk: tegra: Fix disable unused for clocks sharing enabl...
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2017-03-20
Peter De Schrijver
clk: tegra: Handle UTMIPLL IDDQ
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2017-03-20
Peter De Schrijver
clk: tegra: Add aclk
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2017-03-20
Peter De Schrijver
clk: tegra: Add super clock mux/divider
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2017-03-20
Peter De Schrijver
clk: tegra: Define Tegra210 DMIC clocks
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2017-03-20
Peter De Schrijver
clk: tegra: Fix constness for peripheral clocks
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2017-03-20
Peter De Schrijver
clk: tegra: Define Tegra210 DMIC sync clocks
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2017-03-20
Peter De Schrijver
clk: tegra: Add CEC clock
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2017-03-20
Peter De Schrijver
clk: tegra: Fix type for m field
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2017-03-20
Peter De Schrijver
clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate...
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2017-03-20
Peter De Schrijver
clk: tegra: Don't warn for PLL defaults unnecessarily
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2017-03-20
Peter De Schrijver
clk: tegra: Remove non-existing pll_m_out1 clock
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